linux/arch/powerpc/boot/dts/mpc8544ds.dtsi
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   1/*
   2 * MPC8544DS Device Tree Source stub (no addresses or top-level ranges)
   3 *
   4 * Copyright 2011 Freescale Semiconductor Inc.
   5 *
   6 * Redistribution and use in source and binary forms, with or without
   7 * modification, are permitted provided that the following conditions are met:
   8 *     * Redistributions of source code must retain the above copyright
   9 *       notice, this list of conditions and the following disclaimer.
  10 *     * Redistributions in binary form must reproduce the above copyright
  11 *       notice, this list of conditions and the following disclaimer in the
  12 *       documentation and/or other materials provided with the distribution.
  13 *     * Neither the name of Freescale Semiconductor nor the
  14 *       names of its contributors may be used to endorse or promote products
  15 *       derived from this software without specific prior written permission.
  16 *
  17 *
  18 * ALTERNATIVELY, this software may be distributed under the terms of the
  19 * GNU General Public License ("GPL") as published by the Free Software
  20 * Foundation, either version 2 of that License or (at your option) any
  21 * later version.
  22 *
  23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33 */
  34
  35&board_lbc {
  36        nor@0,0 {
  37                #address-cells = <1>;
  38                #size-cells = <1>;
  39                compatible = "cfi-flash";
  40                reg = <0x0 0x0 0x800000>;
  41                bank-width = <2>;
  42                device-width = <1>;
  43
  44                partition@0 {
  45                        reg = <0x0 0x10000>;
  46                        label = "dtb-nor";
  47                };
  48
  49                partition@20000 {
  50                        reg = <0x20000 0x30000>;
  51                        label = "diagnostic-nor";
  52                        read-only;
  53                };
  54
  55                partition@200000 {
  56                        reg = <0x200000 0x200000>;
  57                        label = "dink-nor";
  58                        read-only;
  59                };
  60
  61                partition@400000 {
  62                        reg = <0x400000 0x380000>;
  63                        label = "kernel-nor";
  64                };
  65
  66                partition@780000 {
  67                        reg = <0x780000 0x80000>;
  68                        label = "u-boot-nor";
  69                        read-only;
  70                };
  71        };
  72};
  73
  74&board_soc {
  75        enet0: ethernet@24000 {
  76                phy-handle = <&phy0>;
  77                tbi-handle = <&tbi0>;
  78                phy-connection-type = "rgmii-id";
  79        };
  80
  81        mdio@24520 {
  82                phy0: ethernet-phy@0 {
  83                        interrupts = <10 1 0 0>;
  84                        reg = <0x0>;
  85                        device_type = "ethernet-phy";
  86                };
  87                phy1: ethernet-phy@1 {
  88                        interrupts = <10 1 0 0>;
  89                        reg = <0x1>;
  90                        device_type = "ethernet-phy";
  91                };
  92
  93                sgmii_phy0: sgmii-phy@0 {
  94                        interrupts = <6 1 0 0>;
  95                        reg = <0x1c>;
  96                };
  97                sgmii_phy1: sgmii-phy@1 {
  98                        interrupts = <6 1 0 0>;
  99                        reg = <0x1d>;
 100                };
 101
 102                tbi0: tbi-phy@11 {
 103                        reg = <0x11>;
 104                        device_type = "tbi-phy";
 105                };
 106        };
 107
 108        enet2: ethernet@26000 {
 109                phy-handle = <&phy1>;
 110                tbi-handle = <&tbi1>;
 111                phy-connection-type = "rgmii-id";
 112        };
 113
 114        mdio@26520 {
 115                tbi1: tbi-phy@11 {
 116                        reg = <0x11>;
 117                        device_type = "tbi-phy";
 118                };
 119        };
 120};
 121
 122&board_pci3 {
 123        pcie@0 {
 124                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
 125                interrupt-map = <
 126                        // IDSEL 0x1c  USB
 127                        0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
 128                        0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
 129                        0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
 130                        0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
 131
 132                        // IDSEL 0x1d  Audio
 133                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
 134
 135                        // IDSEL 0x1e Legacy
 136                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
 137                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
 138
 139                        // IDSEL 0x1f IDE/SATA
 140                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
 141                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
 142                        >;
 143
 144
 145                uli1575@0 {
 146                        reg = <0x0 0x0 0x0 0x0 0x0>;
 147                        #size-cells = <2>;
 148                        #address-cells = <3>;
 149                        ranges = <0x2000000 0x0 0xb0000000
 150                                  0x2000000 0x0 0xb0000000
 151                                  0x0 0x100000
 152
 153                                  0x1000000 0x0 0x0
 154                                  0x1000000 0x0 0x0
 155                                  0x0 0x100000>;
 156                        isa@1e {
 157                                device_type = "isa";
 158                                #interrupt-cells = <2>;
 159                                #size-cells = <1>;
 160                                #address-cells = <2>;
 161                                reg = <0xf000 0x0 0x0 0x0 0x0>;
 162                                ranges = <0x1 0x0 0x1000000 0x0 0x0
 163                                          0x1000>;
 164                                interrupt-parent = <&i8259>;
 165
 166                                i8259: interrupt-controller@20 {
 167                                        reg = <0x1 0x20 0x2
 168                                               0x1 0xa0 0x2
 169                                               0x1 0x4d0 0x2>;
 170                                        interrupt-controller;
 171                                        device_type = "interrupt-controller";
 172                                        #address-cells = <0>;
 173                                        #interrupt-cells = <2>;
 174                                        compatible = "chrp,iic";
 175                                        interrupts = <9 2 0 0>;
 176                                        interrupt-parent = <&mpic>;
 177                                };
 178
 179                                i8042@60 {
 180                                        #size-cells = <0>;
 181                                        #address-cells = <1>;
 182                                        reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
 183                                        interrupts = <1 3 12 3>;
 184                                        interrupt-parent =
 185                                                <&i8259>;
 186
 187                                        keyboard@0 {
 188                                                reg = <0x0>;
 189                                                compatible = "pnpPNP,303";
 190                                        };
 191
 192                                        mouse@1 {
 193                                                reg = <0x1>;
 194                                                compatible = "pnpPNP,f03";
 195                                        };
 196                                };
 197
 198                                rtc@70 {
 199                                        compatible = "pnpPNP,b00";
 200                                        reg = <0x1 0x70 0x2>;
 201                                };
 202
 203                                gpio@400 {
 204                                        reg = <0x1 0x400 0x80>;
 205                                };
 206                        };
 207                };
 208        };
 209};
 210