LXR linux/arch/powerpc/kernel/pci_of

   1/*
   2 * Helper routines to scan the device tree for PCI devices and busses
   3 *
   4 * Migrated out of PowerPC architecture pci_64.c file by Grant Likely
   5 * <grant.likely@secretlab.ca> so that these routines are available for
   6 * 32 bit also.
   7 *
   8 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
   9 *   Rework, based on alpha PCI code.
  10 * Copyright (c) 2009 Secret Lab Technologies Ltd.
  11 *
  12 * This program is free software; you can redistribute it and/or
  13 * modify it under the terms of the GNU General Public License
  14 * version 2 as published by the Free Software Foundation.
  15 */
  16
  17#include <linux/pci.h>
  18#include <linux/export.h>
  19#include <asm/pci-bridge.h>
  20#include <asm/prom.h>
  21
  22/**
  23 * get_int_prop - Decode a u32 from a device tree property
  24 */
  25static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
  26{
  27        const u32 *prop;
  28        int len;
  29
  30        prop = of_get_property(np, name, &len);
  31        if (prop && len >= 4)
  32                return *prop;
  33        return def;
  34}
  35
  36/**
  37 * pci_parse_of_flags - Parse the flags cell of a device tree PCI address
  38 * @addr0: value of 1st cell of a device tree PCI address.
  39 * @bridge: Set this flag if the address is from a bridge 'ranges' property
  40 */
  41unsigned int pci_parse_of_flags(u32 addr0, int bridge)
  42{
  43        unsigned int flags = 0;
  44
  45        if (addr0 & 0x02000000) {
  46                flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
  47                flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
  48                flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
  49                if (addr0 & 0x40000000)
  50                        flags |= IORESOURCE_PREFETCH
  51                                 | PCI_BASE_ADDRESS_MEM_PREFETCH;
  52                /* Note: We don't know whether the ROM has been left enabled
  53                 * by the firmware or not. We mark it as disabled (ie, we do
  54                 * not set the IORESOURCE_ROM_ENABLE flag) for now rather than
  55                 * do a config space read, it will be force-enabled if needed
  56                 */
  57                if (!bridge && (addr0 & 0xff) == 0x30)
  58                        flags |= IORESOURCE_READONLY;
  59        } else if (addr0 & 0x01000000)
  60                flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
  61        if (flags)
  62                flags |= IORESOURCE_SIZEALIGN;
  63        return flags;
  64}
  65
  66/**
  67 * of_pci_parse_addrs - Parse PCI addresses assigned in the device tree node
  68 * @node: device tree node for the PCI device
  69 * @dev: pci_dev structure for the device
  70 *
  71 * This function parses the 'assigned-addresses' property of a PCI devices'
  72 * device tree node and writes them into the associated pci_dev structure.
  73 */
  74static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
  75{
  76        u64 base, size;
  77        unsigned int flags;
  78        struct pci_bus_region region;
  79        struct resource *res;
  80        const u32 *addrs;
  81        u32 i;
  82        int proplen;
  83
  84        addrs = of_get_property(node, "assigned-addresses", &proplen);
  85        if (!addrs)
  86                return;
  87        pr_debug("    parse addresses (%d bytes) @ %p\n", proplen, addrs);
  88        for (; proplen >= 20; proplen -= 20, addrs += 5) {
  89                flags = pci_parse_of_flags(addrs[0], 0);
  90                if (!flags)
  91                        continue;
  92                base = of_read_number(&addrs[1], 2);
  93                size = of_read_number(&addrs[3], 2);
  94                if (!size)
  95                        continue;
  96                i = addrs[0] & 0xff;
  97                pr_debug("  base: %llx, size: %llx, i: %x\n",
  98                         (unsigned long long)base,
  99                         (unsigned long long)size, i);
 100
 101                if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
 102                        res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
 103                } else if (i == dev->rom_base_reg) {
 104                        res = &dev->resource[PCI_ROM_RESOURCE];
 105                        flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
 106                } else {
 107                        printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
 108                        continue;
 109                }
 110                res->flags = flags;
 111                res->name = pci_name(dev);
 112                region.start = base;
 113                region.end = base + size - 1;
 114                pcibios_bus_to_resource(dev, res, &region);
 115        }
 116}
 117
 118/**
 119 * of_create_pci_dev - Given a device tree node on a pci bus, create a pci_dev
 120 * @node: device tree node pointer
 121 * @bus: bus the device is sitting on
 122 * @devfn: PCI function number, extracted from device tree by caller.
 123 */
 124struct pci_dev *of_create_pci_dev(struct device_node *node,
 125                                 struct pci_bus *bus, int devfn)
 126{
 127        struct pci_dev *dev;
 128        const char *type;
 129        struct pci_slot *slot;
 130
 131        dev = pci_alloc_dev(bus);
 132        if (!dev)
 133                return NULL;
 134        type = of_get_property(node, "device_type", NULL);
 135        if (type == NULL)
 136                type = "";
 137
 138        pr_debug("    create device, devfn: %x, type: %s\n", devfn, type);
 139
 140        dev->dev.of_node = of_node_get(node);
 141        dev->dev.parent = bus->bridge;
 142        dev->dev.bus = &pci_bus_type;
 143        dev->devfn = devfn;
 144        dev->multifunction = 0;         /* maybe a lie? */
 145        dev->needs_freset = 0;          /* pcie fundamental reset required */
 146        set_pcie_port_type(dev);
 147
 148        list_for_each_entry(slot, &dev->bus->slots, list)
 149                if (PCI_SLOT(dev->devfn) == slot->number)
 150                        dev->slot = slot;
 151
 152        dev->vendor = get_int_prop(node, "vendor-id", 0xffff);
 153        dev->device = get_int_prop(node, "device-id", 0xffff);
 154        dev->subsystem_vendor = get_int_prop(node, "subsystem-vendor-id", 0);
 155        dev->subsystem_device = get_int_prop(node, "subsystem-id", 0);
 156
 157        dev->cfg_size = pci_cfg_space_size(dev);
 158
 159        dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
 160                dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
 161        dev->class = get_int_prop(node, "class-code", 0);
 162        dev->revision = get_int_prop(node, "revision-id", 0);
 163
 164        pr_debug("    class: 0x%x\n", dev->class);
 165        pr_debug("    revision: 0x%x\n", dev->revision);
 166
 167        dev->current_state = PCI_UNKNOWN;       /* unknown power state */
 168        dev->error_state = pci_channel_io_normal;
 169        dev->dma_mask = 0xffffffff;
 170
 171        /* Early fixups, before probing the BARs */
 172        pci_fixup_device(pci_fixup_early, dev);
 173
 174        if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
 175                /* a PCI-PCI bridge */
 176                dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
 177                dev->rom_base_reg = PCI_ROM_ADDRESS1;
 178                set_pcie_hotplug_bridge(dev);
 179        } else if (!strcmp(type, "cardbus")) {
 180                dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
 181        } else {
 182                dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
 183                dev->rom_base_reg = PCI_ROM_ADDRESS;
 184                /* Maybe do a default OF mapping here */
 185                dev->irq = NO_IRQ;
 186        }
 187
 188        of_pci_parse_addrs(node, dev);
 189
 190        pr_debug("    adding to system ...\n");
 191
 192        pci_device_add(dev, bus);
 193
 194        return dev;
 195}
 196EXPORT_SYMBOL(of_create_pci_dev);
 197
 198/**
 199 * of_scan_pci_bridge - Set up a PCI bridge and scan for child nodes
 200 * @dev: pci_dev structure for the bridge
 201 *
 202 * of_scan_bus() calls this routine for each PCI bridge that it finds, and
 203 * this routine in turn call of_scan_bus() recusively to scan for more child
 204 * devices.
 205 */
 206void of_scan_pci_bridge(struct pci_dev *dev)
 207{
 208        struct device_node *node = dev->dev.of_node;
 209        struct pci_bus *bus;
 210        const u32 *busrange, *ranges;
 211        int len, i, mode;
 212        struct pci_bus_region region;
 213        struct resource *res;
 214        unsigned int flags;
 215        u64 size;
 216
 217        pr_debug("of_scan_pci_bridge(%s)\n", node->full_name);
 218
 219        /* parse bus-range property */
 220        busrange = of_get_property(node, "bus-range", &len);
 221        if (busrange == NULL || len != 8) {
 222                printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %s\n",
 223                       node->full_name);
 224                return;
 225        }
 226        ranges = of_get_property(node, "ranges", &len);
 227        if (ranges == NULL) {
 228                printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %s\n",
 229                       node->full_name);
 230                return;
 231        }
 232
 233        bus = pci_find_bus(pci_domain_nr(dev->bus), busrange[0]);
 234        if (!bus) {
 235                bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
 236                if (!bus) {
 237                        printk(KERN_ERR "Failed to create pci bus for %s\n",
 238                               node->full_name);
 239                        return;
 240                }
 241        }
 242
 243        bus->primary = dev->bus->number;
 244        pci_bus_insert_busn_res(bus, busrange[0], busrange[1]);
 245        bus->bridge_ctl = 0;
 246
 247        /* parse ranges property */
 248        /* PCI #address-cells == 3 and #size-cells == 2 always */
 249        res = &dev->resource[PCI_BRIDGE_RESOURCES];
 250        for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
 251                res->flags = 0;
 252                bus->resource[i] = res;
 253                ++res;
 254        }
 255        i = 1;
 256        for (; len >= 32; len -= 32, ranges += 8) {
 257                flags = pci_parse_of_flags(ranges[0], 1);
 258                size = of_read_number(&ranges[6], 2);
 259                if (flags == 0 || size == 0)
 260                        continue;
 261                if (flags & IORESOURCE_IO) {
 262                        res = bus->resource[0];
 263                        if (res->flags) {
 264                                printk(KERN_ERR "PCI: ignoring extra I/O range"
 265                                       " for bridge %s\n", node->full_name);
 266                                continue;
 267                        }
 268                } else {
 269                        if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
 270                                printk(KERN_ERR "PCI: too many memory ranges"
 271                                       " for bridge %s\n", node->full_name);
 272                                continue;
 273                        }
 274                        res = bus->resource[i];
 275                        ++i;
 276                }
 277                res->flags = flags;
 278                region.start = of_read_number(&ranges[1], 2);
 279                region.end = region.start + size - 1;
 280                pcibios_bus_to_resource(dev, res, &region);
 281        }
 282        sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
 283                bus->number);
 284        pr_debug("    bus name: %s\n", bus->name);
 285
 286        mode = PCI_PROBE_NORMAL;
 287        if (ppc_md.pci_probe_mode)
 288                mode = ppc_md.pci_probe_mode(bus);
 289        pr_debug("    probe mode: %d\n", mode);
 290
 291        if (mode == PCI_PROBE_DEVTREE)
 292                of_scan_bus(node, bus);
 293        else if (mode == PCI_PROBE_NORMAL)
 294                pci_scan_child_bus(bus);
 295}
 296EXPORT_SYMBOL(of_scan_pci_bridge);
 297
 298static struct pci_dev *of_scan_pci_dev(struct pci_bus *bus,
 299                            struct device_node *dn)
 300{
 301        struct pci_dev *dev = NULL;
 302        const u32 *reg;
 303        int reglen, devfn;
 304
 305        pr_debug("  * %s\n", dn->full_name);
 306        if (!of_device_is_available(dn))
 307                return NULL;
 308
 309        reg = of_get_property(dn, "reg", &reglen);
 310        if (reg == NULL || reglen < 20)
 311                return NULL;
 312        devfn = (reg[0] >> 8) & 0xff;
 313
 314        /* Check if the PCI device is already there */
 315        dev = pci_get_slot(bus, devfn);
 316        if (dev) {
 317                pci_dev_put(dev);
 318                return dev;
 319        }
 320
 321        /* create a new pci_dev for this device */
 322        dev = of_create_pci_dev(dn, bus, devfn);
 323        if (!dev)
 324                return NULL;
 325
 326        pr_debug("  dev header type: %x\n", dev->hdr_type);
 327        return dev;
 328}
 329
 330/**
 331 * __of_scan_bus - given a PCI bus node, setup bus and scan for child devices
 332 * @node: device tree node for the PCI bus
 333 * @bus: pci_bus structure for the PCI bus
 334 * @rescan_existing: Flag indicating bus has already been set up
 335 */
 336static void __of_scan_bus(struct device_node *node, struct pci_bus *bus,
 337                          int rescan_existing)
 338{
 339        struct device_node *child;
 340        struct pci_dev *dev;
 341
 342        pr_debug("of_scan_bus(%s) bus no %d...\n",
 343                 node->full_name, bus->number);
 344
 345        /* Scan direct children */
 346        for_each_child_of_node(node, child) {
 347                dev = of_scan_pci_dev(bus, child);
 348                if (!dev)
 349                        continue;
 350                pr_debug("    dev header type: %x\n", dev->hdr_type);
 351        }
 352
 353        /* Apply all fixups necessary. We don't fixup the bus "self"
 354         * for an existing bridge that is being rescanned
 355         */
 356        if (!rescan_existing)
 357                pcibios_setup_bus_self(bus);
 358        pcibios_setup_bus_devices(bus);
 359
 360        /* Now scan child busses */
 361        list_for_each_entry(dev, &bus->devices, bus_list) {
 362                if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
 363                    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
 364                        of_scan_pci_bridge(dev);
 365                }
 366        }
 367}
 368
 369/**
 370 * of_scan_bus - given a PCI bus node, setup bus and scan for child devices
 371 * @node: device tree node for the PCI bus
 372 * @bus: pci_bus structure for the PCI bus
 373 */
 374void of_scan_bus(struct device_node *node, struct pci_bus *bus)
 375{
 376        __of_scan_bus(node, bus, 0);
 377}
 378EXPORT_SYMBOL_GPL(of_scan_bus);
 379
 380/**
 381 * of_rescan_bus - given a PCI bus node, scan for child devices
 382 * @node: device tree node for the PCI bus
 383 * @bus: pci_bus structure for the PCI bus
 384 *
 385 * Same as of_scan_bus, but for a pci_bus structure that has already been
 386 * setup.
 387 */
 388void of_rescan_bus(struct device_node *node, struct pci_bus *bus)
 389{
 390        __of_scan_bus(node, bus, 1);
 391}
 392EXPORT_SYMBOL_GPL(of_rescan_bus);
 393
 394