LXR linux/arch/powerpc/platforms/cell/qpace

   1/*
   2 *  linux/arch/powerpc/platforms/cell/qpace_setup.c
   3 *
   4 *  Copyright (C) 1995  Linus Torvalds
   5 *  Adapted from 'alpha' version by Gary Thomas
   6 *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7 *  Modified by PPC64 Team, IBM Corp
   8 *  Modified by Cell Team, IBM Deutschland Entwicklung GmbH
   9 *  Modified by Benjamin Krill <ben@codiert.org>, IBM Corp.
  10 *
  11 * This program is free software; you can redistribute it and/or
  12 * modify it under the terms of the GNU General Public License
  13 * as published by the Free Software Foundation; either version
  14 * 2 of the License, or (at your option) any later version.
  15 */
  16
  17#include <linux/sched.h>
  18#include <linux/kernel.h>
  19#include <linux/init.h>
  20#include <linux/export.h>
  21#include <linux/delay.h>
  22#include <linux/irq.h>
  23#include <linux/console.h>
  24#include <linux/of_platform.h>
  25
  26#include <asm/mmu.h>
  27#include <asm/processor.h>
  28#include <asm/io.h>
  29#include <asm/kexec.h>
  30#include <asm/pgtable.h>
  31#include <asm/prom.h>
  32#include <asm/rtas.h>
  33#include <asm/dma.h>
  34#include <asm/machdep.h>
  35#include <asm/time.h>
  36#include <asm/cputable.h>
  37#include <asm/irq.h>
  38#include <asm/spu.h>
  39#include <asm/spu_priv1.h>
  40#include <asm/udbg.h>
  41#include <asm/cell-regs.h>
  42
  43#include "interrupt.h"
  44#include "pervasive.h"
  45#include "ras.h"
  46
  47static void qpace_show_cpuinfo(struct seq_file *m)
  48{
  49        struct device_node *root;
  50        const char *model = "";
  51
  52        root = of_find_node_by_path("/");
  53        if (root)
  54                model = of_get_property(root, "model", NULL);
  55        seq_printf(m, "machine\t\t: CHRP %s\n", model);
  56        of_node_put(root);
  57}
  58
  59static void qpace_progress(char *s, unsigned short hex)
  60{
  61        printk("*** %04x : %s\n", hex, s ? s : "");
  62}
  63
  64static const struct of_device_id qpace_bus_ids[] __initconst = {
  65        { .type = "soc", },
  66        { .compatible = "soc", },
  67        { .type = "spider", },
  68        { .type = "axon", },
  69        { .type = "plb5", },
  70        { .type = "plb4", },
  71        { .type = "opb", },
  72        { .type = "ebc", },
  73        {},
  74};
  75
  76static int __init qpace_publish_devices(void)
  77{
  78        int node;
  79
  80        /* Publish OF platform devices for southbridge IOs */
  81        of_platform_bus_probe(NULL, qpace_bus_ids, NULL);
  82
  83        /* There is no device for the MIC memory controller, thus we create
  84         * a platform device for it to attach the EDAC driver to.
  85         */
  86        for_each_online_node(node) {
  87                if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL)
  88                        continue;
  89                platform_device_register_simple("cbe-mic", node, NULL, 0);
  90        }
  91
  92        return 0;
  93}
  94machine_subsys_initcall(qpace, qpace_publish_devices);
  95
  96static void __init qpace_setup_arch(void)
  97{
  98#ifdef CONFIG_SPU_BASE
  99        spu_priv1_ops = &spu_priv1_mmio_ops;
 100        spu_management_ops = &spu_management_of_ops;
 101#endif
 102
 103        cbe_regs_init();
 104
 105#ifdef CONFIG_CBE_RAS
 106        cbe_ras_init();
 107#endif
 108
 109#ifdef CONFIG_SMP
 110        smp_init_cell();
 111#endif
 112
 113        /* init to some ~sane value until calibrate_delay() runs */
 114        loops_per_jiffy = 50000000;
 115
 116        cbe_pervasive_init();
 117#ifdef CONFIG_DUMMY_CONSOLE
 118        conswitchp = &dummy_con;
 119#endif
 120}
 121
 122static int __init qpace_probe(void)
 123{
 124        unsigned long root = of_get_flat_dt_root();
 125
 126        if (!of_flat_dt_is_compatible(root, "IBM,QPACE"))
 127                return 0;
 128
 129        hpte_init_native();
 130
 131        return 1;
 132}
 133
 134define_machine(qpace) {
 135        .name                   = "QPACE",
 136        .probe                  = qpace_probe,
 137        .setup_arch             = qpace_setup_arch,
 138        .show_cpuinfo           = qpace_show_cpuinfo,
 139        .restart                = rtas_restart,
 140        .power_off              = rtas_power_off,
 141        .halt                   = rtas_halt,
 142        .get_boot_time          = rtas_get_boot_time,
 143        .get_rtc_time           = rtas_get_rtc_time,
 144        .set_rtc_time           = rtas_set_rtc_time,
 145        .calibrate_decr         = generic_calibrate_decr,
 146        .progress               = qpace_progress,
 147        .init_IRQ               = iic_init_IRQ,
 148};
 149