LXR linux/arch/sh/drivers/pci/ops-sh5.c

   1/*
   2 * Support functions for the SH5 PCI hardware.
   3 *
   4 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
   5 * Copyright (C) 2003, 2004 Paul Mundt
   6 * Copyright (C) 2004 Richard Curnow
   7 *
   8 * May be copied or modified under the terms of the GNU General Public
   9 * License.  See linux/COPYING for more information.
  10 */
  11#include <linux/kernel.h>
  12#include <linux/rwsem.h>
  13#include <linux/smp.h>
  14#include <linux/interrupt.h>
  15#include <linux/init.h>
  16#include <linux/errno.h>
  17#include <linux/pci.h>
  18#include <linux/delay.h>
  19#include <linux/types.h>
  20#include <linux/irq.h>
  21#include <asm/pci.h>
  22#include <asm/io.h>
  23#include "pci-sh5.h"
  24
  25static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  26                        int size, u32 *val)
  27{
  28        SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
  29
  30        switch (size) {
  31                case 1:
  32                        *val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3));
  33                        break;
  34                case 2:
  35                        *val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2));
  36                        break;
  37                case 4:
  38                        *val = SH5PCI_READ(PDR);
  39                        break;
  40        }
  41
  42        return PCIBIOS_SUCCESSFUL;
  43}
  44
  45static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  46                         int size, u32 val)
  47{
  48        SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
  49
  50        switch (size) {
  51                case 1:
  52                        SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val);
  53                        break;
  54                case 2:
  55                        SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val);
  56                        break;
  57                case 4:
  58                        SH5PCI_WRITE(PDR, val);
  59                        break;
  60        }
  61
  62        return PCIBIOS_SUCCESSFUL;
  63}
  64
  65struct pci_ops sh5_pci_ops = {
  66        .read           = sh5pci_read,
  67        .write          = sh5pci_write,
  68};
  69