LXR linux/arch/sh/kernel/cpu/sh5/setup-sh5.c

   1/*
   2 * SH5-101/SH5-103 CPU Setup
   3 *
   4 *  Copyright (C) 2009  Paul Mundt
   5 *
   6 * This file is subject to the terms and conditions of the GNU General Public
   7 * License.  See the file "COPYING" in the main directory of this archive
   8 * for more details.
   9 */
  10#include <linux/platform_device.h>
  11#include <linux/init.h>
  12#include <linux/serial.h>
  13#include <linux/serial_sci.h>
  14#include <linux/io.h>
  15#include <linux/mm.h>
  16#include <linux/sh_timer.h>
  17#include <asm/addrspace.h>
  18
  19static struct plat_sci_port scif0_platform_data = {
  20        .mapbase        = PHYS_PERIPHERAL_BLOCK + 0x01030000,
  21        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  22        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
  23        .scbrr_algo_id  = SCBRR_ALGO_2,
  24        .type           = PORT_SCIF,
  25        .irqs           = { 39, 40, 42, 0 },
  26};
  27
  28static struct platform_device scif0_device = {
  29        .name           = "sh-sci",
  30        .id             = 0,
  31        .dev            = {
  32                .platform_data  = &scif0_platform_data,
  33        },
  34};
  35
  36static struct resource rtc_resources[] = {
  37        [0] = {
  38                .start  = PHYS_PERIPHERAL_BLOCK + 0x01040000,
  39                .end    = PHYS_PERIPHERAL_BLOCK + 0x01040000 + 0x58 - 1,
  40                .flags  = IORESOURCE_IO,
  41        },
  42        [1] = {
  43                /* Period IRQ */
  44                .start  = IRQ_PRI,
  45                .flags  = IORESOURCE_IRQ,
  46        },
  47        [2] = {
  48                /* Carry IRQ */
  49                .start  = IRQ_CUI,
  50                .flags  = IORESOURCE_IRQ,
  51        },
  52        [3] = {
  53                /* Alarm IRQ */
  54                .start  = IRQ_ATI,
  55                .flags  = IORESOURCE_IRQ,
  56        },
  57};
  58
  59static struct platform_device rtc_device = {
  60        .name           = "sh-rtc",
  61        .id             = -1,
  62        .num_resources  = ARRAY_SIZE(rtc_resources),
  63        .resource       = rtc_resources,
  64};
  65
  66#define TMU_BLOCK_OFF   0x01020000
  67#define TMU_BASE        PHYS_PERIPHERAL_BLOCK + TMU_BLOCK_OFF
  68#define TMU0_BASE       (TMU_BASE + 0x8 + (0xc * 0x0))
  69#define TMU1_BASE       (TMU_BASE + 0x8 + (0xc * 0x1))
  70#define TMU2_BASE       (TMU_BASE + 0x8 + (0xc * 0x2))
  71
  72static struct sh_timer_config tmu0_platform_data = {
  73        .channel_offset = 0x04,
  74        .timer_bit = 0,
  75        .clockevent_rating = 200,
  76};
  77
  78static struct resource tmu0_resources[] = {
  79        [0] = {
  80                .start  = TMU0_BASE,
  81                .end    = TMU0_BASE + 0xc - 1,
  82                .flags  = IORESOURCE_MEM,
  83        },
  84        [1] = {
  85                .start  = IRQ_TUNI0,
  86                .flags  = IORESOURCE_IRQ,
  87        },
  88};
  89
  90static struct platform_device tmu0_device = {
  91        .name           = "sh_tmu",
  92        .id             = 0,
  93        .dev = {
  94                .platform_data  = &tmu0_platform_data,
  95        },
  96        .resource       = tmu0_resources,
  97        .num_resources  = ARRAY_SIZE(tmu0_resources),
  98};
  99
 100static struct sh_timer_config tmu1_platform_data = {
 101        .channel_offset = 0x10,
 102        .timer_bit = 1,
 103        .clocksource_rating = 200,
 104};
 105
 106static struct resource tmu1_resources[] = {
 107        [0] = {
 108                .start  = TMU1_BASE,
 109                .end    = TMU1_BASE + 0xc - 1,
 110                .flags  = IORESOURCE_MEM,
 111        },
 112        [1] = {
 113                .start  = IRQ_TUNI1,
 114                .flags  = IORESOURCE_IRQ,
 115        },
 116};
 117
 118static struct platform_device tmu1_device = {
 119        .name           = "sh_tmu",
 120        .id             = 1,
 121        .dev = {
 122                .platform_data  = &tmu1_platform_data,
 123        },
 124        .resource       = tmu1_resources,
 125        .num_resources  = ARRAY_SIZE(tmu1_resources),
 126};
 127
 128static struct sh_timer_config tmu2_platform_data = {
 129        .channel_offset = 0x1c,
 130        .timer_bit = 2,
 131};
 132
 133static struct resource tmu2_resources[] = {
 134        [0] = {
 135                .start  = TMU2_BASE,
 136                .end    = TMU2_BASE + 0xc - 1,
 137                .flags  = IORESOURCE_MEM,
 138        },
 139        [1] = {
 140                .start  = IRQ_TUNI2,
 141                .flags  = IORESOURCE_IRQ,
 142        },
 143};
 144
 145static struct platform_device tmu2_device = {
 146        .name           = "sh_tmu",
 147        .id             = 2,
 148        .dev = {
 149                .platform_data  = &tmu2_platform_data,
 150        },
 151        .resource       = tmu2_resources,
 152        .num_resources  = ARRAY_SIZE(tmu2_resources),
 153};
 154
 155static struct platform_device *sh5_early_devices[] __initdata = {
 156        &scif0_device,
 157        &tmu0_device,
 158        &tmu1_device,
 159        &tmu2_device,
 160};
 161
 162static struct platform_device *sh5_devices[] __initdata = {
 163        &rtc_device,
 164};
 165
 166static int __init sh5_devices_setup(void)
 167{
 168        int ret;
 169
 170        ret = platform_add_devices(sh5_early_devices,
 171                                   ARRAY_SIZE(sh5_early_devices));
 172        if (unlikely(ret != 0))
 173                return ret;
 174
 175        return platform_add_devices(sh5_devices,
 176                                    ARRAY_SIZE(sh5_devices));
 177}
 178arch_initcall(sh5_devices_setup);
 179
 180void __init plat_early_device_setup(void)
 181{
 182        early_platform_add_devices(sh5_early_devices,
 183                                   ARRAY_SIZE(sh5_early_devices));
 184}
 185