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29#define pr_fmt(fmt) "summit: %s: " fmt, __func__
30
31#include <linux/mm.h>
32#include <linux/init.h>
33#include <asm/io.h>
34#include <asm/bios_ebda.h>
35
36
37
38
39#include <linux/threads.h>
40#include <linux/cpumask.h>
41#include <asm/mpspec.h>
42#include <asm/apic.h>
43#include <asm/smp.h>
44#include <asm/fixmap.h>
45#include <asm/apicdef.h>
46#include <asm/ipi.h>
47#include <linux/kernel.h>
48#include <linux/string.h>
49#include <linux/gfp.h>
50#include <linux/smp.h>
51
52static unsigned summit_get_apic_id(unsigned long x)
53{
54 return (x >> 24) & 0xFF;
55}
56
57static inline void summit_send_IPI_mask(const struct cpumask *mask, int vector)
58{
59 default_send_IPI_mask_sequence_logical(mask, vector);
60}
61
62static void summit_send_IPI_allbutself(int vector)
63{
64 default_send_IPI_mask_allbutself_logical(cpu_online_mask, vector);
65}
66
67static void summit_send_IPI_all(int vector)
68{
69 summit_send_IPI_mask(cpu_online_mask, vector);
70}
71
72#include <asm/tsc.h>
73
74extern int use_cyclone;
75
76#ifdef CONFIG_X86_SUMMIT_NUMA
77static void setup_summit(void);
78#else
79static inline void setup_summit(void) {}
80#endif
81
82static int summit_mps_oem_check(struct mpc_table *mpc, char *oem,
83 char *productid)
84{
85 if (!strncmp(oem, "IBM ENSW", 8) &&
86 (!strncmp(productid, "VIGIL SMP", 9)
87 || !strncmp(productid, "EXA", 3)
88 || !strncmp(productid, "RUTHLESS SMP", 12))){
89 mark_tsc_unstable("Summit based system");
90 use_cyclone = 1;
91 setup_summit();
92 return 1;
93 }
94 return 0;
95}
96
97
98static int summit_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
99{
100 if (!strncmp(oem_id, "IBM", 3) &&
101 (!strncmp(oem_table_id, "SERVIGIL", 8)
102 || !strncmp(oem_table_id, "EXA", 3))){
103 mark_tsc_unstable("Summit based system");
104 use_cyclone = 1;
105 setup_summit();
106 return 1;
107 }
108 return 0;
109}
110
111struct rio_table_hdr {
112 unsigned char version;
113
114 unsigned char num_scal_dev;
115 unsigned char num_rio_dev;
116} __attribute__((packed));
117
118struct scal_detail {
119 unsigned char node_id;
120 unsigned long CBAR;
121 unsigned char port0node;
122 unsigned char port0port;
123 unsigned char port1node;
124 unsigned char port1port;
125 unsigned char port2node;
126 unsigned char port2port;
127 unsigned char chassis_num;
128} __attribute__((packed));
129
130struct rio_detail {
131 unsigned char node_id;
132 unsigned long BBAR;
133 unsigned char type;
134 unsigned char owner_id;
135
136 unsigned char port0node;
137 unsigned char port0port;
138 unsigned char port1node;
139 unsigned char port1port;
140 unsigned char first_slot;
141
142 unsigned char status;
143
144
145
146
147 unsigned char WP_index;
148
149
150 unsigned char chassis_num;
151
152
153
154
155
156
157
158} __attribute__((packed));
159
160
161typedef enum {
162 CompatTwister = 0,
163 AltTwister = 1,
164 CompatCyclone = 2,
165 AltCyclone = 3,
166 CompatWPEG = 4,
167 AltWPEG = 5,
168 LookOutAWPEG = 6,
169 LookOutBWPEG = 7,
170} node_type;
171
172static inline int is_WPEG(struct rio_detail *rio){
173 return (rio->type == CompatWPEG || rio->type == AltWPEG ||
174 rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
175}
176
177#define SUMMIT_APIC_DFR_VALUE (APIC_DFR_CLUSTER)
178
179static const struct cpumask *summit_target_cpus(void)
180{
181
182
183
184
185 return cpumask_of(0);
186}
187
188static unsigned long summit_check_apicid_used(physid_mask_t *map, int apicid)
189{
190 return 0;
191}
192
193
194static unsigned long summit_check_apicid_present(int bit)
195{
196 return 1;
197}
198
199static int summit_early_logical_apicid(int cpu)
200{
201 int count = 0;
202 u8 my_id = early_per_cpu(x86_cpu_to_apicid, cpu);
203 u8 my_cluster = APIC_CLUSTER(my_id);
204#ifdef CONFIG_SMP
205 u8 lid;
206 int i;
207
208
209 for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
210 lid = early_per_cpu(x86_cpu_to_logical_apicid, i);
211 if (lid != BAD_APICID && APIC_CLUSTER(lid) == my_cluster)
212 ++count;
213 }
214#endif
215
216
217 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
218 return my_cluster | (1UL << count);
219}
220
221static void summit_init_apic_ldr(void)
222{
223 int cpu = smp_processor_id();
224 unsigned long id = early_per_cpu(x86_cpu_to_logical_apicid, cpu);
225 unsigned long val;
226
227 apic_write(APIC_DFR, SUMMIT_APIC_DFR_VALUE);
228 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
229 val |= SET_APIC_LOGICAL_ID(id);
230 apic_write(APIC_LDR, val);
231}
232
233static int summit_apic_id_registered(void)
234{
235 return 1;
236}
237
238static void summit_setup_apic_routing(void)
239{
240 pr_info("Enabling APIC mode: Summit. Using %d I/O APICs\n",
241 nr_ioapics);
242}
243
244static int summit_cpu_present_to_apicid(int mps_cpu)
245{
246 if (mps_cpu < nr_cpu_ids)
247 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
248 else
249 return BAD_APICID;
250}
251
252static void summit_ioapic_phys_id_map(physid_mask_t *phys_id_map, physid_mask_t *retmap)
253{
254
255 physids_promote(0x0FL, retmap);
256}
257
258static void summit_apicid_to_cpu_present(int apicid, physid_mask_t *retmap)
259{
260 physid_set_mask_of_physid(0, retmap);
261}
262
263static int summit_check_phys_apicid_present(int physical_apicid)
264{
265 return 1;
266}
267
268static inline int
269summit_cpu_mask_to_apicid(const struct cpumask *cpumask, unsigned int *dest_id)
270{
271 unsigned int round = 0;
272 unsigned int cpu, apicid = 0;
273
274
275
276
277 for_each_cpu_and(cpu, cpumask, cpu_online_mask) {
278 int new_apicid = early_per_cpu(x86_cpu_to_logical_apicid, cpu);
279
280 if (round && APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) {
281 pr_err("Not a valid mask!\n");
282 return -EINVAL;
283 }
284 apicid |= new_apicid;
285 round++;
286 }
287 if (!round)
288 return -EINVAL;
289 *dest_id = apicid;
290 return 0;
291}
292
293static int
294summit_cpu_mask_to_apicid_and(const struct cpumask *inmask,
295 const struct cpumask *andmask,
296 unsigned int *apicid)
297{
298 cpumask_var_t cpumask;
299 *apicid = early_per_cpu(x86_cpu_to_logical_apicid, 0);
300
301 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
302 return 0;
303
304 cpumask_and(cpumask, inmask, andmask);
305 summit_cpu_mask_to_apicid(cpumask, apicid);
306
307 free_cpumask_var(cpumask);
308
309 return 0;
310}
311
312
313
314
315
316
317
318
319static int summit_phys_pkg_id(int cpuid_apic, int index_msb)
320{
321 return hard_smp_processor_id() >> index_msb;
322}
323
324static int probe_summit(void)
325{
326
327 return 0;
328}
329
330#ifdef CONFIG_X86_SUMMIT_NUMA
331static struct rio_table_hdr *rio_table_hdr;
332static struct scal_detail *scal_devs[MAX_NUMNODES];
333static struct rio_detail *rio_devs[MAX_NUMNODES*4];
334
335#ifndef CONFIG_X86_NUMAQ
336static int mp_bus_id_to_node[MAX_MP_BUSSES];
337#endif
338
339static int setup_pci_node_map_for_wpeg(int wpeg_num, int last_bus)
340{
341 int twister = 0, node = 0;
342 int i, bus, num_buses;
343
344 for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
345 if (rio_devs[i]->node_id == rio_devs[wpeg_num]->owner_id) {
346 twister = rio_devs[i]->owner_id;
347 break;
348 }
349 }
350 if (i == rio_table_hdr->num_rio_dev) {
351 pr_err("Couldn't find owner Cyclone for Winnipeg!\n");
352 return last_bus;
353 }
354
355 for (i = 0; i < rio_table_hdr->num_scal_dev; i++) {
356 if (scal_devs[i]->node_id == twister) {
357 node = scal_devs[i]->node_id;
358 break;
359 }
360 }
361 if (i == rio_table_hdr->num_scal_dev) {
362 pr_err("Couldn't find owner Twister for Cyclone!\n");
363 return last_bus;
364 }
365
366 switch (rio_devs[wpeg_num]->type) {
367 case CompatWPEG:
368
369
370
371
372
373 num_buses = 5;
374 break;
375 case AltWPEG:
376
377
378
379
380
381 num_buses = 7;
382 break;
383 case LookOutAWPEG:
384 case LookOutBWPEG:
385
386
387
388
389 num_buses = 9;
390 break;
391 default:
392 pr_info("Unsupported Winnipeg type!\n");
393 return last_bus;
394 }
395
396 for (bus = last_bus; bus < last_bus + num_buses; bus++)
397 mp_bus_id_to_node[bus] = node;
398 return bus;
399}
400
401static int build_detail_arrays(void)
402{
403 unsigned long ptr;
404 int i, scal_detail_size, rio_detail_size;
405
406 if (rio_table_hdr->num_scal_dev > MAX_NUMNODES) {
407 pr_warn("MAX_NUMNODES too low! Defined as %d, but system has %d nodes\n",
408 MAX_NUMNODES, rio_table_hdr->num_scal_dev);
409 return 0;
410 }
411
412 switch (rio_table_hdr->version) {
413 default:
414 pr_warn("Invalid Rio Grande Table Version: %d\n",
415 rio_table_hdr->version);
416 return 0;
417 case 2:
418 scal_detail_size = 11;
419 rio_detail_size = 13;
420 break;
421 case 3:
422 scal_detail_size = 12;
423 rio_detail_size = 15;
424 break;
425 }
426
427 ptr = (unsigned long)rio_table_hdr + 3;
428 for (i = 0; i < rio_table_hdr->num_scal_dev; i++, ptr += scal_detail_size)
429 scal_devs[i] = (struct scal_detail *)ptr;
430
431 for (i = 0; i < rio_table_hdr->num_rio_dev; i++, ptr += rio_detail_size)
432 rio_devs[i] = (struct rio_detail *)ptr;
433
434 return 1;
435}
436
437void setup_summit(void)
438{
439 unsigned long ptr;
440 unsigned short offset;
441 int i, next_wpeg, next_bus = 0;
442
443
444 ptr = get_bios_ebda();
445 ptr = (unsigned long)phys_to_virt(ptr);
446
447 rio_table_hdr = NULL;
448 offset = 0x180;
449 while (offset) {
450
451 if (*((unsigned short *)(ptr + offset + 2)) == 0x4752) {
452
453 rio_table_hdr = (struct rio_table_hdr *)(ptr + offset + 4);
454 break;
455 }
456
457 offset = *((unsigned short *)(ptr + offset));
458 }
459 if (!rio_table_hdr) {
460 pr_err("Unable to locate Rio Grande Table in EBDA - bailing!\n");
461 return;
462 }
463
464 if (!build_detail_arrays())
465 return;
466
467
468 next_wpeg = 0;
469 do {
470 for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
471 if (is_WPEG(rio_devs[i]) && rio_devs[i]->WP_index == next_wpeg) {
472
473 next_bus = setup_pci_node_map_for_wpeg(i, next_bus);
474 next_wpeg++;
475 break;
476 }
477 }
478
479
480
481
482
483 if (i == rio_table_hdr->num_rio_dev)
484 next_wpeg = 0;
485 } while (next_wpeg != 0);
486}
487#endif
488
489static struct apic apic_summit = {
490
491 .name = "summit",
492 .probe = probe_summit,
493 .acpi_madt_oem_check = summit_acpi_madt_oem_check,
494 .apic_id_valid = default_apic_id_valid,
495 .apic_id_registered = summit_apic_id_registered,
496
497 .irq_delivery_mode = dest_LowestPrio,
498
499 .irq_dest_mode = 1,
500
501 .target_cpus = summit_target_cpus,
502 .disable_esr = 1,
503 .dest_logical = APIC_DEST_LOGICAL,
504 .check_apicid_used = summit_check_apicid_used,
505 .check_apicid_present = summit_check_apicid_present,
506
507 .vector_allocation_domain = flat_vector_allocation_domain,
508 .init_apic_ldr = summit_init_apic_ldr,
509
510 .ioapic_phys_id_map = summit_ioapic_phys_id_map,
511 .setup_apic_routing = summit_setup_apic_routing,
512 .multi_timer_check = NULL,
513 .cpu_present_to_apicid = summit_cpu_present_to_apicid,
514 .apicid_to_cpu_present = summit_apicid_to_cpu_present,
515 .setup_portio_remap = NULL,
516 .check_phys_apicid_present = summit_check_phys_apicid_present,
517 .enable_apic_mode = NULL,
518 .phys_pkg_id = summit_phys_pkg_id,
519 .mps_oem_check = summit_mps_oem_check,
520
521 .get_apic_id = summit_get_apic_id,
522 .set_apic_id = NULL,
523 .apic_id_mask = 0xFF << 24,
524
525 .cpu_mask_to_apicid_and = summit_cpu_mask_to_apicid_and,
526
527 .send_IPI_mask = summit_send_IPI_mask,
528 .send_IPI_mask_allbutself = NULL,
529 .send_IPI_allbutself = summit_send_IPI_allbutself,
530 .send_IPI_all = summit_send_IPI_all,
531 .send_IPI_self = default_send_IPI_self,
532
533 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
534 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
535
536 .wait_for_init_deassert = default_wait_for_init_deassert,
537
538 .smp_callin_clear_local_apic = NULL,
539 .inquire_remote_apic = default_inquire_remote_apic,
540
541 .read = native_apic_mem_read,
542 .write = native_apic_mem_write,
543 .eoi_write = native_apic_mem_write,
544 .icr_read = native_apic_icr_read,
545 .icr_write = native_apic_icr_write,
546 .wait_icr_idle = native_apic_wait_icr_idle,
547 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
548
549 .x86_32_early_logical_apicid = summit_early_logical_apicid,
550};
551
552apic_driver(apic_summit);
553