linux/arch/xtensa/platforms/xtfpga/setup.c
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   1/*
   2 *
   3 * arch/xtensa/platform/xtavnet/setup.c
   4 *
   5 * ...
   6 *
   7 * Authors:     Chris Zankel <chris@zankel.net>
   8 *              Joe Taylor <joe@tensilica.com>
   9 *
  10 * Copyright 2001 - 2006 Tensilica Inc.
  11 *
  12 * This program is free software; you can redistribute  it and/or modify it
  13 * under  the terms of  the GNU General  Public License as published by the
  14 * Free Software Foundation;  either version 2 of the  License, or (at your
  15 * option) any later version.
  16 *
  17 */
  18#include <linux/stddef.h>
  19#include <linux/kernel.h>
  20#include <linux/init.h>
  21#include <linux/errno.h>
  22#include <linux/reboot.h>
  23#include <linux/kdev_t.h>
  24#include <linux/types.h>
  25#include <linux/major.h>
  26#include <linux/console.h>
  27#include <linux/delay.h>
  28#include <linux/of.h>
  29
  30#include <asm/timex.h>
  31#include <asm/processor.h>
  32#include <asm/platform.h>
  33#include <asm/bootparam.h>
  34#include <platform/lcd.h>
  35#include <platform/hardware.h>
  36
  37void platform_halt(void)
  38{
  39        lcd_disp_at_pos(" HALT ", 0);
  40        local_irq_disable();
  41        while (1)
  42                cpu_relax();
  43}
  44
  45void platform_power_off(void)
  46{
  47        lcd_disp_at_pos("POWEROFF", 0);
  48        local_irq_disable();
  49        while (1)
  50                cpu_relax();
  51}
  52
  53void platform_restart(void)
  54{
  55        /* Flush and reset the mmu, simulate a processor reset, and
  56         * jump to the reset vector. */
  57
  58
  59        __asm__ __volatile__ ("movi     a2, 15\n\t"
  60                              "wsr      a2, icountlevel\n\t"
  61                              "movi     a2, 0\n\t"
  62                              "wsr      a2, icount\n\t"
  63#if XCHAL_NUM_IBREAK > 0
  64                              "wsr      a2, ibreakenable\n\t"
  65#endif
  66                              "wsr      a2, lcount\n\t"
  67                              "movi     a2, 0x1f\n\t"
  68                              "wsr      a2, ps\n\t"
  69                              "isync\n\t"
  70                              "jx       %0\n\t"
  71                              :
  72                              : "a" (XCHAL_RESET_VECTOR_VADDR)
  73                              : "a2"
  74                              );
  75
  76        /* control never gets here */
  77}
  78
  79void __init platform_setup(char **cmdline)
  80{
  81}
  82
  83#ifdef CONFIG_OF
  84
  85static void __init update_clock_frequency(struct device_node *node)
  86{
  87        struct property *newfreq;
  88        u32 freq;
  89
  90        if (!of_property_read_u32(node, "clock-frequency", &freq) && freq != 0)
  91                return;
  92
  93        newfreq = kzalloc(sizeof(*newfreq) + sizeof(u32), GFP_KERNEL);
  94        if (!newfreq)
  95                return;
  96        newfreq->value = newfreq + 1;
  97        newfreq->length = sizeof(freq);
  98        newfreq->name = kstrdup("clock-frequency", GFP_KERNEL);
  99        if (!newfreq->name) {
 100                kfree(newfreq);
 101                return;
 102        }
 103
 104        *(u32 *)newfreq->value = cpu_to_be32(*(u32 *)XTFPGA_CLKFRQ_VADDR);
 105        of_update_property(node, newfreq);
 106}
 107
 108#define MAC_LEN 6
 109static void __init update_local_mac(struct device_node *node)
 110{
 111        struct property *newmac;
 112        const u8* macaddr;
 113        int prop_len;
 114
 115        macaddr = of_get_property(node, "local-mac-address", &prop_len);
 116        if (macaddr == NULL || prop_len != MAC_LEN)
 117                return;
 118
 119        newmac = kzalloc(sizeof(*newmac) + MAC_LEN, GFP_KERNEL);
 120        if (newmac == NULL)
 121                return;
 122
 123        newmac->value = newmac + 1;
 124        newmac->length = MAC_LEN;
 125        newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
 126        if (newmac->name == NULL) {
 127                kfree(newmac);
 128                return;
 129        }
 130
 131        memcpy(newmac->value, macaddr, MAC_LEN);
 132        ((u8*)newmac->value)[5] = (*(u32*)DIP_SWITCHES_VADDR) & 0x3f;
 133        of_update_property(node, newmac);
 134}
 135
 136static int __init machine_setup(void)
 137{
 138        struct device_node *serial;
 139        struct device_node *eth = NULL;
 140
 141        for_each_compatible_node(serial, NULL, "ns16550a")
 142                update_clock_frequency(serial);
 143
 144        if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
 145                update_local_mac(eth);
 146        return 0;
 147}
 148arch_initcall(machine_setup);
 149
 150#endif
 151
 152/* early initialization */
 153
 154void __init platform_init(bp_tag_t *first)
 155{
 156}
 157
 158/* Heartbeat. */
 159
 160void platform_heartbeat(void)
 161{
 162}
 163
 164#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
 165
 166void __init platform_calibrate_ccount(void)
 167{
 168        long clk_freq = 0;
 169#ifdef CONFIG_OF
 170        struct device_node *cpu =
 171                of_find_compatible_node(NULL, NULL, "xtensa,cpu");
 172        if (cpu) {
 173                u32 freq;
 174                update_clock_frequency(cpu);
 175                if (!of_property_read_u32(cpu, "clock-frequency", &freq))
 176                        clk_freq = freq;
 177        }
 178#endif
 179        if (!clk_freq)
 180                clk_freq = *(long *)XTFPGA_CLKFRQ_VADDR;
 181
 182        ccount_freq = clk_freq;
 183}
 184
 185#endif
 186
 187#ifndef CONFIG_OF
 188
 189#include <linux/serial_8250.h>
 190#include <linux/if.h>
 191#include <net/ethoc.h>
 192
 193/*----------------------------------------------------------------------------
 194 *  Ethernet -- OpenCores Ethernet MAC (ethoc driver)
 195 */
 196
 197static struct resource ethoc_res[] __initdata = {
 198        [0] = { /* register space */
 199                .start = OETH_REGS_PADDR,
 200                .end   = OETH_REGS_PADDR + OETH_REGS_SIZE - 1,
 201                .flags = IORESOURCE_MEM,
 202        },
 203        [1] = { /* buffer space */
 204                .start = OETH_SRAMBUFF_PADDR,
 205                .end   = OETH_SRAMBUFF_PADDR + OETH_SRAMBUFF_SIZE - 1,
 206                .flags = IORESOURCE_MEM,
 207        },
 208        [2] = { /* IRQ number */
 209                .start = OETH_IRQ,
 210                .end   = OETH_IRQ,
 211                .flags = IORESOURCE_IRQ,
 212        },
 213};
 214
 215static struct ethoc_platform_data ethoc_pdata __initdata = {
 216        /*
 217         * The MAC address for these boards is 00:50:c2:13:6f:xx.
 218         * The last byte (here as zero) is read from the DIP switches on the
 219         * board.
 220         */
 221        .hwaddr = { 0x00, 0x50, 0xc2, 0x13, 0x6f, 0 },
 222        .phy_id = -1,
 223};
 224
 225static struct platform_device ethoc_device __initdata = {
 226        .name = "ethoc",
 227        .id = -1,
 228        .num_resources = ARRAY_SIZE(ethoc_res),
 229        .resource = ethoc_res,
 230        .dev = {
 231                .platform_data = &ethoc_pdata,
 232        },
 233};
 234
 235/*----------------------------------------------------------------------------
 236 *  UART
 237 */
 238
 239static struct resource serial_resource __initdata = {
 240        .start  = DUART16552_PADDR,
 241        .end    = DUART16552_PADDR + 0x1f,
 242        .flags  = IORESOURCE_MEM,
 243};
 244
 245static struct plat_serial8250_port serial_platform_data[] __initdata = {
 246        [0] = {
 247                .mapbase        = DUART16552_PADDR,
 248                .irq            = DUART16552_INTNUM,
 249                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 250                                  UPF_IOREMAP,
 251                .iotype         = UPIO_MEM32,
 252                .regshift       = 2,
 253                .uartclk        = 0,    /* set in xtavnet_init() */
 254        },
 255        { },
 256};
 257
 258static struct platform_device xtavnet_uart __initdata = {
 259        .name           = "serial8250",
 260        .id             = PLAT8250_DEV_PLATFORM,
 261        .dev            = {
 262                .platform_data  = serial_platform_data,
 263        },
 264        .num_resources  = 1,
 265        .resource       = &serial_resource,
 266};
 267
 268/* platform devices */
 269static struct platform_device *platform_devices[] __initdata = {
 270        &ethoc_device,
 271        &xtavnet_uart,
 272};
 273
 274
 275static int __init xtavnet_init(void)
 276{
 277        /* Ethernet MAC address.  */
 278        ethoc_pdata.hwaddr[5] = *(u32 *)DIP_SWITCHES_VADDR;
 279
 280        /* Clock rate varies among FPGA bitstreams; board specific FPGA register
 281         * reports the actual clock rate.
 282         */
 283        serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR;
 284
 285
 286        /* register platform devices */
 287        platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 288
 289        /* ETHOC driver is a bit quiet; at least display Ethernet MAC, so user
 290         * knows whether they set it correctly on the DIP switches.
 291         */
 292        pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
 293
 294        return 0;
 295}
 296
 297/*
 298 * Register to be done during do_initcalls().
 299 */
 300arch_initcall(xtavnet_init);
 301
 302#endif /* CONFIG_OF */
 303