1/* linux/drivers/gpu/drm/exynos/regs-gsc.h 2 * 3 * Copyright (c) 2012 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com 5 * 6 * Register definition file for Samsung G-Scaler driver 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13#ifndef EXYNOS_REGS_GSC_H_ 14#define EXYNOS_REGS_GSC_H_ 15 16/* G-Scaler enable */ 17#define GSC_ENABLE 0x00 18#define GSC_ENABLE_PP_UPDATE_TIME_MASK (1 << 9) 19#define GSC_ENABLE_PP_UPDATE_TIME_CURR (0 << 9) 20#define GSC_ENABLE_PP_UPDATE_TIME_EOPAS (1 << 9) 21#define GSC_ENABLE_CLK_GATE_MODE_MASK (1 << 8) 22#define GSC_ENABLE_CLK_GATE_MODE_FREE (1 << 8) 23#define GSC_ENABLE_IPC_MODE_MASK (1 << 7) 24#define GSC_ENABLE_NORM_MODE (0 << 7) 25#define GSC_ENABLE_IPC_MODE (1 << 7) 26#define GSC_ENABLE_PP_UPDATE_MODE_MASK (1 << 6) 27#define GSC_ENABLE_PP_UPDATE_FIRE_MODE (1 << 6) 28#define GSC_ENABLE_IN_PP_UPDATE (1 << 5) 29#define GSC_ENABLE_ON_CLEAR_MASK (1 << 4) 30#define GSC_ENABLE_ON_CLEAR_ONESHOT (1 << 4) 31#define GSC_ENABLE_QOS_ENABLE (1 << 3) 32#define GSC_ENABLE_OP_STATUS (1 << 2) 33#define GSC_ENABLE_SFR_UPDATE (1 << 1) 34#define GSC_ENABLE_ON (1 << 0) 35 36/* G-Scaler S/W reset */ 37#define GSC_SW_RESET 0x04 38#define GSC_SW_RESET_SRESET (1 << 0) 39 40/* G-Scaler IRQ */ 41#define GSC_IRQ 0x08 42#define GSC_IRQ_STATUS_OR_IRQ (1 << 17) 43#define GSC_IRQ_STATUS_OR_FRM_DONE (1 << 16) 44#define GSC_IRQ_OR_MASK (1 << 2) 45#define GSC_IRQ_FRMDONE_MASK (1 << 1) 46#define GSC_IRQ_ENABLE (1 << 0) 47 48/* G-Scaler input control */ 49#define GSC_IN_CON 0x10 50#define GSC_IN_CHROM_STRIDE_SEL_MASK (1 << 20) 51#define GSC_IN_CHROM_STRIDE_SEPAR (1 << 20) 52#define GSC_IN_RB_SWAP_MASK (1 << 19) 53#define GSC_IN_RB_SWAP (1 << 19) 54#define GSC_IN_ROT_MASK (7 << 16) 55#define GSC_IN_ROT_270 (7 << 16) 56#define GSC_IN_ROT_90_YFLIP (6 << 16) 57#define GSC_IN_ROT_90_XFLIP (5 << 16) 58#define GSC_IN_ROT_90 (4 << 16) 59#define GSC_IN_ROT_180 (3 << 16) 60#define GSC_IN_ROT_YFLIP (2 << 16) 61#define GSC_IN_ROT_XFLIP (1 << 16) 62#define GSC_IN_RGB_TYPE_MASK (3 << 14) 63#define GSC_IN_RGB_HD_WIDE (3 << 14) 64#define GSC_IN_RGB_HD_NARROW (2 << 14) 65#define GSC_IN_RGB_SD_WIDE (1 << 14) 66#define GSC_IN_RGB_SD_NARROW (0 << 14) 67#define GSC_IN_YUV422_1P_ORDER_MASK (1 << 13) 68#define GSC_IN_YUV422_1P_ORDER_LSB_Y (0 << 13) 69#define GSC_IN_YUV422_1P_OEDER_LSB_C (1 << 13) 70#define GSC_IN_CHROMA_ORDER_MASK (1 << 12) 71#define GSC_IN_CHROMA_ORDER_CBCR (0 << 12) 72#define GSC_IN_CHROMA_ORDER_CRCB (1 << 12) 73#define GSC_IN_FORMAT_MASK (7 << 8) 74#define GSC_IN_XRGB8888 (0 << 8) 75#define GSC_IN_RGB565 (1 << 8) 76#define GSC_IN_YUV420_2P (2 << 8) 77#define GSC_IN_YUV420_3P (3 << 8) 78#define GSC_IN_YUV422_1P (4 << 8) 79#define GSC_IN_YUV422_2P (5 << 8) 80#define GSC_IN_YUV422_3P (6 << 8) 81#define GSC_IN_TILE_TYPE_MASK (1 << 4) 82#define GSC_IN_TILE_C_16x8 (0 << 4) 83#define GSC_IN_TILE_C_16x16 (1 << 4) 84#define GSC_IN_TILE_MODE (1 << 3) 85#define GSC_IN_LOCAL_SEL_MASK (3 << 1) 86#define GSC_IN_LOCAL_CAM3 (3 << 1) 87#define GSC_IN_LOCAL_FIMD_WB (2 << 1) 88#define GSC_IN_LOCAL_CAM1 (1 << 1) 89#define GSC_IN_LOCAL_CAM0 (0 << 1) 90#define GSC_IN_PATH_MASK (1 << 0) 91#define GSC_IN_PATH_LOCAL (1 << 0) 92#define GSC_IN_PATH_MEMORY (0 << 0) 93 94/* G-Scaler source image size */ 95#define GSC_SRCIMG_SIZE 0x14 96#define GSC_SRCIMG_HEIGHT_MASK (0x1fff << 16) 97#define GSC_SRCIMG_HEIGHT(x) ((x) << 16) 98#define GSC_SRCIMG_WIDTH_MASK (0x3fff << 0) 99#define GSC_SRCIMG_WIDTH(x) ((x) << 0) 100 101/* G-Scaler source image offset */ 102#define GSC_SRCIMG_OFFSET 0x18 103#define GSC_SRCIMG_OFFSET_Y_MASK (0x1fff << 16) 104#define GSC_SRCIMG_OFFSET_Y(x) ((x) << 16) 105#define GSC_SRCIMG_OFFSET_X_MASK (0x1fff << 0) 106#define GSC_SRCIMG_OFFSET_X(x) ((x) << 0) 107 108/* G-Scaler cropped source image size */ 109#define GSC_CROPPED_SIZE 0x1C 110#define GSC_CROPPED_HEIGHT_MASK (0x1fff << 16) 111#define GSC_CROPPED_HEIGHT(x) ((x) << 16) 112#define GSC_CROPPED_WIDTH_MASK (0x1fff << 0) 113#define GSC_CROPPED_WIDTH(x) ((x) << 0) 114 115/* G-Scaler output control */ 116#define GSC_OUT_CON 0x20 117#define GSC_OUT_GLOBAL_ALPHA_MASK (0xff << 24) 118#define GSC_OUT_GLOBAL_ALPHA(x) ((x) << 24) 119#define GSC_OUT_CHROM_STRIDE_SEL_MASK (1 << 13) 120#define GSC_OUT_CHROM_STRIDE_SEPAR (1 << 13) 121#define GSC_OUT_RB_SWAP_MASK (1 << 12) 122#define GSC_OUT_RB_SWAP (1 << 12) 123#define GSC_OUT_RGB_TYPE_MASK (3 << 10) 124#define GSC_OUT_RGB_HD_NARROW (3 << 10) 125#define GSC_OUT_RGB_HD_WIDE (2 << 10) 126#define GSC_OUT_RGB_SD_NARROW (1 << 10) 127#define GSC_OUT_RGB_SD_WIDE (0 << 10) 128#define GSC_OUT_YUV422_1P_ORDER_MASK (1 << 9) 129#define GSC_OUT_YUV422_1P_ORDER_LSB_Y (0 << 9) 130#define GSC_OUT_YUV422_1P_OEDER_LSB_C (1 << 9) 131#define GSC_OUT_CHROMA_ORDER_MASK (1 << 8) 132#define GSC_OUT_CHROMA_ORDER_CBCR (0 << 8) 133#define GSC_OUT_CHROMA_ORDER_CRCB (1 << 8) 134#define GSC_OUT_FORMAT_MASK (7 << 4) 135#define GSC_OUT_XRGB8888 (0 << 4) 136#define GSC_OUT_RGB565 (1 << 4) 137#define GSC_OUT_YUV420_2P (2 << 4) 138#define GSC_OUT_YUV420_3P (3 << 4) 139#define GSC_OUT_YUV422_1P (4 << 4) 140#define GSC_OUT_YUV422_2P (5 << 4) 141#define GSC_OUT_YUV444 (7 << 4) 142#define GSC_OUT_TILE_TYPE_MASK (1 << 2) 143#define GSC_OUT_TILE_C_16x8 (0 << 2) 144#define GSC_OUT_TILE_C_16x16 (1 << 2) 145#define GSC_OUT_TILE_MODE (1 << 1) 146#define GSC_OUT_PATH_MASK (1 << 0) 147#define GSC_OUT_PATH_LOCAL (1 << 0) 148#define GSC_OUT_PATH_MEMORY (0 << 0) 149 150/* G-Scaler scaled destination image size */ 151#define GSC_SCALED_SIZE 0x24 152#define GSC_SCALED_HEIGHT_MASK (0x1fff << 16) 153#define GSC_SCALED_HEIGHT(x) ((x) << 16) 154#define GSC_SCALED_WIDTH_MASK (0x1fff << 0) 155#define GSC_SCALED_WIDTH(x) ((x) << 0) 156 157/* G-Scaler pre scale ratio */ 158#define GSC_PRE_SCALE_RATIO 0x28 159#define GSC_PRESC_SHFACTOR_MASK (7 << 28) 160#define GSC_PRESC_SHFACTOR(x) ((x) << 28) 161#define GSC_PRESC_V_RATIO_MASK (7 << 16) 162#define GSC_PRESC_V_RATIO(x) ((x) << 16) 163#define GSC_PRESC_H_RATIO_MASK (7 << 0) 164#define GSC_PRESC_H_RATIO(x) ((x) << 0) 165 166/* G-Scaler main scale horizontal ratio */ 167#define GSC_MAIN_H_RATIO 0x2C 168#define GSC_MAIN_H_RATIO_MASK (0xfffff << 0) 169#define GSC_MAIN_H_RATIO_VALUE(x) ((x) << 0) 170 171/* G-Scaler main scale vertical ratio */ 172#define GSC_MAIN_V_RATIO 0x30 173#define GSC_MAIN_V_RATIO_MASK (0xfffff << 0) 174#define GSC_MAIN_V_RATIO_VALUE(x) ((x) << 0) 175 176/* G-Scaler input chrominance stride */ 177#define GSC_IN_CHROM_STRIDE 0x3C 178#define GSC_IN_CHROM_STRIDE_MASK (0x3fff << 0) 179#define GSC_IN_CHROM_STRIDE_VALUE(x) ((x) << 0) 180 181/* G-Scaler destination image size */ 182#define GSC_DSTIMG_SIZE 0x40 183#define GSC_DSTIMG_HEIGHT_MASK (0x1fff << 16) 184#define GSC_DSTIMG_HEIGHT(x) ((x) << 16) 185#define GSC_DSTIMG_WIDTH_MASK (0x1fff << 0) 186#define GSC_DSTIMG_WIDTH(x) ((x) << 0) 187 188/* G-Scaler destination image offset */ 189#define GSC_DSTIMG_OFFSET 0x44 190#define GSC_DSTIMG_OFFSET_Y_MASK (0x1fff << 16) 191#define GSC_DSTIMG_OFFSET_Y(x) ((x) << 16) 192#define GSC_DSTIMG_OFFSET_X_MASK (0x1fff << 0) 193#define GSC_DSTIMG_OFFSET_X(x) ((x) << 0) 194 195/* G-Scaler output chrominance stride */ 196#define GSC_OUT_CHROM_STRIDE 0x48 197#define GSC_OUT_CHROM_STRIDE_MASK (0x3fff << 0) 198#define GSC_OUT_CHROM_STRIDE_VALUE(x) ((x) << 0) 199 200/* G-Scaler input y address mask */ 201#define GSC_IN_BASE_ADDR_Y_MASK 0x4C 202/* G-Scaler input y base address */ 203#define GSC_IN_BASE_ADDR_Y(n) (0x50 + (n) * 0x4) 204/* G-Scaler input y base current address */ 205#define GSC_IN_BASE_ADDR_Y_CUR(n) (0x60 + (n) * 0x4) 206 207/* G-Scaler input cb address mask */ 208#define GSC_IN_BASE_ADDR_CB_MASK 0x7C 209/* G-Scaler input cb base address */ 210#define GSC_IN_BASE_ADDR_CB(n) (0x80 + (n) * 0x4) 211/* G-Scaler input cb base current address */ 212#define GSC_IN_BASE_ADDR_CB_CUR(n) (0x90 + (n) * 0x4) 213 214/* G-Scaler input cr address mask */ 215#define GSC_IN_BASE_ADDR_CR_MASK 0xAC 216/* G-Scaler input cr base address */ 217#define GSC_IN_BASE_ADDR_CR(n) (0xB0 + (n) * 0x4) 218/* G-Scaler input cr base current address */ 219#define GSC_IN_BASE_ADDR_CR_CUR(n) (0xC0 + (n) * 0x4) 220 221/* G-Scaler input address mask */ 222#define GSC_IN_CURR_ADDR_INDEX (0xf << 24) 223#define GSC_IN_CURR_GET_INDEX(x) ((x) >> 24) 224#define GSC_IN_BASE_ADDR_PINGPONG(x) ((x) << 16) 225#define GSC_IN_BASE_ADDR_MASK (0xff << 0) 226 227/* G-Scaler output y address mask */ 228#define GSC_OUT_BASE_ADDR_Y_MASK 0x10C 229/* G-Scaler output y base address */ 230#define GSC_OUT_BASE_ADDR_Y(n) (0x110 + (n) * 0x4) 231 232/* G-Scaler output cb address mask */ 233#define GSC_OUT_BASE_ADDR_CB_MASK 0x15C 234/* G-Scaler output cb base address */ 235#define GSC_OUT_BASE_ADDR_CB(n) (0x160 + (n) * 0x4) 236 237/* G-Scaler output cr address mask */ 238#define GSC_OUT_BASE_ADDR_CR_MASK 0x1AC 239/* G-Scaler output cr base address */ 240#define GSC_OUT_BASE_ADDR_CR(n) (0x1B0 + (n) * 0x4) 241 242/* G-Scaler output address mask */ 243#define GSC_OUT_CURR_ADDR_INDEX (0xf << 24) 244#define GSC_OUT_CURR_GET_INDEX(x) ((x) >> 24) 245#define GSC_OUT_BASE_ADDR_PINGPONG(x) ((x) << 16) 246#define GSC_OUT_BASE_ADDR_MASK (0xffff << 0) 247 248/* G-Scaler horizontal scaling filter */ 249#define GSC_HCOEF(n, s, x) (0x300 + (n) * 0x4 + (s) * 0x30 + (x) * 0x300) 250 251/* G-Scaler vertical scaling filter */ 252#define GSC_VCOEF(n, s, x) (0x200 + (n) * 0x4 + (s) * 0x30 + (x) * 0x300) 253 254/* G-Scaler BUS control */ 255#define GSC_BUSCON 0xA78 256#define GSC_BUSCON_INT_TIME_MASK (1 << 8) 257#define GSC_BUSCON_INT_DATA_TRANS (0 << 8) 258#define GSC_BUSCON_INT_AXI_RESPONSE (1 << 8) 259#define GSC_BUSCON_AWCACHE(x) ((x) << 4) 260#define GSC_BUSCON_ARCACHE(x) ((x) << 0) 261 262/* G-Scaler V position */ 263#define GSC_VPOSITION 0xA7C 264#define GSC_VPOS_F(x) ((x) << 0) 265 266 267/* G-Scaler clock initial count */ 268#define GSC_CLK_INIT_COUNT 0xC00 269#define GSC_CLK_GATE_MODE_INIT_CNT(x) ((x) << 0) 270 271/* G-Scaler clock snoop count */ 272#define GSC_CLK_SNOOP_COUNT 0xC04 273#define GSC_CLK_GATE_MODE_SNOOP_CNT(x) ((x) << 0) 274 275/* SYSCON. GSCBLK_CFG */ 276#define SYSREG_GSCBLK_CFG1 (S3C_VA_SYS + 0x0224) 277#define GSC_BLK_DISP1WB_DEST(x) (x << 10) 278#define GSC_BLK_SW_RESET_WB_DEST(x) (1 << (18 + x)) 279#define GSC_BLK_PXLASYNC_LO_MASK_WB(x) (0 << (14 + x)) 280#define GSC_BLK_GSCL_WB_IN_SRC_SEL(x) (1 << (2 * x)) 281#define SYSREG_GSCBLK_CFG2 (S3C_VA_SYS + 0x2000) 282#define PXLASYNC_LO_MASK_CAMIF_GSCL(x) (1 << (x)) 283 284#endif /* EXYNOS_REGS_GSC_H_ */ 285