LXR linux/drivers/infiniband/hw/cxgb4/user.h

   1/*
   2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and/or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 */
  32#ifndef __C4IW_USER_H__
  33#define __C4IW_USER_H__
  34
  35#define C4IW_UVERBS_ABI_VERSION 2
  36
  37/*
  38 * Make sure that all structs defined in this file remain laid out so
  39 * that they pack the same way on 32-bit and 64-bit architectures (to
  40 * avoid incompatibility between 32-bit userspace and 64-bit kernels).
  41 * In particular do not use pointer types -- pass pointers in __u64
  42 * instead.
  43 */
  44struct c4iw_create_cq_resp {
  45        __u64 key;
  46        __u64 gts_key;
  47        __u64 memsize;
  48        __u32 cqid;
  49        __u32 size;
  50        __u32 qid_mask;
  51};
  52
  53
  54enum {
  55        C4IW_QPF_ONCHIP = (1<<0)
  56};
  57
  58struct c4iw_create_qp_resp {
  59        __u64 ma_sync_key;
  60        __u64 sq_key;
  61        __u64 rq_key;
  62        __u64 sq_db_gts_key;
  63        __u64 rq_db_gts_key;
  64        __u64 sq_memsize;
  65        __u64 rq_memsize;
  66        __u32 sqid;
  67        __u32 rqid;
  68        __u32 sq_size;
  69        __u32 rq_size;
  70        __u32 qid_mask;
  71        __u32 flags;
  72};
  73#endif
  74