1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/pci.h>
24#include <linux/i2c.h>
25#include <linux/interrupt.h>
26#include <linux/spinlock.h>
27#include <linux/slab.h>
28#include <linux/videodev2.h>
29#include <media/v4l2-device.h>
30#include <linux/device.h>
31#include <linux/wait.h>
32#include <linux/delay.h>
33#include <linux/io.h>
34
35#include "mcam-core.h"
36
37#define CAFE_VERSION 0x000002
38
39
40
41
42
43MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
44MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver");
45MODULE_LICENSE("GPL");
46MODULE_SUPPORTED_DEVICE("Video");
47
48
49
50
51struct cafe_camera {
52 int registered;
53 struct mcam_camera mcam;
54 struct pci_dev *pdev;
55 wait_queue_head_t smbus_wait;
56};
57
58
59
60
61
62
63
64
65
66
67
68#define REG_GPR 0xb4
69#define GPR_C1EN 0x00000020
70#define GPR_C0EN 0x00000010
71#define GPR_C1 0x00000002
72
73
74
75
76#define GPR_C0 0x00000001
77
78
79
80
81
82#define REG_TWSIC0 0xb8
83#define TWSIC0_EN 0x00000001
84#define TWSIC0_MODE 0x00000002
85#define TWSIC0_SID 0x000003fc
86
87
88
89
90
91
92
93#define TWSIC0_SID_SHIFT 3
94#define TWSIC0_CLKDIV 0x0007fc00
95#define TWSIC0_MASKACK 0x00400000
96#define TWSIC0_OVMAGIC 0x00800000
97
98#define REG_TWSIC1 0xbc
99#define TWSIC1_DATA 0x0000ffff
100#define TWSIC1_ADDR 0x00ff0000
101#define TWSIC1_ADDR_SHIFT 16
102#define TWSIC1_READ 0x01000000
103#define TWSIC1_WSTAT 0x02000000
104#define TWSIC1_RVALID 0x04000000
105#define TWSIC1_ERROR 0x08000000
106
107
108
109
110#define REG_GL_CSR 0x3004
111#define GCSR_SRS 0x00000001
112#define GCSR_SRC 0x00000002
113#define GCSR_MRS 0x00000004
114#define GCSR_MRC 0x00000008
115#define GCSR_CCIC_EN 0x00004000
116#define REG_GL_IMASK 0x300c
117#define GIMSK_CCIC_EN 0x00000004
118
119#define REG_GL_FCR 0x3038
120#define GFCR_GPIO_ON 0x08
121#define REG_GL_GPIOR 0x315c
122#define GGPIO_OUT 0x80000
123#define GGPIO_VAL 0x00008
124
125#define REG_LEN (REG_GL_IMASK + 4)
126
127
128
129
130
131#define cam_err(cam, fmt, arg...) \
132 dev_err(&(cam)->pdev->dev, fmt, ##arg);
133#define cam_warn(cam, fmt, arg...) \
134 dev_warn(&(cam)->pdev->dev, fmt, ##arg);
135
136
137
138
139
140
141
142#define CAFE_SMBUS_TIMEOUT (HZ)
143
144static inline struct cafe_camera *to_cam(struct v4l2_device *dev)
145{
146 struct mcam_camera *m = container_of(dev, struct mcam_camera, v4l2_dev);
147 return container_of(m, struct cafe_camera, mcam);
148}
149
150
151static int cafe_smbus_write_done(struct mcam_camera *mcam)
152{
153 unsigned long flags;
154 int c1;
155
156
157
158
159
160
161 udelay(20);
162 spin_lock_irqsave(&mcam->dev_lock, flags);
163 c1 = mcam_reg_read(mcam, REG_TWSIC1);
164 spin_unlock_irqrestore(&mcam->dev_lock, flags);
165 return (c1 & (TWSIC1_WSTAT|TWSIC1_ERROR)) != TWSIC1_WSTAT;
166}
167
168static int cafe_smbus_write_data(struct cafe_camera *cam,
169 u16 addr, u8 command, u8 value)
170{
171 unsigned int rval;
172 unsigned long flags;
173 struct mcam_camera *mcam = &cam->mcam;
174
175 spin_lock_irqsave(&mcam->dev_lock, flags);
176 rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
177 rval |= TWSIC0_OVMAGIC;
178
179
180
181 rval |= TWSIC0_CLKDIV;
182 mcam_reg_write(mcam, REG_TWSIC0, rval);
183 (void) mcam_reg_read(mcam, REG_TWSIC1);
184 rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
185 mcam_reg_write(mcam, REG_TWSIC1, rval);
186 spin_unlock_irqrestore(&mcam->dev_lock, flags);
187
188
189
190
191
192
193
194
195 mdelay(2);
196
197
198
199
200
201
202
203
204
205
206 wait_event_timeout(cam->smbus_wait, cafe_smbus_write_done(mcam),
207 CAFE_SMBUS_TIMEOUT);
208
209 spin_lock_irqsave(&mcam->dev_lock, flags);
210 rval = mcam_reg_read(mcam, REG_TWSIC1);
211 spin_unlock_irqrestore(&mcam->dev_lock, flags);
212
213 if (rval & TWSIC1_WSTAT) {
214 cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr,
215 command, value);
216 return -EIO;
217 }
218 if (rval & TWSIC1_ERROR) {
219 cam_err(cam, "SMBUS write (%02x/%02x/%02x) error\n", addr,
220 command, value);
221 return -EIO;
222 }
223 return 0;
224}
225
226
227
228static int cafe_smbus_read_done(struct mcam_camera *mcam)
229{
230 unsigned long flags;
231 int c1;
232
233
234
235
236
237
238 udelay(20);
239 spin_lock_irqsave(&mcam->dev_lock, flags);
240 c1 = mcam_reg_read(mcam, REG_TWSIC1);
241 spin_unlock_irqrestore(&mcam->dev_lock, flags);
242 return c1 & (TWSIC1_RVALID|TWSIC1_ERROR);
243}
244
245
246
247static int cafe_smbus_read_data(struct cafe_camera *cam,
248 u16 addr, u8 command, u8 *value)
249{
250 unsigned int rval;
251 unsigned long flags;
252 struct mcam_camera *mcam = &cam->mcam;
253
254 spin_lock_irqsave(&mcam->dev_lock, flags);
255 rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
256 rval |= TWSIC0_OVMAGIC;
257
258
259
260 rval |= TWSIC0_CLKDIV;
261 mcam_reg_write(mcam, REG_TWSIC0, rval);
262 (void) mcam_reg_read(mcam, REG_TWSIC1);
263 rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
264 mcam_reg_write(mcam, REG_TWSIC1, rval);
265 spin_unlock_irqrestore(&mcam->dev_lock, flags);
266
267 wait_event_timeout(cam->smbus_wait,
268 cafe_smbus_read_done(mcam), CAFE_SMBUS_TIMEOUT);
269 spin_lock_irqsave(&mcam->dev_lock, flags);
270 rval = mcam_reg_read(mcam, REG_TWSIC1);
271 spin_unlock_irqrestore(&mcam->dev_lock, flags);
272
273 if (rval & TWSIC1_ERROR) {
274 cam_err(cam, "SMBUS read (%02x/%02x) error\n", addr, command);
275 return -EIO;
276 }
277 if (!(rval & TWSIC1_RVALID)) {
278 cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr,
279 command);
280 return -EIO;
281 }
282 *value = rval & 0xff;
283 return 0;
284}
285
286
287
288
289
290static int cafe_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
291 unsigned short flags, char rw, u8 command,
292 int size, union i2c_smbus_data *data)
293{
294 struct cafe_camera *cam = i2c_get_adapdata(adapter);
295 int ret = -EINVAL;
296
297
298
299
300
301 if (size != I2C_SMBUS_BYTE_DATA) {
302 cam_err(cam, "funky xfer size %d\n", size);
303 return -EINVAL;
304 }
305
306 if (rw == I2C_SMBUS_WRITE)
307 ret = cafe_smbus_write_data(cam, addr, command, data->byte);
308 else if (rw == I2C_SMBUS_READ)
309 ret = cafe_smbus_read_data(cam, addr, command, &data->byte);
310 return ret;
311}
312
313
314static void cafe_smbus_enable_irq(struct cafe_camera *cam)
315{
316 unsigned long flags;
317
318 spin_lock_irqsave(&cam->mcam.dev_lock, flags);
319 mcam_reg_set_bit(&cam->mcam, REG_IRQMASK, TWSIIRQS);
320 spin_unlock_irqrestore(&cam->mcam.dev_lock, flags);
321}
322
323static u32 cafe_smbus_func(struct i2c_adapter *adapter)
324{
325 return I2C_FUNC_SMBUS_READ_BYTE_DATA |
326 I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
327}
328
329static struct i2c_algorithm cafe_smbus_algo = {
330 .smbus_xfer = cafe_smbus_xfer,
331 .functionality = cafe_smbus_func
332};
333
334static int cafe_smbus_setup(struct cafe_camera *cam)
335{
336 struct i2c_adapter *adap;
337 int ret;
338
339 adap = kzalloc(sizeof(*adap), GFP_KERNEL);
340 if (adap == NULL)
341 return -ENOMEM;
342 cam->mcam.i2c_adapter = adap;
343 cafe_smbus_enable_irq(cam);
344 adap->owner = THIS_MODULE;
345 adap->algo = &cafe_smbus_algo;
346 strcpy(adap->name, "cafe_ccic");
347 adap->dev.parent = &cam->pdev->dev;
348 i2c_set_adapdata(adap, cam);
349 ret = i2c_add_adapter(adap);
350 if (ret)
351 printk(KERN_ERR "Unable to register cafe i2c adapter\n");
352 return ret;
353}
354
355static void cafe_smbus_shutdown(struct cafe_camera *cam)
356{
357 i2c_del_adapter(cam->mcam.i2c_adapter);
358 kfree(cam->mcam.i2c_adapter);
359}
360
361
362
363
364
365
366static void cafe_ctlr_init(struct mcam_camera *mcam)
367{
368 unsigned long flags;
369
370 spin_lock_irqsave(&mcam->dev_lock, flags);
371
372
373
374 mcam_reg_write(mcam, 0x3038, 0x8);
375 mcam_reg_write(mcam, 0x315c, 0x80008);
376
377
378
379
380
381
382 mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRS|GCSR_MRS);
383 mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRC);
384 mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRS);
385
386
387
388 spin_unlock_irqrestore(&mcam->dev_lock, flags);
389 msleep(5);
390 spin_lock_irqsave(&mcam->dev_lock, flags);
391
392 mcam_reg_write(mcam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC);
393 mcam_reg_set_bit(mcam, REG_GL_IMASK, GIMSK_CCIC_EN);
394
395
396
397 mcam_reg_write(mcam, REG_IRQMASK, 0);
398 spin_unlock_irqrestore(&mcam->dev_lock, flags);
399}
400
401
402static void cafe_ctlr_power_up(struct mcam_camera *mcam)
403{
404
405
406
407
408 mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON);
409 mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL);
410
411
412
413
414
415 mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN);
416 mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0);
417}
418
419static void cafe_ctlr_power_down(struct mcam_camera *mcam)
420{
421 mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1);
422 mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON);
423 mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT);
424}
425
426
427
428
429
430
431static irqreturn_t cafe_irq(int irq, void *data)
432{
433 struct cafe_camera *cam = data;
434 struct mcam_camera *mcam = &cam->mcam;
435 unsigned int irqs, handled;
436
437 spin_lock(&mcam->dev_lock);
438 irqs = mcam_reg_read(mcam, REG_IRQSTAT);
439 handled = cam->registered && mccic_irq(mcam, irqs);
440 if (irqs & TWSIIRQS) {
441 mcam_reg_write(mcam, REG_IRQSTAT, TWSIIRQS);
442 wake_up(&cam->smbus_wait);
443 handled = 1;
444 }
445 spin_unlock(&mcam->dev_lock);
446 return IRQ_RETVAL(handled);
447}
448
449
450
451
452
453
454
455static int cafe_pci_probe(struct pci_dev *pdev,
456 const struct pci_device_id *id)
457{
458 int ret;
459 struct cafe_camera *cam;
460 struct mcam_camera *mcam;
461
462
463
464
465 ret = -ENOMEM;
466 cam = kzalloc(sizeof(struct cafe_camera), GFP_KERNEL);
467 if (cam == NULL)
468 goto out;
469 cam->pdev = pdev;
470 mcam = &cam->mcam;
471 mcam->chip_id = MCAM_CAFE;
472 spin_lock_init(&mcam->dev_lock);
473 init_waitqueue_head(&cam->smbus_wait);
474 mcam->plat_power_up = cafe_ctlr_power_up;
475 mcam->plat_power_down = cafe_ctlr_power_down;
476 mcam->dev = &pdev->dev;
477
478
479
480
481 mcam->clock_speed = 45;
482 mcam->use_smbus = 1;
483
484
485
486
487
488 mcam->buffer_mode = B_vmalloc;
489
490
491
492 ret = pci_enable_device(pdev);
493 if (ret)
494 goto out_free;
495 pci_set_master(pdev);
496
497 ret = -EIO;
498 mcam->regs = pci_iomap(pdev, 0, 0);
499 if (!mcam->regs) {
500 printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n");
501 goto out_disable;
502 }
503 mcam->regs_size = pci_resource_len(pdev, 0);
504 ret = request_irq(pdev->irq, cafe_irq, IRQF_SHARED, "cafe-ccic", cam);
505 if (ret)
506 goto out_iounmap;
507
508
509
510
511
512 cafe_ctlr_init(mcam);
513 cafe_ctlr_power_up(mcam);
514
515
516
517
518
519 ret = cafe_smbus_setup(cam);
520 if (ret)
521 goto out_pdown;
522
523 ret = mccic_register(mcam);
524 if (ret == 0) {
525 cam->registered = 1;
526 return 0;
527 }
528
529 cafe_smbus_shutdown(cam);
530out_pdown:
531 cafe_ctlr_power_down(mcam);
532 free_irq(pdev->irq, cam);
533out_iounmap:
534 pci_iounmap(pdev, mcam->regs);
535out_disable:
536 pci_disable_device(pdev);
537out_free:
538 kfree(cam);
539out:
540 return ret;
541}
542
543
544
545
546
547static void cafe_shutdown(struct cafe_camera *cam)
548{
549 mccic_shutdown(&cam->mcam);
550 cafe_smbus_shutdown(cam);
551 free_irq(cam->pdev->irq, cam);
552 pci_iounmap(cam->pdev, cam->mcam.regs);
553}
554
555
556static void cafe_pci_remove(struct pci_dev *pdev)
557{
558 struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
559 struct cafe_camera *cam = to_cam(v4l2_dev);
560
561 if (cam == NULL) {
562 printk(KERN_WARNING "pci_remove on unknown pdev %p\n", pdev);
563 return;
564 }
565 cafe_shutdown(cam);
566 kfree(cam);
567}
568
569
570#ifdef CONFIG_PM
571
572
573
574static int cafe_pci_suspend(struct pci_dev *pdev, pm_message_t state)
575{
576 struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
577 struct cafe_camera *cam = to_cam(v4l2_dev);
578 int ret;
579
580 ret = pci_save_state(pdev);
581 if (ret)
582 return ret;
583 mccic_suspend(&cam->mcam);
584 pci_disable_device(pdev);
585 return 0;
586}
587
588
589static int cafe_pci_resume(struct pci_dev *pdev)
590{
591 struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
592 struct cafe_camera *cam = to_cam(v4l2_dev);
593 int ret = 0;
594
595 pci_restore_state(pdev);
596 ret = pci_enable_device(pdev);
597
598 if (ret) {
599 cam_warn(cam, "Unable to re-enable device on resume!\n");
600 return ret;
601 }
602 cafe_ctlr_init(&cam->mcam);
603 return mccic_resume(&cam->mcam);
604}
605
606#endif
607
608static struct pci_device_id cafe_ids[] = {
609 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL,
610 PCI_DEVICE_ID_MARVELL_88ALP01_CCIC) },
611 { 0, }
612};
613
614MODULE_DEVICE_TABLE(pci, cafe_ids);
615
616static struct pci_driver cafe_pci_driver = {
617 .name = "cafe1000-ccic",
618 .id_table = cafe_ids,
619 .probe = cafe_pci_probe,
620 .remove = cafe_pci_remove,
621#ifdef CONFIG_PM
622 .suspend = cafe_pci_suspend,
623 .resume = cafe_pci_resume,
624#endif
625};
626
627
628
629
630static int __init cafe_init(void)
631{
632 int ret;
633
634 printk(KERN_NOTICE "Marvell M88ALP01 'CAFE' Camera Controller version %d\n",
635 CAFE_VERSION);
636 ret = pci_register_driver(&cafe_pci_driver);
637 if (ret) {
638 printk(KERN_ERR "Unable to register cafe_ccic driver\n");
639 goto out;
640 }
641 ret = 0;
642
643out:
644 return ret;
645}
646
647
648static void __exit cafe_exit(void)
649{
650 pci_unregister_driver(&cafe_pci_driver);
651}
652
653module_init(cafe_init);
654module_exit(cafe_exit);
655