1
2
3
4
5
6
7
8
9
10
11
12
13#include <linux/delay.h>
14#include <linux/err.h>
15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/of_gpio.h>
22#include <linux/pm_runtime.h>
23#include <linux/regmap.h>
24#include <linux/regulator/consumer.h>
25#include <linux/regulator/machine.h>
26#include <linux/slab.h>
27
28#include <linux/mfd/arizona/core.h>
29#include <linux/mfd/arizona/registers.h>
30
31#include "arizona.h"
32
33static const char *wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
36};
37
38int arizona_clk32k_enable(struct arizona *arizona)
39{
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
58 }
59
60out:
61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67}
68EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70int arizona_clk32k_disable(struct arizona *arizona)
71{
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
80 if (arizona->clk32k_ref == 0) {
81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94}
95EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97static irqreturn_t arizona_clkgen_err(int irq, void *data)
98{
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104}
105
106static irqreturn_t arizona_underclocked(int irq, void *data)
107{
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
125 dev_err(arizona->dev, "AIF1 underclocked\n");
126 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC2 underclocked\n");
128 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC1 underclocked\n");
130 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "FX underclocked\n");
132 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "ASRC underclocked\n");
134 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "DAC underclocked\n");
136 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "ADC underclocked\n");
138 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "Mixer dropped sample\n");
140
141 return IRQ_HANDLED;
142}
143
144static irqreturn_t arizona_overclocked(int irq, void *data)
145{
146 struct arizona *arizona = data;
147 unsigned int val[2];
148 int ret;
149
150 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
151 &val[0], 2);
152 if (ret != 0) {
153 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
154 ret);
155 return IRQ_NONE;
156 }
157
158 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
159 dev_err(arizona->dev, "PWM overclocked\n");
160 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "FX core overclocked\n");
162 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "DAC SYS overclocked\n");
164 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC WARP overclocked\n");
166 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "ADC overclocked\n");
168 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "Mixer overclocked\n");
170 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "AIF3 overclocked\n");
172 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF2 overclocked\n");
174 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF1 overclocked\n");
176 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "Pad control overclocked\n");
178
179 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
180 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
181 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus async overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus sync overclocked\n");
185 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "ASRC async system overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
189 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC sync system overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
193 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "DSP1 overclocked\n");
195 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "ISRC2 overclocked\n");
197 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC1 overclocked\n");
199
200 return IRQ_HANDLED;
201}
202
203static int arizona_poll_reg(struct arizona *arizona,
204 int timeout, unsigned int reg,
205 unsigned int mask, unsigned int target)
206{
207 unsigned int val = 0;
208 int ret, i;
209
210 for (i = 0; i < timeout; i++) {
211 ret = regmap_read(arizona->regmap, reg, &val);
212 if (ret != 0) {
213 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
214 reg, ret);
215 continue;
216 }
217
218 if ((val & mask) == target)
219 return 0;
220
221 msleep(1);
222 }
223
224 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
225 return -ETIMEDOUT;
226}
227
228static int arizona_wait_for_boot(struct arizona *arizona)
229{
230 int ret;
231
232
233
234
235
236
237 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
238 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
239
240 if (!ret)
241 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
242 ARIZONA_BOOT_DONE_STS);
243
244 pm_runtime_mark_last_busy(arizona->dev);
245
246 return ret;
247}
248
249static int arizona_apply_hardware_patch(struct arizona* arizona)
250{
251 unsigned int fll, sysclk;
252 int ret, err;
253
254 regcache_cache_bypass(arizona->regmap, true);
255
256
257 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
258 if (ret != 0) {
259 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
260 ret);
261 return ret;
262 }
263 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
264 if (ret != 0) {
265 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
266 ret);
267 return ret;
268 }
269
270
271 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
272 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
273 if (ret != 0) {
274 dev_err(arizona->dev,
275 "Failed to start FLL in freerunning mode: %d\n",
276 ret);
277 return ret;
278 }
279 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
280 ARIZONA_FLL1_CLOCK_OK_STS,
281 ARIZONA_FLL1_CLOCK_OK_STS);
282 if (ret != 0) {
283 ret = -ETIMEDOUT;
284 goto err_fll;
285 }
286
287 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
288 if (ret != 0) {
289 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
290 goto err_fll;
291 }
292
293
294 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
295 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
296 if (ret != 0) {
297 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
298 ret);
299 goto err_sysclk;
300 }
301 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
302 ARIZONA_WSEQ_BUSY, 0);
303 if (ret != 0) {
304 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
305 ARIZONA_WSEQ_ABORT);
306 ret = -ETIMEDOUT;
307 }
308
309err_sysclk:
310 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
311 if (err != 0) {
312 dev_err(arizona->dev,
313 "Failed to re-apply old SYSCLK settings: %d\n",
314 err);
315 }
316
317err_fll:
318 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
319 if (err != 0) {
320 dev_err(arizona->dev,
321 "Failed to re-apply old FLL settings: %d\n",
322 err);
323 }
324
325 regcache_cache_bypass(arizona->regmap, false);
326
327 if (ret != 0)
328 return ret;
329 else
330 return err;
331}
332
333#ifdef CONFIG_PM_RUNTIME
334static int arizona_runtime_resume(struct device *dev)
335{
336 struct arizona *arizona = dev_get_drvdata(dev);
337 int ret;
338
339 dev_dbg(arizona->dev, "Leaving AoD mode\n");
340
341 ret = regulator_enable(arizona->dcvdd);
342 if (ret != 0) {
343 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
344 return ret;
345 }
346
347 regcache_cache_only(arizona->regmap, false);
348
349 switch (arizona->type) {
350 case WM5102:
351 if (arizona->external_dcvdd) {
352 ret = regmap_update_bits(arizona->regmap,
353 ARIZONA_ISOLATION_CONTROL,
354 ARIZONA_ISOLATE_DCVDD1, 0);
355 if (ret != 0) {
356 dev_err(arizona->dev,
357 "Failed to connect DCVDD: %d\n", ret);
358 goto err;
359 }
360 }
361
362 ret = wm5102_patch(arizona);
363 if (ret != 0) {
364 dev_err(arizona->dev, "Failed to apply patch: %d\n",
365 ret);
366 goto err;
367 }
368
369 ret = arizona_apply_hardware_patch(arizona);
370 if (ret != 0) {
371 dev_err(arizona->dev,
372 "Failed to apply hardware patch: %d\n",
373 ret);
374 goto err;
375 }
376 break;
377 default:
378 ret = arizona_wait_for_boot(arizona);
379 if (ret != 0) {
380 goto err;
381 }
382
383 if (arizona->external_dcvdd) {
384 ret = regmap_update_bits(arizona->regmap,
385 ARIZONA_ISOLATION_CONTROL,
386 ARIZONA_ISOLATE_DCVDD1, 0);
387 if (ret != 0) {
388 dev_err(arizona->dev,
389 "Failed to connect DCVDD: %d\n", ret);
390 goto err;
391 }
392 }
393 break;
394 }
395
396 switch (arizona->type) {
397 case WM5102:
398 ret = wm5102_patch(arizona);
399 if (ret != 0) {
400 dev_err(arizona->dev, "Failed to apply patch: %d\n",
401 ret);
402 goto err;
403 }
404 default:
405 break;
406 }
407
408 ret = regcache_sync(arizona->regmap);
409 if (ret != 0) {
410 dev_err(arizona->dev, "Failed to restore register cache\n");
411 goto err;
412 }
413
414 return 0;
415
416err:
417 regcache_cache_only(arizona->regmap, true);
418 regulator_disable(arizona->dcvdd);
419 return ret;
420}
421
422static int arizona_runtime_suspend(struct device *dev)
423{
424 struct arizona *arizona = dev_get_drvdata(dev);
425 int ret;
426
427 dev_dbg(arizona->dev, "Entering AoD mode\n");
428
429 if (arizona->external_dcvdd) {
430 ret = regmap_update_bits(arizona->regmap,
431 ARIZONA_ISOLATION_CONTROL,
432 ARIZONA_ISOLATE_DCVDD1,
433 ARIZONA_ISOLATE_DCVDD1);
434 if (ret != 0) {
435 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
436 ret);
437 return ret;
438 }
439 }
440
441 regulator_disable(arizona->dcvdd);
442 regcache_cache_only(arizona->regmap, true);
443 regcache_mark_dirty(arizona->regmap);
444
445 return 0;
446}
447#endif
448
449#ifdef CONFIG_PM_SLEEP
450static int arizona_suspend(struct device *dev)
451{
452 struct arizona *arizona = dev_get_drvdata(dev);
453
454 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
455 disable_irq(arizona->irq);
456
457 return 0;
458}
459
460static int arizona_suspend_late(struct device *dev)
461{
462 struct arizona *arizona = dev_get_drvdata(dev);
463
464 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
465 enable_irq(arizona->irq);
466
467 return 0;
468}
469
470static int arizona_resume_noirq(struct device *dev)
471{
472 struct arizona *arizona = dev_get_drvdata(dev);
473
474 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
475 disable_irq(arizona->irq);
476
477 return 0;
478}
479
480static int arizona_resume(struct device *dev)
481{
482 struct arizona *arizona = dev_get_drvdata(dev);
483
484 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
485 enable_irq(arizona->irq);
486
487 return 0;
488}
489#endif
490
491const struct dev_pm_ops arizona_pm_ops = {
492 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
493 arizona_runtime_resume,
494 NULL)
495 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
496#ifdef CONFIG_PM_SLEEP
497 .suspend_late = arizona_suspend_late,
498 .resume_noirq = arizona_resume_noirq,
499#endif
500};
501EXPORT_SYMBOL_GPL(arizona_pm_ops);
502
503#ifdef CONFIG_OF
504int arizona_of_get_type(struct device *dev)
505{
506 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
507
508 if (id)
509 return (int)id->data;
510 else
511 return 0;
512}
513EXPORT_SYMBOL_GPL(arizona_of_get_type);
514
515static int arizona_of_get_core_pdata(struct arizona *arizona)
516{
517 int ret, i;
518
519 arizona->pdata.reset = of_get_named_gpio(arizona->dev->of_node,
520 "wlf,reset", 0);
521 if (arizona->pdata.reset < 0)
522 arizona->pdata.reset = 0;
523
524 arizona->pdata.ldoena = of_get_named_gpio(arizona->dev->of_node,
525 "wlf,ldoena", 0);
526 if (arizona->pdata.ldoena < 0)
527 arizona->pdata.ldoena = 0;
528
529 ret = of_property_read_u32_array(arizona->dev->of_node,
530 "wlf,gpio-defaults",
531 arizona->pdata.gpio_defaults,
532 ARRAY_SIZE(arizona->pdata.gpio_defaults));
533 if (ret >= 0) {
534
535
536
537
538
539
540 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
541 if (arizona->pdata.gpio_defaults[i] > 0xffff)
542 arizona->pdata.gpio_defaults[i] = 0;
543 if (arizona->pdata.gpio_defaults[i] == 0)
544 arizona->pdata.gpio_defaults[i] = 0x10000;
545 }
546 } else {
547 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
548 ret);
549 }
550
551 return 0;
552}
553
554const struct of_device_id arizona_of_match[] = {
555 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
556 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
557 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
558 {},
559};
560EXPORT_SYMBOL_GPL(arizona_of_match);
561#else
562static inline int arizona_of_get_core_pdata(struct arizona *arizona)
563{
564 return 0;
565}
566#endif
567
568static struct mfd_cell early_devs[] = {
569 { .name = "arizona-ldo1" },
570};
571
572static struct mfd_cell wm5102_devs[] = {
573 { .name = "arizona-micsupp" },
574 { .name = "arizona-extcon" },
575 { .name = "arizona-gpio" },
576 { .name = "arizona-haptics" },
577 { .name = "arizona-pwm" },
578 { .name = "wm5102-codec" },
579};
580
581static struct mfd_cell wm5110_devs[] = {
582 { .name = "arizona-micsupp" },
583 { .name = "arizona-extcon" },
584 { .name = "arizona-gpio" },
585 { .name = "arizona-haptics" },
586 { .name = "arizona-pwm" },
587 { .name = "wm5110-codec" },
588};
589
590static struct mfd_cell wm8997_devs[] = {
591 { .name = "arizona-micsupp" },
592 { .name = "arizona-extcon" },
593 { .name = "arizona-gpio" },
594 { .name = "arizona-haptics" },
595 { .name = "arizona-pwm" },
596 { .name = "wm8997-codec" },
597};
598
599int arizona_dev_init(struct arizona *arizona)
600{
601 struct device *dev = arizona->dev;
602 const char *type_name;
603 unsigned int reg, val;
604 int (*apply_patch)(struct arizona *) = NULL;
605 int ret, i;
606
607 dev_set_drvdata(arizona->dev, arizona);
608 mutex_init(&arizona->clk_lock);
609
610 arizona_of_get_core_pdata(arizona);
611
612 if (dev_get_platdata(arizona->dev))
613 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
614 sizeof(arizona->pdata));
615
616 regcache_cache_only(arizona->regmap, true);
617
618 switch (arizona->type) {
619 case WM5102:
620 case WM5110:
621 case WM8997:
622 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
623 arizona->core_supplies[i].supply
624 = wm5102_core_supplies[i];
625 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
626 break;
627 default:
628 dev_err(arizona->dev, "Unknown device type %d\n",
629 arizona->type);
630 return -EINVAL;
631 }
632
633 ret = mfd_add_devices(arizona->dev, -1, early_devs,
634 ARRAY_SIZE(early_devs), NULL, 0, NULL);
635 if (ret != 0) {
636 dev_err(dev, "Failed to add early children: %d\n", ret);
637 return ret;
638 }
639
640 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
641 arizona->core_supplies);
642 if (ret != 0) {
643 dev_err(dev, "Failed to request core supplies: %d\n",
644 ret);
645 goto err_early;
646 }
647
648 arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
649 if (IS_ERR(arizona->dcvdd)) {
650 ret = PTR_ERR(arizona->dcvdd);
651 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
652 goto err_early;
653 }
654
655 if (arizona->pdata.reset) {
656
657 ret = gpio_request_one(arizona->pdata.reset,
658 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
659 "arizona /RESET");
660 if (ret != 0) {
661 dev_err(dev, "Failed to request /RESET: %d\n", ret);
662 goto err_early;
663 }
664 }
665
666 ret = regulator_bulk_enable(arizona->num_core_supplies,
667 arizona->core_supplies);
668 if (ret != 0) {
669 dev_err(dev, "Failed to enable core supplies: %d\n",
670 ret);
671 goto err_early;
672 }
673
674 ret = regulator_enable(arizona->dcvdd);
675 if (ret != 0) {
676 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
677 goto err_enable;
678 }
679
680 if (arizona->pdata.reset) {
681 gpio_set_value_cansleep(arizona->pdata.reset, 1);
682 msleep(1);
683 }
684
685 regcache_cache_only(arizona->regmap, false);
686
687
688 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
689 if (ret != 0) {
690 dev_err(dev, "Failed to read ID register: %d\n", ret);
691 goto err_reset;
692 }
693
694 switch (reg) {
695 case 0x5102:
696 case 0x5110:
697 case 0x8997:
698 break;
699 default:
700 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
701 goto err_reset;
702 }
703
704
705 if (!arizona->pdata.reset) {
706 regcache_mark_dirty(arizona->regmap);
707
708 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
709 if (ret != 0) {
710 dev_err(dev, "Failed to reset device: %d\n", ret);
711 goto err_reset;
712 }
713
714 msleep(1);
715
716 ret = regcache_sync(arizona->regmap);
717 if (ret != 0) {
718 dev_err(dev, "Failed to sync device: %d\n", ret);
719 goto err_reset;
720 }
721 }
722
723
724 switch (arizona->type) {
725 case WM5102:
726 ret = regmap_read(arizona->regmap, 0x19, &val);
727 if (ret != 0)
728 dev_err(dev,
729 "Failed to check write sequencer state: %d\n",
730 ret);
731 else if (val & 0x01)
732 break;
733
734 default:
735 ret = arizona_wait_for_boot(arizona);
736 if (ret != 0) {
737 dev_err(arizona->dev,
738 "Device failed initial boot: %d\n", ret);
739 goto err_reset;
740 }
741 break;
742 }
743
744
745 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
746 if (ret != 0) {
747 dev_err(dev, "Failed to read ID register: %d\n", ret);
748 goto err_reset;
749 }
750
751 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
752 &arizona->rev);
753 if (ret != 0) {
754 dev_err(dev, "Failed to read revision register: %d\n", ret);
755 goto err_reset;
756 }
757 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
758
759 switch (reg) {
760#ifdef CONFIG_MFD_WM5102
761 case 0x5102:
762 type_name = "WM5102";
763 if (arizona->type != WM5102) {
764 dev_err(arizona->dev, "WM5102 registered as %d\n",
765 arizona->type);
766 arizona->type = WM5102;
767 }
768 apply_patch = wm5102_patch;
769 arizona->rev &= 0x7;
770 break;
771#endif
772#ifdef CONFIG_MFD_WM5110
773 case 0x5110:
774 type_name = "WM5110";
775 if (arizona->type != WM5110) {
776 dev_err(arizona->dev, "WM5110 registered as %d\n",
777 arizona->type);
778 arizona->type = WM5110;
779 }
780 apply_patch = wm5110_patch;
781 break;
782#endif
783#ifdef CONFIG_MFD_WM8997
784 case 0x8997:
785 type_name = "WM8997";
786 if (arizona->type != WM8997) {
787 dev_err(arizona->dev, "WM8997 registered as %d\n",
788 arizona->type);
789 arizona->type = WM8997;
790 }
791 apply_patch = wm8997_patch;
792 break;
793#endif
794 default:
795 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
796 goto err_reset;
797 }
798
799 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
800
801 if (apply_patch) {
802 ret = apply_patch(arizona);
803 if (ret != 0) {
804 dev_err(arizona->dev, "Failed to apply patch: %d\n",
805 ret);
806 goto err_reset;
807 }
808
809 switch (arizona->type) {
810 case WM5102:
811 ret = arizona_apply_hardware_patch(arizona);
812 if (ret != 0) {
813 dev_err(arizona->dev,
814 "Failed to apply hardware patch: %d\n",
815 ret);
816 goto err_reset;
817 }
818 break;
819 default:
820 break;
821 }
822 }
823
824 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
825 if (!arizona->pdata.gpio_defaults[i])
826 continue;
827
828 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
829 arizona->pdata.gpio_defaults[i]);
830 }
831
832
833
834
835
836 if (arizona->pdata.ldo1 &&
837 arizona->pdata.ldo1->num_consumer_supplies == 0)
838 arizona->external_dcvdd = true;
839
840 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
841 pm_runtime_use_autosuspend(arizona->dev);
842 pm_runtime_enable(arizona->dev);
843
844
845 if (!arizona->pdata.clk32k_src)
846 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
847
848 switch (arizona->pdata.clk32k_src) {
849 case ARIZONA_32KZ_MCLK1:
850 case ARIZONA_32KZ_MCLK2:
851 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
852 ARIZONA_CLK_32K_SRC_MASK,
853 arizona->pdata.clk32k_src - 1);
854 arizona_clk32k_enable(arizona);
855 break;
856 case ARIZONA_32KZ_NONE:
857 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
858 ARIZONA_CLK_32K_SRC_MASK, 2);
859 break;
860 default:
861 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
862 arizona->pdata.clk32k_src);
863 ret = -EINVAL;
864 goto err_reset;
865 }
866
867 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
868 if (!arizona->pdata.micbias[i].mV &&
869 !arizona->pdata.micbias[i].bypass)
870 continue;
871
872
873 if (!arizona->pdata.micbias[i].mV)
874 arizona->pdata.micbias[i].mV = 2800;
875
876 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
877
878 val <<= ARIZONA_MICB1_LVL_SHIFT;
879
880 if (arizona->pdata.micbias[i].ext_cap)
881 val |= ARIZONA_MICB1_EXT_CAP;
882
883 if (arizona->pdata.micbias[i].discharge)
884 val |= ARIZONA_MICB1_DISCH;
885
886 if (arizona->pdata.micbias[i].soft_start)
887 val |= ARIZONA_MICB1_RATE;
888
889 if (arizona->pdata.micbias[i].bypass)
890 val |= ARIZONA_MICB1_BYPASS;
891
892 regmap_update_bits(arizona->regmap,
893 ARIZONA_MIC_BIAS_CTRL_1 + i,
894 ARIZONA_MICB1_LVL_MASK |
895 ARIZONA_MICB1_DISCH |
896 ARIZONA_MICB1_BYPASS |
897 ARIZONA_MICB1_RATE, val);
898 }
899
900 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
901
902 val = arizona->pdata.dmic_ref[i]
903 << ARIZONA_IN1_DMIC_SUP_SHIFT;
904 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
905
906 regmap_update_bits(arizona->regmap,
907 ARIZONA_IN1L_CONTROL + (i * 8),
908 ARIZONA_IN1_DMIC_SUP_MASK |
909 ARIZONA_IN1_MODE_MASK, val);
910 }
911
912 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
913
914 if (arizona->pdata.out_mono[i])
915 val = ARIZONA_OUT1_MONO;
916 else
917 val = 0;
918
919 regmap_update_bits(arizona->regmap,
920 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
921 ARIZONA_OUT1_MONO, val);
922 }
923
924 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
925 if (arizona->pdata.spk_mute[i])
926 regmap_update_bits(arizona->regmap,
927 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
928 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
929 ARIZONA_SPK1_MUTE_SEQ1_MASK,
930 arizona->pdata.spk_mute[i]);
931
932 if (arizona->pdata.spk_fmt[i])
933 regmap_update_bits(arizona->regmap,
934 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
935 ARIZONA_SPK1_FMT_MASK,
936 arizona->pdata.spk_fmt[i]);
937 }
938
939
940 ret = arizona_irq_init(arizona);
941 if (ret != 0)
942 goto err_reset;
943
944 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
945 arizona_clkgen_err, arizona);
946 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
947 arizona_overclocked, arizona);
948 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
949 arizona_underclocked, arizona);
950
951 switch (arizona->type) {
952 case WM5102:
953 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
954 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
955 break;
956 case WM5110:
957 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
958 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
959 break;
960 case WM8997:
961 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
962 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
963 break;
964 }
965
966 if (ret != 0) {
967 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
968 goto err_irq;
969 }
970
971#ifdef CONFIG_PM_RUNTIME
972 regulator_disable(arizona->dcvdd);
973#endif
974
975 return 0;
976
977err_irq:
978 arizona_irq_exit(arizona);
979err_reset:
980 if (arizona->pdata.reset) {
981 gpio_set_value_cansleep(arizona->pdata.reset, 0);
982 gpio_free(arizona->pdata.reset);
983 }
984 regulator_disable(arizona->dcvdd);
985err_enable:
986 regulator_bulk_disable(arizona->num_core_supplies,
987 arizona->core_supplies);
988err_early:
989 mfd_remove_devices(dev);
990 return ret;
991}
992EXPORT_SYMBOL_GPL(arizona_dev_init);
993
994int arizona_dev_exit(struct arizona *arizona)
995{
996 mfd_remove_devices(arizona->dev);
997 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
998 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
999 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1000 pm_runtime_disable(arizona->dev);
1001 arizona_irq_exit(arizona);
1002 if (arizona->pdata.reset)
1003 gpio_set_value_cansleep(arizona->pdata.reset, 0);
1004 regulator_disable(arizona->dcvdd);
1005 regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies),
1006 arizona->core_supplies);
1007 return 0;
1008}
1009EXPORT_SYMBOL_GPL(arizona_dev_exit);
1010
