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18#ifndef __BNAD_H__
19#define __BNAD_H__
20
21#include <linux/rtnetlink.h>
22#include <linux/workqueue.h>
23#include <linux/ipv6.h>
24#include <linux/etherdevice.h>
25#include <linux/mutex.h>
26#include <linux/firmware.h>
27#include <linux/if_vlan.h>
28
29
30#include <asm/checksum.h>
31#include <net/ip6_checksum.h>
32
33#include <net/ip.h>
34#include <net/tcp.h>
35
36#include "bna.h"
37
38#define BNAD_TXQ_DEPTH 2048
39#define BNAD_RXQ_DEPTH 2048
40
41#define BNAD_MAX_TX 1
42#define BNAD_MAX_TXQ_PER_TX 8
43#define BNAD_TXQ_NUM 1
44
45#define BNAD_MAX_RX 1
46#define BNAD_MAX_RXP_PER_RX 16
47#define BNAD_MAX_RXQ_PER_RXP 2
48
49
50
51
52
53
54struct bnad_rx_ctrl {
55 struct bna_ccb *ccb;
56 struct bnad *bnad;
57 unsigned long flags;
58 struct napi_struct napi;
59 u64 rx_intr_ctr;
60 u64 rx_poll_ctr;
61 u64 rx_schedule;
62 u64 rx_keep_poll;
63 u64 rx_complete;
64};
65
66#define BNAD_RXMODE_PROMISC_DEFAULT BNA_RXMODE_PROMISC
67
68
69
70
71#define BNAD_NAME "bna"
72#define BNAD_NAME_LEN 64
73
74#define BNAD_VERSION "3.2.21.1"
75
76#define BNAD_MAILBOX_MSIX_INDEX 0
77#define BNAD_MAILBOX_MSIX_VECTORS 1
78#define BNAD_INTX_TX_IB_BITMASK 0x1
79#define BNAD_INTX_RX_IB_BITMASK 0x2
80
81#define BNAD_STATS_TIMER_FREQ 1000
82#define BNAD_DIM_TIMER_FREQ 1000
83
84#define BNAD_IOCETH_TIMEOUT 10000
85
86#define BNAD_MIN_Q_DEPTH 512
87#define BNAD_MAX_RXQ_DEPTH 2048
88#define BNAD_MAX_TXQ_DEPTH 2048
89
90#define BNAD_JUMBO_MTU 9000
91
92#define BNAD_NETIF_WAKE_THRESHOLD 8
93
94#define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3
95
96
97#define BNAD_TXQ_FREE_SENT 0
98#define BNAD_TXQ_TX_STARTED 1
99
100
101#define BNAD_RXQ_STARTED 0
102#define BNAD_RXQ_POST_OK 1
103
104
105#define BNAD_NUM_TXQ (bnad->num_tx * bnad->num_txq_per_tx)
106#define BNAD_NUM_RXP (bnad->num_rx * bnad->num_rxp_per_rx)
107
108
109
110
111
112
113enum bnad_intr_source {
114 BNAD_INTR_TX = 1,
115 BNAD_INTR_RX = 2
116};
117
118enum bnad_link_state {
119 BNAD_LS_DOWN = 0,
120 BNAD_LS_UP = 1
121};
122
123struct bnad_iocmd_comp {
124 struct bnad *bnad;
125 struct completion comp;
126 int comp_status;
127};
128
129struct bnad_completion {
130 struct completion ioc_comp;
131 struct completion ucast_comp;
132 struct completion mcast_comp;
133 struct completion tx_comp;
134 struct completion rx_comp;
135 struct completion stats_comp;
136 struct completion enet_comp;
137 struct completion mtu_comp;
138
139 u8 ioc_comp_status;
140 u8 ucast_comp_status;
141 u8 mcast_comp_status;
142 u8 tx_comp_status;
143 u8 rx_comp_status;
144 u8 stats_comp_status;
145 u8 port_comp_status;
146 u8 mtu_comp_status;
147};
148
149
150struct bnad_drv_stats {
151 u64 netif_queue_stop;
152 u64 netif_queue_wakeup;
153 u64 netif_queue_stopped;
154 u64 tso4;
155 u64 tso6;
156 u64 tso_err;
157 u64 tcpcsum_offload;
158 u64 udpcsum_offload;
159 u64 csum_help;
160 u64 tx_skb_too_short;
161 u64 tx_skb_stopping;
162 u64 tx_skb_max_vectors;
163 u64 tx_skb_mss_too_long;
164 u64 tx_skb_tso_too_short;
165 u64 tx_skb_tso_prepare;
166 u64 tx_skb_non_tso_too_long;
167 u64 tx_skb_tcp_hdr;
168 u64 tx_skb_udp_hdr;
169 u64 tx_skb_csum_err;
170 u64 tx_skb_headlen_too_long;
171 u64 tx_skb_headlen_zero;
172 u64 tx_skb_frag_zero;
173 u64 tx_skb_len_mismatch;
174
175 u64 hw_stats_updates;
176 u64 netif_rx_dropped;
177
178 u64 link_toggle;
179 u64 cee_toggle;
180
181 u64 rxp_info_alloc_failed;
182 u64 mbox_intr_disabled;
183 u64 mbox_intr_enabled;
184 u64 tx_unmap_q_alloc_failed;
185 u64 rx_unmap_q_alloc_failed;
186
187 u64 rxbuf_alloc_failed;
188};
189
190
191struct bnad_stats {
192 struct bnad_drv_stats drv_stats;
193 struct bna_stats *bna_stats;
194};
195
196
197struct bnad_tx_res_info {
198 struct bna_res_info res_info[BNA_TX_RES_T_MAX];
199};
200
201struct bnad_rx_res_info {
202 struct bna_res_info res_info[BNA_RX_RES_T_MAX];
203};
204
205struct bnad_tx_info {
206 struct bna_tx *tx;
207 struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
208 u32 tx_id;
209 struct delayed_work tx_cleanup_work;
210} ____cacheline_aligned;
211
212struct bnad_rx_info {
213 struct bna_rx *rx;
214
215 struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX];
216 u32 rx_id;
217 struct work_struct rx_cleanup_work;
218} ____cacheline_aligned;
219
220struct bnad_tx_vector {
221 DEFINE_DMA_UNMAP_ADDR(dma_addr);
222};
223
224struct bnad_tx_unmap {
225 struct sk_buff *skb;
226 u32 nvecs;
227 struct bnad_tx_vector vectors[BFI_TX_MAX_VECTORS_PER_WI];
228};
229
230struct bnad_rx_vector {
231 DEFINE_DMA_UNMAP_ADDR(dma_addr);
232 u32 len;
233};
234
235struct bnad_rx_unmap {
236 struct page *page;
237 u32 page_offset;
238 struct sk_buff *skb;
239 struct bnad_rx_vector vector;
240};
241
242enum bnad_rxbuf_type {
243 BNAD_RXBUF_NONE = 0,
244 BNAD_RXBUF_SKB = 1,
245 BNAD_RXBUF_PAGE = 2,
246 BNAD_RXBUF_MULTI = 3
247};
248
249#define BNAD_RXBUF_IS_PAGE(_type) ((_type) == BNAD_RXBUF_PAGE)
250
251struct bnad_rx_unmap_q {
252 int reuse_pi;
253 int alloc_order;
254 u32 map_size;
255 enum bnad_rxbuf_type type;
256 struct bnad_rx_unmap unmap[0];
257};
258
259
260#define BNAD_CF_DIM_ENABLED 0x01
261#define BNAD_CF_PROMISC 0x02
262#define BNAD_CF_ALLMULTI 0x04
263#define BNAD_CF_MSIX 0x08
264
265
266
267
268#define BNAD_RF_CEE_RUNNING 0
269#define BNAD_RF_MTU_SET 1
270#define BNAD_RF_MBOX_IRQ_DISABLED 2
271#define BNAD_RF_NETDEV_REGISTERED 3
272#define BNAD_RF_DIM_TIMER_RUNNING 4
273#define BNAD_RF_STATS_TIMER_RUNNING 5
274#define BNAD_RF_TX_PRIO_SET 6
275
276struct bnad {
277 struct net_device *netdev;
278 u32 id;
279 struct list_head list_entry;
280
281
282 struct bnad_tx_info tx_info[BNAD_MAX_TX];
283 struct bnad_rx_info rx_info[BNAD_MAX_RX];
284
285 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
286
287
288
289
290
291
292 u32 num_tx;
293 u32 num_rx;
294 u32 num_txq_per_tx;
295 u32 num_rxp_per_rx;
296
297 u32 txq_depth;
298 u32 rxq_depth;
299
300 u8 tx_coalescing_timeo;
301 u8 rx_coalescing_timeo;
302
303 struct bna_rx_config rx_config[BNAD_MAX_RX] ____cacheline_aligned;
304 struct bna_tx_config tx_config[BNAD_MAX_TX] ____cacheline_aligned;
305
306 void __iomem *bar0;
307
308 struct bna bna;
309
310 u32 cfg_flags;
311 unsigned long run_flags;
312
313 struct pci_dev *pcidev;
314 u64 mmio_start;
315 u64 mmio_len;
316
317 u32 msix_num;
318 struct msix_entry *msix_table;
319
320 struct mutex conf_mutex;
321 spinlock_t bna_lock ____cacheline_aligned;
322
323
324 struct timer_list ioc_timer;
325 struct timer_list dim_timer;
326 struct timer_list stats_timer;
327
328
329 struct bna_res_info res_info[BNA_RES_T_MAX];
330 struct bna_res_info mod_res_info[BNA_MOD_RES_T_MAX];
331 struct bnad_tx_res_info tx_res_info[BNAD_MAX_TX];
332 struct bnad_rx_res_info rx_res_info[BNAD_MAX_RX];
333
334 struct bnad_completion bnad_completions;
335
336
337 mac_t perm_addr;
338
339 struct workqueue_struct *work_q;
340
341
342 struct bnad_stats stats;
343
344 struct bnad_diag *diag;
345
346 char adapter_name[BNAD_NAME_LEN];
347 char port_name[BNAD_NAME_LEN];
348 char mbox_irq_name[BNAD_NAME_LEN];
349 char wq_name[BNAD_NAME_LEN];
350
351
352 char *regdata;
353 u32 reglen;
354 struct dentry *bnad_dentry_files[5];
355 struct dentry *port_debugfs_root;
356};
357
358struct bnad_drvinfo {
359 struct bfa_ioc_attr ioc_attr;
360 struct bfa_cee_attr cee_attr;
361 struct bfa_flash_attr flash_attr;
362 u32 cee_status;
363 u32 flash_status;
364};
365
366
367
368
369extern const struct firmware *bfi_fw;
370extern u32 bnad_rxqs_per_cq;
371
372
373
374
375extern u32 *cna_get_firmware_buf(struct pci_dev *pdev);
376
377extern void bnad_set_rx_mode(struct net_device *netdev);
378extern struct net_device_stats *bnad_get_netdev_stats(
379 struct net_device *netdev);
380extern int bnad_mac_addr_set_locked(struct bnad *bnad, u8 *mac_addr);
381extern int bnad_enable_default_bcast(struct bnad *bnad);
382extern void bnad_restore_vlans(struct bnad *bnad, u32 rx_id);
383extern void bnad_set_ethtool_ops(struct net_device *netdev);
384extern void bnad_cb_completion(void *arg, enum bfa_status status);
385
386
387extern void bnad_tx_coalescing_timeo_set(struct bnad *bnad);
388extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
389
390extern int bnad_setup_rx(struct bnad *bnad, u32 rx_id);
391extern int bnad_setup_tx(struct bnad *bnad, u32 tx_id);
392extern void bnad_destroy_tx(struct bnad *bnad, u32 tx_id);
393extern void bnad_destroy_rx(struct bnad *bnad, u32 rx_id);
394
395
396extern void bnad_dim_timer_start(struct bnad *bnad);
397
398
399extern void bnad_netdev_qstats_fill(struct bnad *bnad,
400 struct rtnl_link_stats64 *stats);
401extern void bnad_netdev_hwstats_fill(struct bnad *bnad,
402 struct rtnl_link_stats64 *stats);
403
404
405void bnad_debugfs_init(struct bnad *bnad);
406void bnad_debugfs_uninit(struct bnad *bnad);
407
408
409
410#define BNAD_UPDATE_CTR(_bnad, _ctr) \
411 (((_bnad)->stats.drv_stats._ctr)++)
412
413#define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr)
414
415#define bnad_enable_rx_irq_unsafe(_ccb) \
416{ \
417 if (likely(test_bit(BNAD_RXQ_STARTED, &(_ccb)->rcb[0]->flags))) {\
418 bna_ib_coalescing_timer_set((_ccb)->i_dbell, \
419 (_ccb)->rx_coalescing_timeo); \
420 bna_ib_ack((_ccb)->i_dbell, 0); \
421 } \
422}
423
424#endif
425
