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34#include <linux/workqueue.h>
35#include <linux/module.h>
36
37#include "mlx4.h"
38
39enum {
40 MLX4_CATAS_POLL_INTERVAL = 5 * HZ,
41};
42
43static DEFINE_SPINLOCK(catas_lock);
44
45static LIST_HEAD(catas_list);
46static struct work_struct catas_work;
47
48static int internal_err_reset = 1;
49module_param(internal_err_reset, int, 0644);
50MODULE_PARM_DESC(internal_err_reset,
51 "Reset device on internal errors if non-zero"
52 " (default 1, in SRIOV mode default is 0)");
53
54static void dump_err_buf(struct mlx4_dev *dev)
55{
56 struct mlx4_priv *priv = mlx4_priv(dev);
57
58 int i;
59
60 mlx4_err(dev, "Internal error detected:\n");
61 for (i = 0; i < priv->fw.catas_size; ++i)
62 mlx4_err(dev, " buf[%02x]: %08x\n",
63 i, swab32(readl(priv->catas_err.map + i)));
64}
65
66static void poll_catas(unsigned long dev_ptr)
67{
68 struct mlx4_dev *dev = (struct mlx4_dev *) dev_ptr;
69 struct mlx4_priv *priv = mlx4_priv(dev);
70
71 if (readl(priv->catas_err.map)) {
72
73 if (pci_channel_offline(dev->pdev))
74 mod_timer(&priv->catas_err.timer,
75 round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL));
76 else {
77 dump_err_buf(dev);
78 mlx4_dispatch_event(dev, MLX4_DEV_EVENT_CATASTROPHIC_ERROR, 0);
79
80 if (internal_err_reset) {
81 spin_lock(&catas_lock);
82 list_add(&priv->catas_err.list, &catas_list);
83 spin_unlock(&catas_lock);
84
85 queue_work(mlx4_wq, &catas_work);
86 }
87 }
88 } else
89 mod_timer(&priv->catas_err.timer,
90 round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL));
91}
92
93static void catas_reset(struct work_struct *work)
94{
95 struct mlx4_priv *priv, *tmppriv;
96 struct mlx4_dev *dev;
97
98 LIST_HEAD(tlist);
99 int ret;
100
101 spin_lock_irq(&catas_lock);
102 list_splice_init(&catas_list, &tlist);
103 spin_unlock_irq(&catas_lock);
104
105 list_for_each_entry_safe(priv, tmppriv, &tlist, catas_err.list) {
106 struct pci_dev *pdev = priv->dev.pdev;
107
108
109 if (pci_channel_offline(pdev))
110 continue;
111
112 ret = mlx4_restart_one(priv->dev.pdev);
113
114 if (ret)
115 pr_err("mlx4 %s: Reset failed (%d)\n",
116 pci_name(pdev), ret);
117 else {
118 dev = pci_get_drvdata(pdev);
119 mlx4_dbg(dev, "Reset succeeded\n");
120 }
121 }
122}
123
124void mlx4_start_catas_poll(struct mlx4_dev *dev)
125{
126 struct mlx4_priv *priv = mlx4_priv(dev);
127 phys_addr_t addr;
128
129
130 if (mlx4_is_mfunc(dev))
131 internal_err_reset = 0;
132
133 INIT_LIST_HEAD(&priv->catas_err.list);
134 init_timer(&priv->catas_err.timer);
135 priv->catas_err.map = NULL;
136
137 addr = pci_resource_start(dev->pdev, priv->fw.catas_bar) +
138 priv->fw.catas_offset;
139
140 priv->catas_err.map = ioremap(addr, priv->fw.catas_size * 4);
141 if (!priv->catas_err.map) {
142 mlx4_warn(dev, "Failed to map internal error buffer at 0x%llx\n",
143 (unsigned long long) addr);
144 return;
145 }
146
147 priv->catas_err.timer.data = (unsigned long) dev;
148 priv->catas_err.timer.function = poll_catas;
149 priv->catas_err.timer.expires =
150 round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL);
151 add_timer(&priv->catas_err.timer);
152}
153
154void mlx4_stop_catas_poll(struct mlx4_dev *dev)
155{
156 struct mlx4_priv *priv = mlx4_priv(dev);
157
158 del_timer_sync(&priv->catas_err.timer);
159
160 if (priv->catas_err.map)
161 iounmap(priv->catas_err.map);
162
163 spin_lock_irq(&catas_lock);
164 list_del(&priv->catas_err.list);
165 spin_unlock_irq(&catas_lock);
166}
167
168void __init mlx4_catas_init(void)
169{
170 INIT_WORK(&catas_work, catas_reset);
171}
172