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34#include <linux/cpumask.h>
35#include <linux/module.h>
36#include <linux/delay.h>
37#include <linux/netdevice.h>
38#include <linux/slab.h>
39
40#include <linux/mlx4/driver.h>
41#include <linux/mlx4/device.h>
42#include <linux/mlx4/cmd.h>
43
44#include "mlx4_en.h"
45
46MODULE_AUTHOR("Liran Liss, Yevgeny Petrilin");
47MODULE_DESCRIPTION("Mellanox ConnectX HCA Ethernet driver");
48MODULE_LICENSE("Dual BSD/GPL");
49MODULE_VERSION(DRV_VERSION " ("DRV_RELDATE")");
50
51static const char mlx4_en_version[] =
52 DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v"
53 DRV_VERSION " (" DRV_RELDATE ")\n";
54
55#define MLX4_EN_PARM_INT(X, def_val, desc) \
56 static unsigned int X = def_val;\
57 module_param(X , uint, 0444); \
58 MODULE_PARM_DESC(X, desc);
59
60
61
62
63
64
65
66MLX4_EN_PARM_INT(udp_rss, 1,
67 "Enable RSS for incoming UDP traffic or disabled (0)");
68
69
70MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
71 " Per priority bit mask");
72MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
73 " Per priority bit mask");
74
75int en_print(const char *level, const struct mlx4_en_priv *priv,
76 const char *format, ...)
77{
78 va_list args;
79 struct va_format vaf;
80 int i;
81
82 va_start(args, format);
83
84 vaf.fmt = format;
85 vaf.va = &args;
86 if (priv->registered)
87 i = printk("%s%s: %s: %pV",
88 level, DRV_NAME, priv->dev->name, &vaf);
89 else
90 i = printk("%s%s: %s: Port %d: %pV",
91 level, DRV_NAME, dev_name(&priv->mdev->pdev->dev),
92 priv->port, &vaf);
93 va_end(args);
94
95 return i;
96}
97
98void mlx4_en_update_loopback_state(struct net_device *dev,
99 netdev_features_t features)
100{
101 struct mlx4_en_priv *priv = netdev_priv(dev);
102
103 priv->flags &= ~(MLX4_EN_FLAG_RX_FILTER_NEEDED|
104 MLX4_EN_FLAG_ENABLE_HW_LOOPBACK);
105
106
107
108
109 if (mlx4_is_mfunc(priv->mdev->dev) &&
110 !(features & NETIF_F_LOOPBACK) && !priv->validate_loopback)
111 priv->flags |= MLX4_EN_FLAG_RX_FILTER_NEEDED;
112
113
114
115
116 if (mlx4_is_mfunc(priv->mdev->dev) || priv->validate_loopback)
117 priv->flags |= MLX4_EN_FLAG_ENABLE_HW_LOOPBACK;
118}
119
120static int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
121{
122 struct mlx4_en_profile *params = &mdev->profile;
123 int i;
124
125 params->udp_rss = udp_rss;
126 params->num_tx_rings_p_up = min_t(int, num_online_cpus(),
127 MLX4_EN_MAX_TX_RING_P_UP);
128 if (params->udp_rss && !(mdev->dev->caps.flags
129 & MLX4_DEV_CAP_FLAG_UDP_RSS)) {
130 mlx4_warn(mdev, "UDP RSS is not supported on this device.\n");
131 params->udp_rss = 0;
132 }
133 for (i = 1; i <= MLX4_MAX_PORTS; i++) {
134 params->prof[i].rx_pause = 1;
135 params->prof[i].rx_ppp = pfcrx;
136 params->prof[i].tx_pause = 1;
137 params->prof[i].tx_ppp = pfctx;
138 params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE;
139 params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE;
140 params->prof[i].tx_ring_num = params->num_tx_rings_p_up *
141 MLX4_EN_NUM_UP;
142 params->prof[i].rss_rings = 0;
143 }
144
145 return 0;
146}
147
148static void *mlx4_en_get_netdev(struct mlx4_dev *dev, void *ctx, u8 port)
149{
150 struct mlx4_en_dev *endev = ctx;
151
152 return endev->pndev[port];
153}
154
155static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr,
156 enum mlx4_dev_event event, unsigned long port)
157{
158 struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr;
159 struct mlx4_en_priv *priv;
160
161 switch (event) {
162 case MLX4_DEV_EVENT_PORT_UP:
163 case MLX4_DEV_EVENT_PORT_DOWN:
164 if (!mdev->pndev[port])
165 return;
166 priv = netdev_priv(mdev->pndev[port]);
167
168
169 priv->link_state = event;
170 queue_work(mdev->workqueue, &priv->linkstate_task);
171 break;
172
173 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
174 mlx4_err(mdev, "Internal error detected, restarting device\n");
175 break;
176
177 default:
178 if (port < 1 || port > dev->caps.num_ports ||
179 !mdev->pndev[port])
180 return;
181 mlx4_warn(mdev, "Unhandled event %d for port %d\n", event,
182 (int) port);
183 }
184}
185
186static void mlx4_en_remove(struct mlx4_dev *dev, void *endev_ptr)
187{
188 struct mlx4_en_dev *mdev = endev_ptr;
189 int i;
190
191 mutex_lock(&mdev->state_lock);
192 mdev->device_up = false;
193 mutex_unlock(&mdev->state_lock);
194
195 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
196 if (mdev->pndev[i])
197 mlx4_en_destroy_netdev(mdev->pndev[i]);
198
199 flush_workqueue(mdev->workqueue);
200 destroy_workqueue(mdev->workqueue);
201 (void) mlx4_mr_free(dev, &mdev->mr);
202 iounmap(mdev->uar_map);
203 mlx4_uar_free(dev, &mdev->priv_uar);
204 mlx4_pd_free(dev, mdev->priv_pdn);
205 kfree(mdev);
206}
207
208static void *mlx4_en_add(struct mlx4_dev *dev)
209{
210 struct mlx4_en_dev *mdev;
211 int i;
212 int err;
213
214 printk_once(KERN_INFO "%s", mlx4_en_version);
215
216 mdev = kzalloc(sizeof(*mdev), GFP_KERNEL);
217 if (!mdev) {
218 err = -ENOMEM;
219 goto err_free_res;
220 }
221
222 if (mlx4_pd_alloc(dev, &mdev->priv_pdn))
223 goto err_free_dev;
224
225 if (mlx4_uar_alloc(dev, &mdev->priv_uar))
226 goto err_pd;
227
228 mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT,
229 PAGE_SIZE);
230 if (!mdev->uar_map)
231 goto err_uar;
232 spin_lock_init(&mdev->uar_lock);
233
234 mdev->dev = dev;
235 mdev->dma_device = &(dev->pdev->dev);
236 mdev->pdev = dev->pdev;
237 mdev->device_up = false;
238
239 mdev->LSO_support = !!(dev->caps.flags & (1 << 15));
240 if (!mdev->LSO_support)
241 mlx4_warn(mdev, "LSO not supported, please upgrade to later "
242 "FW version to enable LSO\n");
243
244 if (mlx4_mr_alloc(mdev->dev, mdev->priv_pdn, 0, ~0ull,
245 MLX4_PERM_LOCAL_WRITE | MLX4_PERM_LOCAL_READ,
246 0, 0, &mdev->mr)) {
247 mlx4_err(mdev, "Failed allocating memory region\n");
248 goto err_map;
249 }
250 if (mlx4_mr_enable(mdev->dev, &mdev->mr)) {
251 mlx4_err(mdev, "Failed enabling memory region\n");
252 goto err_mr;
253 }
254
255
256 err = mlx4_en_get_profile(mdev);
257 if (err) {
258 mlx4_err(mdev, "Bad module parameters, aborting.\n");
259 goto err_mr;
260 }
261
262
263 mdev->port_cnt = 0;
264 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
265 mdev->port_cnt++;
266
267 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
268 if (!dev->caps.comp_pool) {
269 mdev->profile.prof[i].rx_ring_num =
270 rounddown_pow_of_two(max_t(int, MIN_RX_RINGS,
271 min_t(int,
272 dev->caps.num_comp_vectors,
273 DEF_RX_RINGS)));
274 } else {
275 mdev->profile.prof[i].rx_ring_num = rounddown_pow_of_two(
276 min_t(int, dev->caps.comp_pool/
277 dev->caps.num_ports - 1 , MAX_MSIX_P_PORT - 1));
278 }
279 }
280
281
282
283
284 mdev->workqueue = create_singlethread_workqueue("mlx4_en");
285 if (!mdev->workqueue) {
286 err = -ENOMEM;
287 goto err_mr;
288 }
289
290
291
292 mutex_init(&mdev->state_lock);
293 mdev->device_up = true;
294
295
296
297
298 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
299 mlx4_info(mdev, "Activating port:%d\n", i);
300 if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i]))
301 mdev->pndev[i] = NULL;
302 }
303
304
305 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
306 mlx4_en_init_timestamp(mdev);
307
308 return mdev;
309
310err_mr:
311 (void) mlx4_mr_free(dev, &mdev->mr);
312err_map:
313 if (mdev->uar_map)
314 iounmap(mdev->uar_map);
315err_uar:
316 mlx4_uar_free(dev, &mdev->priv_uar);
317err_pd:
318 mlx4_pd_free(dev, mdev->priv_pdn);
319err_free_dev:
320 kfree(mdev);
321err_free_res:
322 return NULL;
323}
324
325static struct mlx4_interface mlx4_en_interface = {
326 .add = mlx4_en_add,
327 .remove = mlx4_en_remove,
328 .event = mlx4_en_event,
329 .get_dev = mlx4_en_get_netdev,
330 .protocol = MLX4_PROT_ETH,
331};
332
333static int __init mlx4_en_init(void)
334{
335 return mlx4_register_interface(&mlx4_en_interface);
336}
337
338static void __exit mlx4_en_cleanup(void)
339{
340 mlx4_unregister_interface(&mlx4_en_interface);
341}
342
343module_init(mlx4_en_init);
344module_exit(mlx4_en_cleanup);
345
346
