linux/drivers/net/wireless/ath/ath10k/rx_desc.h
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   1/*
   2 * Copyright (c) 2005-2011 Atheros Communications Inc.
   3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
   4 *
   5 * Permission to use, copy, modify, and/or distribute this software for any
   6 * purpose with or without fee is hereby granted, provided that the above
   7 * copyright notice and this permission notice appear in all copies.
   8 *
   9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16 */
  17
  18#ifndef _RX_DESC_H_
  19#define _RX_DESC_H_
  20
  21enum rx_attention_flags {
  22        RX_ATTENTION_FLAGS_FIRST_MPDU          = 1 << 0,
  23        RX_ATTENTION_FLAGS_LAST_MPDU           = 1 << 1,
  24        RX_ATTENTION_FLAGS_MCAST_BCAST         = 1 << 2,
  25        RX_ATTENTION_FLAGS_PEER_IDX_INVALID    = 1 << 3,
  26        RX_ATTENTION_FLAGS_PEER_IDX_TIMEOUT    = 1 << 4,
  27        RX_ATTENTION_FLAGS_POWER_MGMT          = 1 << 5,
  28        RX_ATTENTION_FLAGS_NON_QOS             = 1 << 6,
  29        RX_ATTENTION_FLAGS_NULL_DATA           = 1 << 7,
  30        RX_ATTENTION_FLAGS_MGMT_TYPE           = 1 << 8,
  31        RX_ATTENTION_FLAGS_CTRL_TYPE           = 1 << 9,
  32        RX_ATTENTION_FLAGS_MORE_DATA           = 1 << 10,
  33        RX_ATTENTION_FLAGS_EOSP                = 1 << 11,
  34        RX_ATTENTION_FLAGS_U_APSD_TRIGGER      = 1 << 12,
  35        RX_ATTENTION_FLAGS_FRAGMENT            = 1 << 13,
  36        RX_ATTENTION_FLAGS_ORDER               = 1 << 14,
  37        RX_ATTENTION_FLAGS_CLASSIFICATION      = 1 << 15,
  38        RX_ATTENTION_FLAGS_OVERFLOW_ERR        = 1 << 16,
  39        RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR     = 1 << 17,
  40        RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL = 1 << 18,
  41        RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL      = 1 << 19,
  42        RX_ATTENTION_FLAGS_SA_IDX_INVALID      = 1 << 20,
  43        RX_ATTENTION_FLAGS_DA_IDX_INVALID      = 1 << 21,
  44        RX_ATTENTION_FLAGS_SA_IDX_TIMEOUT      = 1 << 22,
  45        RX_ATTENTION_FLAGS_DA_IDX_TIMEOUT      = 1 << 23,
  46        RX_ATTENTION_FLAGS_ENCRYPT_REQUIRED    = 1 << 24,
  47        RX_ATTENTION_FLAGS_DIRECTED            = 1 << 25,
  48        RX_ATTENTION_FLAGS_BUFFER_FRAGMENT     = 1 << 26,
  49        RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR     = 1 << 27,
  50        RX_ATTENTION_FLAGS_TKIP_MIC_ERR        = 1 << 28,
  51        RX_ATTENTION_FLAGS_DECRYPT_ERR         = 1 << 29,
  52        RX_ATTENTION_FLAGS_FCS_ERR             = 1 << 30,
  53        RX_ATTENTION_FLAGS_MSDU_DONE           = 1 << 31,
  54};
  55
  56struct rx_attention {
  57        __le32 flags; /* %RX_ATTENTION_FLAGS_ */
  58} __packed;
  59
  60/*
  61 * first_mpdu
  62 *              Indicates the first MSDU of the PPDU.  If both first_mpdu
  63 *              and last_mpdu are set in the MSDU then this is a not an
  64 *              A-MPDU frame but a stand alone MPDU.  Interior MPDU in an
  65 *              A-MPDU shall have both first_mpdu and last_mpdu bits set to
  66 *              0.  The PPDU start status will only be valid when this bit
  67 *              is set.
  68 *
  69 * last_mpdu
  70 *              Indicates the last MSDU of the last MPDU of the PPDU.  The
  71 *              PPDU end status will only be valid when this bit is set.
  72 *
  73 * mcast_bcast
  74 *              Multicast / broadcast indicator.  Only set when the MAC
  75 *              address 1 bit 0 is set indicating mcast/bcast and the BSSID
  76 *              matches one of the 4 BSSID registers. Only set when
  77 *              first_msdu is set.
  78 *
  79 * peer_idx_invalid
  80 *              Indicates no matching entries within the the max search
  81 *              count.  Only set when first_msdu is set.
  82 *
  83 * peer_idx_timeout
  84 *              Indicates an unsuccessful search for the peer index due to
  85 *              timeout.  Only set when first_msdu is set.
  86 *
  87 * power_mgmt
  88 *              Power management bit set in the 802.11 header.  Only set
  89 *              when first_msdu is set.
  90 *
  91 * non_qos
  92 *              Set if packet is not a non-QoS data frame.  Only set when
  93 *              first_msdu is set.
  94 *
  95 * null_data
  96 *              Set if frame type indicates either null data or QoS null
  97 *              data format.  Only set when first_msdu is set.
  98 *
  99 * mgmt_type
 100 *              Set if packet is a management packet.  Only set when
 101 *              first_msdu is set.
 102 *
 103 * ctrl_type
 104 *              Set if packet is a control packet.  Only set when first_msdu
 105 *              is set.
 106 *
 107 * more_data
 108 *              Set if more bit in frame control is set.  Only set when
 109 *              first_msdu is set.
 110 *
 111 * eosp
 112 *              Set if the EOSP (end of service period) bit in the QoS
 113 *              control field is set.  Only set when first_msdu is set.
 114 *
 115 * u_apsd_trigger
 116 *              Set if packet is U-APSD trigger.  Key table will have bits
 117 *              per TID to indicate U-APSD trigger.
 118 *
 119 * fragment
 120 *              Indicates that this is an 802.11 fragment frame.  This is
 121 *              set when either the more_frag bit is set in the frame
 122 *              control or the fragment number is not zero.  Only set when
 123 *              first_msdu is set.
 124 *
 125 * order
 126 *              Set if the order bit in the frame control is set.  Only set
 127 *              when first_msdu is set.
 128 *
 129 * classification
 130 *              Indicates that this status has a corresponding MSDU that
 131 *              requires FW processing.  The OLE will have classification
 132 *              ring mask registers which will indicate the ring(s) for
 133 *              packets and descriptors which need FW attention.
 134 *
 135 * overflow_err
 136 *              PCU Receive FIFO does not have enough space to store the
 137 *              full receive packet.  Enough space is reserved in the
 138 *              receive FIFO for the status is written.  This MPDU remaining
 139 *              packets in the PPDU will be filtered and no Ack response
 140 *              will be transmitted.
 141 *
 142 * msdu_length_err
 143 *              Indicates that the MSDU length from the 802.3 encapsulated
 144 *              length field extends beyond the MPDU boundary.
 145 *
 146 * tcp_udp_chksum_fail
 147 *              Indicates that the computed checksum (tcp_udp_chksum) did
 148 *              not match the checksum in the TCP/UDP header.
 149 *
 150 * ip_chksum_fail
 151 *              Indicates that the computed checksum did not match the
 152 *              checksum in the IP header.
 153 *
 154 * sa_idx_invalid
 155 *              Indicates no matching entry was found in the address search
 156 *              table for the source MAC address.
 157 *
 158 * da_idx_invalid
 159 *              Indicates no matching entry was found in the address search
 160 *              table for the destination MAC address.
 161 *
 162 * sa_idx_timeout
 163 *              Indicates an unsuccessful search for the source MAC address
 164 *              due to the expiring of the search timer.
 165 *
 166 * da_idx_timeout
 167 *              Indicates an unsuccessful search for the destination MAC
 168 *              address due to the expiring of the search timer.
 169 *
 170 * encrypt_required
 171 *              Indicates that this data type frame is not encrypted even if
 172 *              the policy for this MPDU requires encryption as indicated in
 173 *              the peer table key type.
 174 *
 175 * directed
 176 *              MPDU is a directed packet which means that the RA matched
 177 *              our STA addresses.  In proxySTA it means that the TA matched
 178 *              an entry in our address search table with the corresponding
 179 *              'no_ack' bit is the address search entry cleared.
 180 *
 181 * buffer_fragment
 182 *              Indicates that at least one of the rx buffers has been
 183 *              fragmented.  If set the FW should look at the rx_frag_info
 184 *              descriptor described below.
 185 *
 186 * mpdu_length_err
 187 *              Indicates that the MPDU was pre-maturely terminated
 188 *              resulting in a truncated MPDU.  Don't trust the MPDU length
 189 *              field.
 190 *
 191 * tkip_mic_err
 192 *              Indicates that the MPDU Michael integrity check failed
 193 *
 194 * decrypt_err
 195 *              Indicates that the MPDU decrypt integrity check failed
 196 *
 197 * fcs_err
 198 *              Indicates that the MPDU FCS check failed
 199 *
 200 * msdu_done
 201 *              If set indicates that the RX packet data, RX header data, RX
 202 *              PPDU start descriptor, RX MPDU start/end descriptor, RX MSDU
 203 *              start/end descriptors and RX Attention descriptor are all
 204 *              valid.  This bit must be in the last octet of the
 205 *              descriptor.
 206 */
 207
 208struct rx_frag_info {
 209        u8 ring0_more_count;
 210        u8 ring1_more_count;
 211        u8 ring2_more_count;
 212        u8 ring3_more_count;
 213} __packed;
 214
 215/*
 216 * ring0_more_count
 217 *              Indicates the number of more buffers associated with RX DMA
 218 *              ring 0.  Field is filled in by the RX_DMA.
 219 *
 220 * ring1_more_count
 221 *              Indicates the number of more buffers associated with RX DMA
 222 *              ring 1. Field is filled in by the RX_DMA.
 223 *
 224 * ring2_more_count
 225 *              Indicates the number of more buffers associated with RX DMA
 226 *              ring 2. Field is filled in by the RX_DMA.
 227 *
 228 * ring3_more_count
 229 *              Indicates the number of more buffers associated with RX DMA
 230 *              ring 3. Field is filled in by the RX_DMA.
 231 */
 232
 233enum htt_rx_mpdu_encrypt_type {
 234        HTT_RX_MPDU_ENCRYPT_WEP40            = 0,
 235        HTT_RX_MPDU_ENCRYPT_WEP104           = 1,
 236        HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC = 2,
 237        HTT_RX_MPDU_ENCRYPT_WEP128           = 3,
 238        HTT_RX_MPDU_ENCRYPT_TKIP_WPA         = 4,
 239        HTT_RX_MPDU_ENCRYPT_WAPI             = 5,
 240        HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2     = 6,
 241        HTT_RX_MPDU_ENCRYPT_NONE             = 7,
 242};
 243
 244#define RX_MPDU_START_INFO0_PEER_IDX_MASK     0x000007ff
 245#define RX_MPDU_START_INFO0_PEER_IDX_LSB      0
 246#define RX_MPDU_START_INFO0_SEQ_NUM_MASK      0x0fff0000
 247#define RX_MPDU_START_INFO0_SEQ_NUM_LSB       16
 248#define RX_MPDU_START_INFO0_ENCRYPT_TYPE_MASK 0xf0000000
 249#define RX_MPDU_START_INFO0_ENCRYPT_TYPE_LSB  28
 250#define RX_MPDU_START_INFO0_FROM_DS           (1 << 11)
 251#define RX_MPDU_START_INFO0_TO_DS             (1 << 12)
 252#define RX_MPDU_START_INFO0_ENCRYPTED         (1 << 13)
 253#define RX_MPDU_START_INFO0_RETRY             (1 << 14)
 254#define RX_MPDU_START_INFO0_TXBF_H_INFO       (1 << 15)
 255
 256#define RX_MPDU_START_INFO1_TID_MASK 0xf0000000
 257#define RX_MPDU_START_INFO1_TID_LSB  28
 258#define RX_MPDU_START_INFO1_DIRECTED (1 << 16)
 259
 260struct rx_mpdu_start {
 261        __le32 info0;
 262        union {
 263                struct {
 264                        __le32 pn31_0;
 265                        __le32 info1; /* %RX_MPDU_START_INFO1_ */
 266                } __packed;
 267                struct {
 268                        u8 pn[6];
 269                } __packed;
 270        } __packed;
 271} __packed;
 272
 273/*
 274 * peer_idx
 275 *              The index of the address search table which associated with
 276 *              the peer table entry corresponding to this MPDU.  Only valid
 277 *              when first_msdu is set.
 278 *
 279 * fr_ds
 280 *              Set if the from DS bit is set in the frame control.  Only
 281 *              valid when first_msdu is set.
 282 *
 283 * to_ds
 284 *              Set if the to DS bit is set in the frame control.  Only
 285 *              valid when first_msdu is set.
 286 *
 287 * encrypted
 288 *              Protected bit from the frame control.  Only valid when
 289 *              first_msdu is set.
 290 *
 291 * retry
 292 *              Retry bit from the frame control.  Only valid when
 293 *              first_msdu is set.
 294 *
 295 * txbf_h_info
 296 *              The MPDU data will contain H information.  Primarily used
 297 *              for debug.
 298 *
 299 * seq_num
 300 *              The sequence number from the 802.11 header.  Only valid when
 301 *              first_msdu is set.
 302 *
 303 * encrypt_type
 304 *              Indicates type of decrypt cipher used (as defined in the
 305 *              peer table)
 306 *              0: WEP40
 307 *              1: WEP104
 308 *              2: TKIP without MIC
 309 *              3: WEP128
 310 *              4: TKIP (WPA)
 311 *              5: WAPI
 312 *              6: AES-CCM (WPA2)
 313 *              7: No cipher
 314 *              Only valid when first_msdu_is set
 315 *
 316 * pn_31_0
 317 *              Bits [31:0] of the PN number extracted from the IV field
 318 *              WEP: IV = {key_id_octet, pn2, pn1, pn0}.  Only pn[23:0] is
 319 *              valid.
 320 *              TKIP: IV = {pn5, pn4, pn3, pn2, key_id_octet, pn0,
 321 *              WEPSeed[1], pn1}.  Only pn[47:0] is valid.
 322 *              AES-CCM: IV = {pn5, pn4, pn3, pn2, key_id_octet, 0x0, pn1,
 323 *              pn0}.  Only pn[47:0] is valid.
 324 *              WAPI: IV = {key_id_octet, 0x0, pn15, pn14, pn13, pn12, pn11,
 325 *              pn10, pn9, pn8, pn7, pn6, pn5, pn4, pn3, pn2, pn1, pn0}.
 326 *              The ext_wapi_pn[127:48] in the rx_msdu_misc descriptor and
 327 *              pn[47:0] are valid.
 328 *              Only valid when first_msdu is set.
 329 *
 330 * pn_47_32
 331 *              Bits [47:32] of the PN number.   See description for
 332 *              pn_31_0.  The remaining PN fields are in the rx_msdu_end
 333 *              descriptor
 334 *
 335 * pn
 336 *              Use this field to access the pn without worrying about
 337 *              byte-order and bitmasking/bitshifting.
 338 *
 339 * directed
 340 *              See definition in RX attention descriptor
 341 *
 342 * reserved_2
 343 *              Reserved: HW should fill with zero.  FW should ignore.
 344 *
 345 * tid
 346 *              The TID field in the QoS control field
 347 */
 348
 349#define RX_MPDU_END_INFO0_RESERVED_0_MASK     0x00001fff
 350#define RX_MPDU_END_INFO0_RESERVED_0_LSB      0
 351#define RX_MPDU_END_INFO0_POST_DELIM_CNT_MASK 0x0fff0000
 352#define RX_MPDU_END_INFO0_POST_DELIM_CNT_LSB  16
 353#define RX_MPDU_END_INFO0_OVERFLOW_ERR        (1 << 13)
 354#define RX_MPDU_END_INFO0_LAST_MPDU           (1 << 14)
 355#define RX_MPDU_END_INFO0_POST_DELIM_ERR      (1 << 15)
 356#define RX_MPDU_END_INFO0_MPDU_LENGTH_ERR     (1 << 28)
 357#define RX_MPDU_END_INFO0_TKIP_MIC_ERR        (1 << 29)
 358#define RX_MPDU_END_INFO0_DECRYPT_ERR         (1 << 30)
 359#define RX_MPDU_END_INFO0_FCS_ERR             (1 << 31)
 360
 361struct rx_mpdu_end {
 362        __le32 info0;
 363} __packed;
 364
 365/*
 366 * reserved_0
 367 *              Reserved
 368 *
 369 * overflow_err
 370 *              PCU Receive FIFO does not have enough space to store the
 371 *              full receive packet.  Enough space is reserved in the
 372 *              receive FIFO for the status is written.  This MPDU remaining
 373 *              packets in the PPDU will be filtered and no Ack response
 374 *              will be transmitted.
 375 *
 376 * last_mpdu
 377 *              Indicates that this is the last MPDU of a PPDU.
 378 *
 379 * post_delim_err
 380 *              Indicates that a delimiter FCS error occurred after this
 381 *              MPDU before the next MPDU.  Only valid when last_msdu is
 382 *              set.
 383 *
 384 * post_delim_cnt
 385 *              Count of the delimiters after this MPDU.  This requires the
 386 *              last MPDU to be held until all the EOF descriptors have been
 387 *              received.  This may be inefficient in the future when
 388 *              ML-MIMO is used.  Only valid when last_mpdu is set.
 389 *
 390 * mpdu_length_err
 391 *              See definition in RX attention descriptor
 392 *
 393 * tkip_mic_err
 394 *              See definition in RX attention descriptor
 395 *
 396 * decrypt_err
 397 *              See definition in RX attention descriptor
 398 *
 399 * fcs_err
 400 *              See definition in RX attention descriptor
 401 */
 402
 403#define RX_MSDU_START_INFO0_MSDU_LENGTH_MASK    0x00003fff
 404#define RX_MSDU_START_INFO0_MSDU_LENGTH_LSB     0
 405#define RX_MSDU_START_INFO0_IP_OFFSET_MASK      0x000fc000
 406#define RX_MSDU_START_INFO0_IP_OFFSET_LSB       14
 407#define RX_MSDU_START_INFO0_RING_MASK_MASK      0x00f00000
 408#define RX_MSDU_START_INFO0_RING_MASK_LSB       20
 409#define RX_MSDU_START_INFO0_TCP_UDP_OFFSET_MASK 0x7f000000
 410#define RX_MSDU_START_INFO0_TCP_UDP_OFFSET_LSB  24
 411
 412#define RX_MSDU_START_INFO1_MSDU_NUMBER_MASK    0x000000ff
 413#define RX_MSDU_START_INFO1_MSDU_NUMBER_LSB     0
 414#define RX_MSDU_START_INFO1_DECAP_FORMAT_MASK   0x00000300
 415#define RX_MSDU_START_INFO1_DECAP_FORMAT_LSB    8
 416#define RX_MSDU_START_INFO1_SA_IDX_MASK         0x07ff0000
 417#define RX_MSDU_START_INFO1_SA_IDX_LSB          16
 418#define RX_MSDU_START_INFO1_IPV4_PROTO          (1 << 10)
 419#define RX_MSDU_START_INFO1_IPV6_PROTO          (1 << 11)
 420#define RX_MSDU_START_INFO1_TCP_PROTO           (1 << 12)
 421#define RX_MSDU_START_INFO1_UDP_PROTO           (1 << 13)
 422#define RX_MSDU_START_INFO1_IP_FRAG             (1 << 14)
 423#define RX_MSDU_START_INFO1_TCP_ONLY_ACK        (1 << 15)
 424
 425enum rx_msdu_decap_format {
 426        RX_MSDU_DECAP_RAW           = 0,
 427        RX_MSDU_DECAP_NATIVE_WIFI   = 1,
 428        RX_MSDU_DECAP_ETHERNET2_DIX = 2,
 429        RX_MSDU_DECAP_8023_SNAP_LLC = 3
 430};
 431
 432struct rx_msdu_start {
 433        __le32 info0; /* %RX_MSDU_START_INFO0_ */
 434        __le32 flow_id_crc;
 435        __le32 info1; /* %RX_MSDU_START_INFO1_ */
 436} __packed;
 437
 438/*
 439 * msdu_length
 440 *              MSDU length in bytes after decapsulation.  This field is
 441 *              still valid for MPDU frames without A-MSDU.  It still
 442 *              represents MSDU length after decapsulation
 443 *
 444 * ip_offset
 445 *              Indicates the IP offset in bytes from the start of the
 446 *              packet after decapsulation.  Only valid if ipv4_proto or
 447 *              ipv6_proto is set.
 448 *
 449 * ring_mask
 450 *              Indicates the destination RX rings for this MSDU.
 451 *
 452 * tcp_udp_offset
 453 *              Indicates the offset in bytes to the start of TCP or UDP
 454 *              header from the start of the IP header after decapsulation.
 455 *              Only valid if tcp_prot or udp_prot is set.  The value 0
 456 *              indicates that the offset is longer than 127 bytes.
 457 *
 458 * reserved_0c
 459 *              Reserved: HW should fill with zero.  FW should ignore.
 460 *
 461 * flow_id_crc
 462 *              The flow_id_crc runs CRC32 on the following information:
 463 *              IPv4 option: dest_addr[31:0], src_addr [31:0], {24'b0,
 464 *              protocol[7:0]}.
 465 *              IPv6 option: dest_addr[127:0], src_addr [127:0], {24'b0,
 466 *              next_header[7:0]}
 467 *              UDP case: sort_port[15:0], dest_port[15:0]
 468 *              TCP case: sort_port[15:0], dest_port[15:0],
 469 *              {header_length[3:0], 6'b0, flags[5:0], window_size[15:0]},
 470 *              {16'b0, urgent_ptr[15:0]}, all options except 32-bit
 471 *              timestamp.
 472 *
 473 * msdu_number
 474 *              Indicates the MSDU number within a MPDU.  This value is
 475 *              reset to zero at the start of each MPDU.  If the number of
 476 *              MSDU exceeds 255 this number will wrap using modulo 256.
 477 *
 478 * decap_format
 479 *              Indicates the format after decapsulation:
 480 *              0: RAW: No decapsulation
 481 *              1: Native WiFi
 482 *              2: Ethernet 2 (DIX)
 483 *              3: 802.3 (SNAP/LLC)
 484 *
 485 * ipv4_proto
 486 *              Set if L2 layer indicates IPv4 protocol.
 487 *
 488 * ipv6_proto
 489 *              Set if L2 layer indicates IPv6 protocol.
 490 *
 491 * tcp_proto
 492 *              Set if the ipv4_proto or ipv6_proto are set and the IP
 493 *              protocol indicates TCP.
 494 *
 495 * udp_proto
 496 *              Set if the ipv4_proto or ipv6_proto are set and the IP
 497 *                      protocol indicates UDP.
 498 *
 499 * ip_frag
 500 *              Indicates that either the IP More frag bit is set or IP frag
 501 *              number is non-zero.  If set indicates that this is a
 502 *              fragmented IP packet.
 503 *
 504 * tcp_only_ack
 505 *              Set if only the TCP Ack bit is set in the TCP flags and if
 506 *              the TCP payload is 0.
 507 *
 508 * sa_idx
 509 *              The offset in the address table which matches the MAC source
 510 *              address.
 511 *
 512 * reserved_2b
 513 *              Reserved: HW should fill with zero.  FW should ignore.
 514 */
 515
 516#define RX_MSDU_END_INFO0_REPORTED_MPDU_LENGTH_MASK 0x00003fff
 517#define RX_MSDU_END_INFO0_REPORTED_MPDU_LENGTH_LSB  0
 518#define RX_MSDU_END_INFO0_FIRST_MSDU                (1 << 14)
 519#define RX_MSDU_END_INFO0_LAST_MSDU                 (1 << 15)
 520#define RX_MSDU_END_INFO0_PRE_DELIM_ERR             (1 << 30)
 521#define RX_MSDU_END_INFO0_RESERVED_3B               (1 << 31)
 522
 523struct rx_msdu_end {
 524        __le16 ip_hdr_cksum;
 525        __le16 tcp_hdr_cksum;
 526        u8 key_id_octet;
 527        u8 classification_filter;
 528        u8 wapi_pn[10];
 529        __le32 info0;
 530} __packed;
 531
 532/*
 533 *ip_hdr_chksum
 534 *              This can include the IP header checksum or the pseudo header
 535 *              checksum used by TCP/UDP checksum.
 536 *
 537 *tcp_udp_chksum
 538 *              The value of the computed TCP/UDP checksum.  A mode bit
 539 *              selects whether this checksum is the full checksum or the
 540 *              partial checksum which does not include the pseudo header.
 541 *
 542 *key_id_octet
 543 *              The key ID octet from the IV.  Only valid when first_msdu is
 544 *              set.
 545 *
 546 *classification_filter
 547 *              Indicates the number classification filter rule
 548 *
 549 *ext_wapi_pn_63_48
 550 *              Extension PN (packet number) which is only used by WAPI.
 551 *              This corresponds to WAPI PN bits [63:48] (pn6 and pn7).  The
 552 *              WAPI PN bits [63:0] are in the pn field of the rx_mpdu_start
 553 *              descriptor.
 554 *
 555 *ext_wapi_pn_95_64
 556 *              Extension PN (packet number) which is only used by WAPI.
 557 *              This corresponds to WAPI PN bits [95:64] (pn8, pn9, pn10 and
 558 *              pn11).
 559 *
 560 *ext_wapi_pn_127_96
 561 *              Extension PN (packet number) which is only used by WAPI.
 562 *              This corresponds to WAPI PN bits [127:96] (pn12, pn13, pn14,
 563 *              pn15).
 564 *
 565 *reported_mpdu_length
 566 *              MPDU length before decapsulation.  Only valid when
 567 *              first_msdu is set.  This field is taken directly from the
 568 *              length field of the A-MPDU delimiter or the preamble length
 569 *              field for non-A-MPDU frames.
 570 *
 571 *first_msdu
 572 *              Indicates the first MSDU of A-MSDU.  If both first_msdu and
 573 *              last_msdu are set in the MSDU then this is a non-aggregated
 574 *              MSDU frame: normal MPDU.  Interior MSDU in an A-MSDU shall
 575 *              have both first_mpdu and last_mpdu bits set to 0.
 576 *
 577 *last_msdu
 578 *              Indicates the last MSDU of the A-MSDU.  MPDU end status is
 579 *              only valid when last_msdu is set.
 580 *
 581 *reserved_3a
 582 *              Reserved: HW should fill with zero.  FW should ignore.
 583 *
 584 *pre_delim_err
 585 *              Indicates that the first delimiter had a FCS failure.  Only
 586 *              valid when first_mpdu and first_msdu are set.
 587 *
 588 *reserved_3b
 589 *              Reserved: HW should fill with zero.  FW should ignore.
 590 */
 591
 592#define RX_PPDU_START_SIG_RATE_SELECT_OFDM 0
 593#define RX_PPDU_START_SIG_RATE_SELECT_CCK  1
 594
 595#define RX_PPDU_START_SIG_RATE_OFDM_48 0
 596#define RX_PPDU_START_SIG_RATE_OFDM_24 1
 597#define RX_PPDU_START_SIG_RATE_OFDM_12 2
 598#define RX_PPDU_START_SIG_RATE_OFDM_6  3
 599#define RX_PPDU_START_SIG_RATE_OFDM_54 4
 600#define RX_PPDU_START_SIG_RATE_OFDM_36 5
 601#define RX_PPDU_START_SIG_RATE_OFDM_18 6
 602#define RX_PPDU_START_SIG_RATE_OFDM_9  7
 603
 604#define RX_PPDU_START_SIG_RATE_CCK_LP_11  0
 605#define RX_PPDU_START_SIG_RATE_CCK_LP_5_5 1
 606#define RX_PPDU_START_SIG_RATE_CCK_LP_2   2
 607#define RX_PPDU_START_SIG_RATE_CCK_LP_1   3
 608#define RX_PPDU_START_SIG_RATE_CCK_SP_11  4
 609#define RX_PPDU_START_SIG_RATE_CCK_SP_5_5 5
 610#define RX_PPDU_START_SIG_RATE_CCK_SP_2   6
 611
 612#define HTT_RX_PPDU_START_PREAMBLE_LEGACY        0x04
 613#define HTT_RX_PPDU_START_PREAMBLE_HT            0x08
 614#define HTT_RX_PPDU_START_PREAMBLE_HT_WITH_TXBF  0x09
 615#define HTT_RX_PPDU_START_PREAMBLE_VHT           0x0C
 616#define HTT_RX_PPDU_START_PREAMBLE_VHT_WITH_TXBF 0x0D
 617
 618#define RX_PPDU_START_INFO0_IS_GREENFIELD (1 << 0)
 619
 620#define RX_PPDU_START_INFO1_L_SIG_RATE_MASK    0x0000000f
 621#define RX_PPDU_START_INFO1_L_SIG_RATE_LSB     0
 622#define RX_PPDU_START_INFO1_L_SIG_LENGTH_MASK  0x0001ffe0
 623#define RX_PPDU_START_INFO1_L_SIG_LENGTH_LSB   5
 624#define RX_PPDU_START_INFO1_L_SIG_TAIL_MASK    0x00fc0000
 625#define RX_PPDU_START_INFO1_L_SIG_TAIL_LSB     18
 626#define RX_PPDU_START_INFO1_PREAMBLE_TYPE_MASK 0xff000000
 627#define RX_PPDU_START_INFO1_PREAMBLE_TYPE_LSB  24
 628#define RX_PPDU_START_INFO1_L_SIG_RATE_SELECT  (1 << 4)
 629#define RX_PPDU_START_INFO1_L_SIG_PARITY       (1 << 17)
 630
 631#define RX_PPDU_START_INFO2_HT_SIG_VHT_SIG_A_1_MASK 0x00ffffff
 632#define RX_PPDU_START_INFO2_HT_SIG_VHT_SIG_A_1_LSB  0
 633
 634#define RX_PPDU_START_INFO3_HT_SIG_VHT_SIG_A_2_MASK 0x00ffffff
 635#define RX_PPDU_START_INFO3_HT_SIG_VHT_SIG_A_2_LSB  0
 636#define RX_PPDU_START_INFO3_TXBF_H_INFO             (1 << 24)
 637
 638#define RX_PPDU_START_INFO4_VHT_SIG_B_MASK 0x1fffffff
 639#define RX_PPDU_START_INFO4_VHT_SIG_B_LSB  0
 640
 641#define RX_PPDU_START_INFO5_SERVICE_MASK 0x0000ffff
 642#define RX_PPDU_START_INFO5_SERVICE_LSB  0
 643
 644struct rx_ppdu_start {
 645        struct {
 646                u8 pri20_mhz;
 647                u8 ext20_mhz;
 648                u8 ext40_mhz;
 649                u8 ext80_mhz;
 650        } rssi_chains[4];
 651        u8 rssi_comb;
 652        __le16 rsvd0;
 653        u8 info0; /* %RX_PPDU_START_INFO0_ */
 654        __le32 info1; /* %RX_PPDU_START_INFO1_ */
 655        __le32 info2; /* %RX_PPDU_START_INFO2_ */
 656        __le32 info3; /* %RX_PPDU_START_INFO3_ */
 657        __le32 info4; /* %RX_PPDU_START_INFO4_ */
 658        __le32 info5; /* %RX_PPDU_START_INFO5_ */
 659} __packed;
 660
 661/*
 662 * rssi_chain0_pri20
 663 *              RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth.
 664 *              Value of 0x80 indicates invalid.
 665 *
 666 * rssi_chain0_sec20
 667 *              RSSI of RX PPDU on chain 0 of secondary 20 MHz bandwidth.
 668 *              Value of 0x80 indicates invalid.
 669 *
 670 * rssi_chain0_sec40
 671 *              RSSI of RX PPDU on chain 0 of secondary 40 MHz bandwidth.
 672 *              Value of 0x80 indicates invalid.
 673 *
 674 * rssi_chain0_sec80
 675 *              RSSI of RX PPDU on chain 0 of secondary 80 MHz bandwidth.
 676 *              Value of 0x80 indicates invalid.
 677 *
 678 * rssi_chain1_pri20
 679 *              RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth.
 680 *              Value of 0x80 indicates invalid.
 681 *
 682 * rssi_chain1_sec20
 683 *              RSSI of RX PPDU on chain 1 of secondary 20 MHz bandwidth.
 684 *              Value of 0x80 indicates invalid.
 685 *
 686 * rssi_chain1_sec40
 687 *              RSSI of RX PPDU on chain 1 of secondary 40 MHz bandwidth.
 688 *              Value of 0x80 indicates invalid.
 689 *
 690 * rssi_chain1_sec80
 691 *              RSSI of RX PPDU on chain 1 of secondary 80 MHz bandwidth.
 692 *              Value of 0x80 indicates invalid.
 693 *
 694 * rssi_chain2_pri20
 695 *              RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth.
 696 *              Value of 0x80 indicates invalid.
 697 *
 698 * rssi_chain2_sec20
 699 *              RSSI of RX PPDU on chain 2 of secondary 20 MHz bandwidth.
 700 *              Value of 0x80 indicates invalid.
 701 *
 702 * rssi_chain2_sec40
 703 *              RSSI of RX PPDU on chain 2 of secondary 40 MHz bandwidth.
 704 *              Value of 0x80 indicates invalid.
 705 *
 706 * rssi_chain2_sec80
 707 *              RSSI of RX PPDU on chain 2 of secondary 80 MHz bandwidth.
 708 *              Value of 0x80 indicates invalid.
 709 *
 710 * rssi_chain3_pri20
 711 *              RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth.
 712 *              Value of 0x80 indicates invalid.
 713 *
 714 * rssi_chain3_sec20
 715 *              RSSI of RX PPDU on chain 3 of secondary 20 MHz bandwidth.
 716 *              Value of 0x80 indicates invalid.
 717 *
 718 * rssi_chain3_sec40
 719 *              RSSI of RX PPDU on chain 3 of secondary 40 MHz bandwidth.
 720 *              Value of 0x80 indicates invalid.
 721 *
 722 * rssi_chain3_sec80
 723 *              RSSI of RX PPDU on chain 3 of secondary 80 MHz bandwidth.
 724 *              Value of 0x80 indicates invalid.
 725 *
 726 * rssi_comb
 727 *              The combined RSSI of RX PPDU of all active chains and
 728 *              bandwidths.  Value of 0x80 indicates invalid.
 729 *
 730 * reserved_4a
 731 *              Reserved: HW should fill with 0, FW should ignore.
 732 *
 733 * is_greenfield
 734 *              Do we really support this?
 735 *
 736 * reserved_4b
 737 *              Reserved: HW should fill with 0, FW should ignore.
 738 *
 739 * l_sig_rate
 740 *              If l_sig_rate_select is 0:
 741 *              0x8: OFDM 48 Mbps
 742 *              0x9: OFDM 24 Mbps
 743 *              0xA: OFDM 12 Mbps
 744 *              0xB: OFDM 6 Mbps
 745 *              0xC: OFDM 54 Mbps
 746 *              0xD: OFDM 36 Mbps
 747 *              0xE: OFDM 18 Mbps
 748 *              0xF: OFDM 9 Mbps
 749 *              If l_sig_rate_select is 1:
 750 *              0x8: CCK 11 Mbps long preamble
 751 *              0x9: CCK 5.5 Mbps long preamble
 752 *              0xA: CCK 2 Mbps long preamble
 753 *              0xB: CCK 1 Mbps long preamble
 754 *              0xC: CCK 11 Mbps short preamble
 755 *              0xD: CCK 5.5 Mbps short preamble
 756 *              0xE: CCK 2 Mbps short preamble
 757 *
 758 * l_sig_rate_select
 759 *              Legacy signal rate select.  If set then l_sig_rate indicates
 760 *              CCK rates.  If clear then l_sig_rate indicates OFDM rates.
 761 *
 762 * l_sig_length
 763 *              Length of legacy frame in octets.
 764 *
 765 * l_sig_parity
 766 *              Odd parity over l_sig_rate and l_sig_length
 767 *
 768 * l_sig_tail
 769 *              Tail bits for Viterbi decoder
 770 *
 771 * preamble_type
 772 *              Indicates the type of preamble ahead:
 773 *              0x4: Legacy (OFDM/CCK)
 774 *              0x8: HT
 775 *              0x9: HT with TxBF
 776 *              0xC: VHT
 777 *              0xD: VHT with TxBF
 778 *              0x80 - 0xFF: Reserved for special baseband data types such
 779 *              as radar and spectral scan.
 780 *
 781 * ht_sig_vht_sig_a_1
 782 *              If preamble_type == 0x8 or 0x9
 783 *              HT-SIG (first 24 bits)
 784 *              If preamble_type == 0xC or 0xD
 785 *              VHT-SIG A (first 24 bits)
 786 *              Else
 787 *              Reserved
 788 *
 789 * reserved_6
 790 *              Reserved: HW should fill with 0, FW should ignore.
 791 *
 792 * ht_sig_vht_sig_a_2
 793 *              If preamble_type == 0x8 or 0x9
 794 *              HT-SIG (last 24 bits)
 795 *              If preamble_type == 0xC or 0xD
 796 *              VHT-SIG A (last 24 bits)
 797 *              Else
 798 *              Reserved
 799 *
 800 * txbf_h_info
 801 *              Indicates that the packet data carries H information which
 802 *              is used for TxBF debug.
 803 *
 804 * reserved_7
 805 *              Reserved: HW should fill with 0, FW should ignore.
 806 *
 807 * vht_sig_b
 808 *              WiFi 1.0 and WiFi 2.0 will likely have this field to be all
 809 *              0s since the BB does not plan on decoding VHT SIG-B.
 810 *
 811 * reserved_8
 812 *              Reserved: HW should fill with 0, FW should ignore.
 813 *
 814 * service
 815 *              Service field from BB for OFDM, HT and VHT packets.  CCK
 816 *              packets will have service field of 0.
 817 *
 818 * reserved_9
 819 *              Reserved: HW should fill with 0, FW should ignore.
 820*/
 821
 822
 823#define RX_PPDU_END_FLAGS_PHY_ERR             (1 << 0)
 824#define RX_PPDU_END_FLAGS_RX_LOCATION         (1 << 1)
 825#define RX_PPDU_END_FLAGS_TXBF_H_INFO         (1 << 2)
 826
 827#define RX_PPDU_END_INFO0_RX_ANTENNA_MASK     0x00ffffff
 828#define RX_PPDU_END_INFO0_RX_ANTENNA_LSB      0
 829#define RX_PPDU_END_INFO0_FLAGS_TX_HT_VHT_ACK (1 << 24)
 830#define RX_PPDU_END_INFO0_BB_CAPTURED_CHANNEL (1 << 25)
 831
 832#define RX_PPDU_END_INFO1_PPDU_DONE (1 << 15)
 833
 834struct rx_ppdu_end {
 835        __le32 evm_p0;
 836        __le32 evm_p1;
 837        __le32 evm_p2;
 838        __le32 evm_p3;
 839        __le32 evm_p4;
 840        __le32 evm_p5;
 841        __le32 evm_p6;
 842        __le32 evm_p7;
 843        __le32 evm_p8;
 844        __le32 evm_p9;
 845        __le32 evm_p10;
 846        __le32 evm_p11;
 847        __le32 evm_p12;
 848        __le32 evm_p13;
 849        __le32 evm_p14;
 850        __le32 evm_p15;
 851        __le32 tsf_timestamp;
 852        __le32 wb_timestamp;
 853        u8 locationing_timestamp;
 854        u8 phy_err_code;
 855        __le16 flags; /* %RX_PPDU_END_FLAGS_ */
 856        __le32 info0; /* %RX_PPDU_END_INFO0_ */
 857        __le16 bb_length;
 858        __le16 info1; /* %RX_PPDU_END_INFO1_ */
 859} __packed;
 860
 861/*
 862 * evm_p0
 863 *              EVM for pilot 0.  Contain EVM for streams: 0, 1, 2 and 3.
 864 *
 865 * evm_p1
 866 *              EVM for pilot 1.  Contain EVM for streams: 0, 1, 2 and 3.
 867 *
 868 * evm_p2
 869 *              EVM for pilot 2.  Contain EVM for streams: 0, 1, 2 and 3.
 870 *
 871 * evm_p3
 872 *              EVM for pilot 3.  Contain EVM for streams: 0, 1, 2 and 3.
 873 *
 874 * evm_p4
 875 *              EVM for pilot 4.  Contain EVM for streams: 0, 1, 2 and 3.
 876 *
 877 * evm_p5
 878 *              EVM for pilot 5.  Contain EVM for streams: 0, 1, 2 and 3.
 879 *
 880 * evm_p6
 881 *              EVM for pilot 6.  Contain EVM for streams: 0, 1, 2 and 3.
 882 *
 883 * evm_p7
 884 *              EVM for pilot 7.  Contain EVM for streams: 0, 1, 2 and 3.
 885 *
 886 * evm_p8
 887 *              EVM for pilot 8.  Contain EVM for streams: 0, 1, 2 and 3.
 888 *
 889 * evm_p9
 890 *              EVM for pilot 9.  Contain EVM for streams: 0, 1, 2 and 3.
 891 *
 892 * evm_p10
 893 *              EVM for pilot 10.  Contain EVM for streams: 0, 1, 2 and 3.
 894 *
 895 * evm_p11
 896 *              EVM for pilot 11.  Contain EVM for streams: 0, 1, 2 and 3.
 897 *
 898 * evm_p12
 899 *              EVM for pilot 12.  Contain EVM for streams: 0, 1, 2 and 3.
 900 *
 901 * evm_p13
 902 *              EVM for pilot 13.  Contain EVM for streams: 0, 1, 2 and 3.
 903 *
 904 * evm_p14
 905 *              EVM for pilot 14.  Contain EVM for streams: 0, 1, 2 and 3.
 906 *
 907 * evm_p15
 908 *              EVM for pilot 15.  Contain EVM for streams: 0, 1, 2 and 3.
 909 *
 910 * tsf_timestamp
 911 *              Receive TSF timestamp sampled on the rising edge of
 912 *              rx_clear.  For PHY errors this may be the current TSF when
 913 *              phy_error is asserted if the rx_clear does not assert before
 914 *              the end of the PHY error.
 915 *
 916 * wb_timestamp
 917 *              WLAN/BT timestamp is a 1 usec resolution timestamp which
 918 *              does not get updated based on receive beacon like TSF.  The
 919 *              same rules for capturing tsf_timestamp are used to capture
 920 *              the wb_timestamp.
 921 *
 922 * locationing_timestamp
 923 *              Timestamp used for locationing.  This timestamp is used to
 924 *              indicate fractions of usec.  For example if the MAC clock is
 925 *              running at 80 MHz, the timestamp will increment every 12.5
 926 *              nsec.  The value starts at 0 and increments to 79 and
 927 *              returns to 0 and repeats.  This information is valid for
 928 *              every PPDU.  This information can be used in conjunction
 929 *              with wb_timestamp to capture large delta times.
 930 *
 931 * phy_err_code
 932 *              See the 1.10.8.1.2 for the list of the PHY error codes.
 933 *
 934 * phy_err
 935 *              Indicates a PHY error was detected for this PPDU.
 936 *
 937 * rx_location
 938 *              Indicates that location information was requested.
 939 *
 940 * txbf_h_info
 941 *              Indicates that the packet data carries H information which
 942 *              is used for TxBF debug.
 943 *
 944 * reserved_18
 945 *              Reserved: HW should fill with 0, FW should ignore.
 946 *
 947 * rx_antenna
 948 *              Receive antenna value
 949 *
 950 * tx_ht_vht_ack
 951 *              Indicates that a HT or VHT Ack/BA frame was transmitted in
 952 *              response to this receive packet.
 953 *
 954 * bb_captured_channel
 955 *              Indicates that the BB has captured a channel dump.  FW can
 956 *              then read the channel dump memory.  This may indicate that
 957 *              the channel was captured either based on PCU setting the
 958 *              capture_channel bit  BB descriptor or FW setting the
 959 *              capture_channel mode bit.
 960 *
 961 * reserved_19
 962 *              Reserved: HW should fill with 0, FW should ignore.
 963 *
 964 * bb_length
 965 *              Indicates the number of bytes of baseband information for
 966 *              PPDUs where the BB descriptor preamble type is 0x80 to 0xFF
 967 *              which indicates that this is not a normal PPDU but rather
 968 *              contains baseband debug information.
 969 *
 970 * reserved_20
 971 *              Reserved: HW should fill with 0, FW should ignore.
 972 *
 973 * ppdu_done
 974 *              PPDU end status is only valid when ppdu_done bit is set.
 975 *              Every time HW sets this bit in memory FW/SW must clear this
 976 *              bit in memory.  FW will initialize all the ppdu_done dword
 977 *              to 0.
 978*/
 979
 980#define FW_RX_DESC_INFO0_DISCARD  (1 << 0)
 981#define FW_RX_DESC_INFO0_FORWARD  (1 << 1)
 982#define FW_RX_DESC_INFO0_INSPECT  (1 << 5)
 983#define FW_RX_DESC_INFO0_EXT_MASK 0xC0
 984#define FW_RX_DESC_INFO0_EXT_LSB  6
 985
 986struct fw_rx_desc_base {
 987        u8 info0;
 988} __packed;
 989
 990#endif /* _RX_DESC_H_ */
 991