LXR linux/drivers/net/wireless/ath/ath9k/common.c

   1/*
   2 * Copyright (c) 2009-2011 Atheros Communications Inc.
   3 *
   4 * Permission to use, copy, modify, and/or distribute this software for any
   5 * purpose with or without fee is hereby granted, provided that the above
   6 * copyright notice and this permission notice appear in all copies.
   7 *
   8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15 */
  16
  17/*
  18 * Module for common driver code between ath9k and ath9k_htc
  19 */
  20
  21#include <linux/kernel.h>
  22#include <linux/module.h>
  23
  24#include "common.h"
  25
  26MODULE_AUTHOR("Atheros Communications");
  27MODULE_DESCRIPTION("Shared library for Atheros wireless 802.11n LAN cards.");
  28MODULE_LICENSE("Dual BSD/GPL");
  29
  30int ath9k_cmn_get_hw_crypto_keytype(struct sk_buff *skb)
  31{
  32        struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  33
  34        if (tx_info->control.hw_key) {
  35                switch (tx_info->control.hw_key->cipher) {
  36                case WLAN_CIPHER_SUITE_WEP40:
  37                case WLAN_CIPHER_SUITE_WEP104:
  38                        return ATH9K_KEY_TYPE_WEP;
  39                case WLAN_CIPHER_SUITE_TKIP:
  40                        return ATH9K_KEY_TYPE_TKIP;
  41                case WLAN_CIPHER_SUITE_CCMP:
  42                        return ATH9K_KEY_TYPE_AES;
  43                default:
  44                        break;
  45                }
  46        }
  47
  48        return ATH9K_KEY_TYPE_CLEAR;
  49}
  50EXPORT_SYMBOL(ath9k_cmn_get_hw_crypto_keytype);
  51
  52static u32 ath9k_get_extchanmode(struct ieee80211_channel *chan,
  53                                 enum nl80211_channel_type channel_type)
  54{
  55        u32 chanmode = 0;
  56
  57        switch (chan->band) {
  58        case IEEE80211_BAND_2GHZ:
  59                switch (channel_type) {
  60                case NL80211_CHAN_NO_HT:
  61                case NL80211_CHAN_HT20:
  62                        chanmode = CHANNEL_G_HT20;
  63                        break;
  64                case NL80211_CHAN_HT40PLUS:
  65                        chanmode = CHANNEL_G_HT40PLUS;
  66                        break;
  67                case NL80211_CHAN_HT40MINUS:
  68                        chanmode = CHANNEL_G_HT40MINUS;
  69                        break;
  70                }
  71                break;
  72        case IEEE80211_BAND_5GHZ:
  73                switch (channel_type) {
  74                case NL80211_CHAN_NO_HT:
  75                case NL80211_CHAN_HT20:
  76                        chanmode = CHANNEL_A_HT20;
  77                        break;
  78                case NL80211_CHAN_HT40PLUS:
  79                        chanmode = CHANNEL_A_HT40PLUS;
  80                        break;
  81                case NL80211_CHAN_HT40MINUS:
  82                        chanmode = CHANNEL_A_HT40MINUS;
  83                        break;
  84                }
  85                break;
  86        default:
  87                break;
  88        }
  89
  90        return chanmode;
  91}
  92
  93/*
  94 * Update internal channel flags.
  95 */
  96void ath9k_cmn_update_ichannel(struct ath9k_channel *ichan,
  97                               struct ieee80211_channel *chan,
  98                               enum nl80211_channel_type channel_type)
  99{
 100        ichan->channel = chan->center_freq;
 101        ichan->chan = chan;
 102
 103        if (chan->band == IEEE80211_BAND_2GHZ) {
 104                ichan->chanmode = CHANNEL_G;
 105                ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM;
 106        } else {
 107                ichan->chanmode = CHANNEL_A;
 108                ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
 109        }
 110
 111        if (channel_type != NL80211_CHAN_NO_HT)
 112                ichan->chanmode = ath9k_get_extchanmode(chan, channel_type);
 113}
 114EXPORT_SYMBOL(ath9k_cmn_update_ichannel);
 115
 116/*
 117 * Get the internal channel reference.
 118 */
 119struct ath9k_channel *ath9k_cmn_get_curchannel(struct ieee80211_hw *hw,
 120                                               struct ath_hw *ah)
 121{
 122        struct ieee80211_channel *curchan = hw->conf.chandef.chan;
 123        struct ath9k_channel *channel;
 124        u8 chan_idx;
 125
 126        chan_idx = curchan->hw_value;
 127        channel = &ah->channels[chan_idx];
 128        ath9k_cmn_update_ichannel(channel, curchan,
 129                                  cfg80211_get_chandef_type(&hw->conf.chandef));
 130
 131        return channel;
 132}
 133EXPORT_SYMBOL(ath9k_cmn_get_curchannel);
 134
 135int ath9k_cmn_count_streams(unsigned int chainmask, int max)
 136{
 137        int streams = 0;
 138
 139        do {
 140                if (++streams == max)
 141                        break;
 142        } while ((chainmask = chainmask & (chainmask - 1)));
 143
 144        return streams;
 145}
 146EXPORT_SYMBOL(ath9k_cmn_count_streams);
 147
 148void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
 149                            u16 new_txpow, u16 *txpower)
 150{
 151        struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
 152
 153        if (reg->power_limit != new_txpow) {
 154                ath9k_hw_set_txpowerlimit(ah, new_txpow, false);
 155                /* read back in case value is clamped */
 156                *txpower = reg->max_power_level;
 157        }
 158}
 159EXPORT_SYMBOL(ath9k_cmn_update_txpow);
 160
 161void ath9k_cmn_init_crypto(struct ath_hw *ah)
 162{
 163        struct ath_common *common = ath9k_hw_common(ah);
 164        int i = 0;
 165
 166        /* Get the hardware key cache size. */
 167        common->keymax = AR_KEYTABLE_SIZE;
 168
 169        /*
 170         * Check whether the separate key cache entries
 171         * are required to handle both tx+rx MIC keys.
 172         * With split mic keys the number of stations is limited
 173         * to 27 otherwise 59.
 174         */
 175        if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
 176                common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
 177
 178        /*
 179         * Reset the key cache since some parts do not
 180         * reset the contents on initial power up.
 181         */
 182        for (i = 0; i < common->keymax; i++)
 183                ath_hw_keyreset(common, (u16) i);
 184}
 185EXPORT_SYMBOL(ath9k_cmn_init_crypto);
 186
 187static int __init ath9k_cmn_init(void)
 188{
 189        return 0;
 190}
 191module_init(ath9k_cmn_init);
 192
 193static void __exit ath9k_cmn_exit(void)
 194{
 195        return;
 196}
 197module_exit(ath9k_cmn_exit);
 198