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17#include <linux/nl80211.h>
18#include <linux/delay.h>
19#include "ath9k.h"
20#include "btcoex.h"
21
22static void ath9k_set_assoc_state(struct ath_softc *sc,
23 struct ieee80211_vif *vif);
24
25u8 ath9k_parse_mpdudensity(u8 mpdudensity)
26{
27
28
29
30
31
32
33
34
35
36
37
38 switch (mpdudensity) {
39 case 0:
40 return 0;
41 case 1:
42 case 2:
43 case 3:
44
45
46 return 1;
47 case 4:
48 return 2;
49 case 5:
50 return 4;
51 case 6:
52 return 8;
53 case 7:
54 return 16;
55 default:
56 return 0;
57 }
58}
59
60static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61{
62 bool pending = false;
63
64 spin_lock_bh(&txq->axq_lock);
65
66 if (txq->axq_depth || !list_empty(&txq->axq_acq))
67 pending = true;
68
69 spin_unlock_bh(&txq->axq_lock);
70 return pending;
71}
72
73static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
74{
75 unsigned long flags;
76 bool ret;
77
78 spin_lock_irqsave(&sc->sc_pm_lock, flags);
79 ret = ath9k_hw_setpower(sc->sc_ah, mode);
80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
81
82 return ret;
83}
84
85void ath9k_ps_wakeup(struct ath_softc *sc)
86{
87 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
88 unsigned long flags;
89 enum ath9k_power_mode power_mode;
90
91 spin_lock_irqsave(&sc->sc_pm_lock, flags);
92 if (++sc->ps_usecount != 1)
93 goto unlock;
94
95 power_mode = sc->sc_ah->power_mode;
96 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
97
98
99
100
101
102
103 if (power_mode != ATH9K_PM_AWAKE) {
104 spin_lock(&common->cc_lock);
105 ath_hw_cycle_counters_update(common);
106 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
107 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
108 spin_unlock(&common->cc_lock);
109 }
110
111 unlock:
112 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
113}
114
115void ath9k_ps_restore(struct ath_softc *sc)
116{
117 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
118 enum ath9k_power_mode mode;
119 unsigned long flags;
120 bool reset;
121
122 spin_lock_irqsave(&sc->sc_pm_lock, flags);
123 if (--sc->ps_usecount != 0)
124 goto unlock;
125
126 if (sc->ps_idle) {
127 ath9k_hw_setrxabort(sc->sc_ah, 1);
128 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
129 mode = ATH9K_PM_FULL_SLEEP;
130 } else if (sc->ps_enabled &&
131 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
132 PS_WAIT_FOR_CAB |
133 PS_WAIT_FOR_PSPOLL_DATA |
134 PS_WAIT_FOR_TX_ACK |
135 PS_WAIT_FOR_ANI))) {
136 mode = ATH9K_PM_NETWORK_SLEEP;
137 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
138 ath9k_btcoex_stop_gen_timer(sc);
139 } else {
140 goto unlock;
141 }
142
143 spin_lock(&common->cc_lock);
144 ath_hw_cycle_counters_update(common);
145 spin_unlock(&common->cc_lock);
146
147 ath9k_hw_setpower(sc->sc_ah, mode);
148
149 unlock:
150 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
151}
152
153static void __ath_cancel_work(struct ath_softc *sc)
154{
155 cancel_work_sync(&sc->paprd_work);
156 cancel_work_sync(&sc->hw_check_work);
157 cancel_delayed_work_sync(&sc->tx_complete_work);
158 cancel_delayed_work_sync(&sc->hw_pll_work);
159
160#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
161 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
162 cancel_work_sync(&sc->mci_work);
163#endif
164}
165
166static void ath_cancel_work(struct ath_softc *sc)
167{
168 __ath_cancel_work(sc);
169 cancel_work_sync(&sc->hw_reset_work);
170}
171
172static void ath_restart_work(struct ath_softc *sc)
173{
174 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
175
176 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
177 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
178 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
179
180 ath_start_rx_poll(sc, 3);
181 ath_start_ani(sc);
182}
183
184static bool ath_prepare_reset(struct ath_softc *sc)
185{
186 struct ath_hw *ah = sc->sc_ah;
187 bool ret = true;
188
189 ieee80211_stop_queues(sc->hw);
190
191 sc->hw_busy_count = 0;
192 ath_stop_ani(sc);
193 del_timer_sync(&sc->rx_poll_timer);
194
195 ath9k_hw_disable_interrupts(ah);
196
197 if (!ath_drain_all_txq(sc))
198 ret = false;
199
200 if (!ath_stoprecv(sc))
201 ret = false;
202
203 return ret;
204}
205
206static bool ath_complete_reset(struct ath_softc *sc, bool start)
207{
208 struct ath_hw *ah = sc->sc_ah;
209 struct ath_common *common = ath9k_hw_common(ah);
210 unsigned long flags;
211
212 if (ath_startrecv(sc) != 0) {
213 ath_err(common, "Unable to restart recv logic\n");
214 return false;
215 }
216
217 ath9k_cmn_update_txpow(ah, sc->curtxpow,
218 sc->config.txpowlimit, &sc->curtxpow);
219
220 clear_bit(SC_OP_HW_RESET, &sc->sc_flags);
221 ath9k_hw_set_interrupts(ah);
222 ath9k_hw_enable_interrupts(ah);
223
224 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
225 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
226 goto work;
227
228 if (ah->opmode == NL80211_IFTYPE_STATION &&
229 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
230 spin_lock_irqsave(&sc->sc_pm_lock, flags);
231 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
232 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
233 } else {
234 ath9k_set_beacon(sc);
235 }
236 work:
237 ath_restart_work(sc);
238 }
239
240 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3)
241 ath_ant_comb_update(sc);
242
243 ieee80211_wake_queues(sc->hw);
244
245 return true;
246}
247
248static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
249{
250 struct ath_hw *ah = sc->sc_ah;
251 struct ath_common *common = ath9k_hw_common(ah);
252 struct ath9k_hw_cal_data *caldata = NULL;
253 bool fastcc = true;
254 int r;
255
256 __ath_cancel_work(sc);
257
258 tasklet_disable(&sc->intr_tq);
259 spin_lock_bh(&sc->sc_pcu_lock);
260
261 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
262 fastcc = false;
263 caldata = &sc->caldata;
264 }
265
266 if (!hchan) {
267 fastcc = false;
268 hchan = ah->curchan;
269 }
270
271 if (!ath_prepare_reset(sc))
272 fastcc = false;
273
274 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
275 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
276
277 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
278 if (r) {
279 ath_err(common,
280 "Unable to reset channel, reset status %d\n", r);
281
282 ath9k_hw_enable_interrupts(ah);
283 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
284
285 goto out;
286 }
287
288 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
289 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
290 ath9k_mci_set_txpower(sc, true, false);
291
292 if (!ath_complete_reset(sc, true))
293 r = -EIO;
294
295out:
296 spin_unlock_bh(&sc->sc_pcu_lock);
297 tasklet_enable(&sc->intr_tq);
298
299 return r;
300}
301
302
303
304
305
306
307
308static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
309 struct ath9k_channel *hchan)
310{
311 int r;
312
313 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
314 return -EIO;
315
316 r = ath_reset_internal(sc, hchan);
317
318 return r;
319}
320
321static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
322 struct ieee80211_vif *vif)
323{
324 struct ath_node *an;
325 an = (struct ath_node *)sta->drv_priv;
326
327 an->sc = sc;
328 an->sta = sta;
329 an->vif = vif;
330
331 ath_tx_node_init(sc, an);
332
333 if (sta->ht_cap.ht_supported) {
334 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
335 sta->ht_cap.ampdu_factor);
336 an->mpdudensity = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density);
337 }
338}
339
340static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
341{
342 struct ath_node *an = (struct ath_node *)sta->drv_priv;
343 ath_tx_node_cleanup(sc, an);
344}
345
346void ath9k_tasklet(unsigned long data)
347{
348 struct ath_softc *sc = (struct ath_softc *)data;
349 struct ath_hw *ah = sc->sc_ah;
350 struct ath_common *common = ath9k_hw_common(ah);
351 enum ath_reset_type type;
352 unsigned long flags;
353 u32 status = sc->intrstatus;
354 u32 rxmask;
355
356 ath9k_ps_wakeup(sc);
357 spin_lock(&sc->sc_pcu_lock);
358
359 if ((status & ATH9K_INT_FATAL) ||
360 (status & ATH9K_INT_BB_WATCHDOG)) {
361
362 if (status & ATH9K_INT_FATAL)
363 type = RESET_TYPE_FATAL_INT;
364 else
365 type = RESET_TYPE_BB_WATCHDOG;
366
367 ath9k_queue_reset(sc, type);
368 goto out;
369 }
370
371 spin_lock_irqsave(&sc->sc_pm_lock, flags);
372 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
373
374
375
376
377 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
378 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
379 }
380 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
381
382 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
383 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
384 ATH9K_INT_RXORN);
385 else
386 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
387
388 if (status & rxmask) {
389
390 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
391 (status & ATH9K_INT_RXHP))
392 ath_rx_tasklet(sc, 0, true);
393
394 ath_rx_tasklet(sc, 0, false);
395 }
396
397 if (status & ATH9K_INT_TX) {
398 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
399 ath_tx_edma_tasklet(sc);
400 else
401 ath_tx_tasklet(sc);
402 }
403
404 ath9k_btcoex_handle_interrupt(sc, status);
405
406out:
407
408 ath9k_hw_enable_interrupts(ah);
409
410 spin_unlock(&sc->sc_pcu_lock);
411 ath9k_ps_restore(sc);
412}
413
414irqreturn_t ath_isr(int irq, void *dev)
415{
416#define SCHED_INTR ( \
417 ATH9K_INT_FATAL | \
418 ATH9K_INT_BB_WATCHDOG | \
419 ATH9K_INT_RXORN | \
420 ATH9K_INT_RXEOL | \
421 ATH9K_INT_RX | \
422 ATH9K_INT_RXLP | \
423 ATH9K_INT_RXHP | \
424 ATH9K_INT_TX | \
425 ATH9K_INT_BMISS | \
426 ATH9K_INT_CST | \
427 ATH9K_INT_TSFOOR | \
428 ATH9K_INT_GENTIMER | \
429 ATH9K_INT_MCI)
430
431 struct ath_softc *sc = dev;
432 struct ath_hw *ah = sc->sc_ah;
433 struct ath_common *common = ath9k_hw_common(ah);
434 enum ath9k_int status;
435 bool sched = false;
436
437
438
439
440
441
442 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
443 return IRQ_NONE;
444
445
446
447 if (!ath9k_hw_intrpend(ah))
448 return IRQ_NONE;
449
450 if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) {
451 ath9k_hw_kill_interrupts(ah);
452 return IRQ_HANDLED;
453 }
454
455
456
457
458
459
460
461 ath9k_hw_getisr(ah, &status);
462 status &= ah->imask;
463
464
465
466
467
468 if (!status)
469 return IRQ_NONE;
470
471
472 sc->intrstatus = status;
473
474 if (status & SCHED_INTR)
475 sched = true;
476
477
478
479
480
481 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
482 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
483 goto chip_reset;
484
485 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
486 (status & ATH9K_INT_BB_WATCHDOG)) {
487
488 spin_lock(&common->cc_lock);
489 ath_hw_cycle_counters_update(common);
490 ar9003_hw_bb_watchdog_dbg_info(ah);
491 spin_unlock(&common->cc_lock);
492
493 goto chip_reset;
494 }
495#ifdef CONFIG_PM_SLEEP
496 if (status & ATH9K_INT_BMISS) {
497 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
498 ath_dbg(common, ANY, "during WoW we got a BMISS\n");
499 atomic_inc(&sc->wow_got_bmiss_intr);
500 atomic_dec(&sc->wow_sleep_proc_intr);
501 }
502 }
503#endif
504 if (status & ATH9K_INT_SWBA)
505 tasklet_schedule(&sc->bcon_tasklet);
506
507 if (status & ATH9K_INT_TXURN)
508 ath9k_hw_updatetxtriglevel(ah, true);
509
510 if (status & ATH9K_INT_RXEOL) {
511 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
512 ath9k_hw_set_interrupts(ah);
513 }
514
515 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
516 if (status & ATH9K_INT_TIM_TIMER) {
517 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
518 goto chip_reset;
519
520
521 ath9k_setpower(sc, ATH9K_PM_AWAKE);
522 spin_lock(&sc->sc_pm_lock);
523 ath9k_hw_setrxabort(sc->sc_ah, 0);
524 sc->ps_flags |= PS_WAIT_FOR_BEACON;
525 spin_unlock(&sc->sc_pm_lock);
526 }
527
528chip_reset:
529
530 ath_debug_stat_interrupt(sc, status);
531
532 if (sched) {
533
534 ath9k_hw_disable_interrupts(ah);
535 tasklet_schedule(&sc->intr_tq);
536 }
537
538 return IRQ_HANDLED;
539
540#undef SCHED_INTR
541}
542
543static int ath_reset(struct ath_softc *sc)
544{
545 int i, r;
546
547 ath9k_ps_wakeup(sc);
548
549 r = ath_reset_internal(sc, NULL);
550
551 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
552 if (!ATH_TXQ_SETUP(sc, i))
553 continue;
554
555 spin_lock_bh(&sc->tx.txq[i].axq_lock);
556 ath_txq_schedule(sc, &sc->tx.txq[i]);
557 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
558 }
559
560 ath9k_ps_restore(sc);
561
562 return r;
563}
564
565void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
566{
567#ifdef CONFIG_ATH9K_DEBUGFS
568 RESET_STAT_INC(sc, type);
569#endif
570 set_bit(SC_OP_HW_RESET, &sc->sc_flags);
571 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
572}
573
574void ath_reset_work(struct work_struct *work)
575{
576 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
577
578 ath_reset(sc);
579}
580
581
582
583
584
585static int ath9k_start(struct ieee80211_hw *hw)
586{
587 struct ath_softc *sc = hw->priv;
588 struct ath_hw *ah = sc->sc_ah;
589 struct ath_common *common = ath9k_hw_common(ah);
590 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
591 struct ath9k_channel *init_channel;
592 int r;
593
594 ath_dbg(common, CONFIG,
595 "Starting driver with initial channel: %d MHz\n",
596 curchan->center_freq);
597
598 ath9k_ps_wakeup(sc);
599 mutex_lock(&sc->mutex);
600
601 init_channel = ath9k_cmn_get_curchannel(hw, ah);
602
603
604 ath9k_hw_configpcipowersave(ah, false);
605
606
607
608
609
610
611
612
613 spin_lock_bh(&sc->sc_pcu_lock);
614
615 atomic_set(&ah->intr_ref_cnt, -1);
616
617 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
618 if (r) {
619 ath_err(common,
620 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
621 r, curchan->center_freq);
622 ah->reset_power_on = false;
623 }
624
625
626 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
627 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
628 ATH9K_INT_GLOBAL;
629
630 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
631 ah->imask |= ATH9K_INT_RXHP |
632 ATH9K_INT_RXLP |
633 ATH9K_INT_BB_WATCHDOG;
634 else
635 ah->imask |= ATH9K_INT_RX;
636
637 ah->imask |= ATH9K_INT_GTT;
638
639 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
640 ah->imask |= ATH9K_INT_CST;
641
642 ath_mci_enable(sc);
643
644 clear_bit(SC_OP_INVALID, &sc->sc_flags);
645 sc->sc_ah->is_monitoring = false;
646
647 if (!ath_complete_reset(sc, false))
648 ah->reset_power_on = false;
649
650 if (ah->led_pin >= 0) {
651 ath9k_hw_cfg_output(ah, ah->led_pin,
652 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
653 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
654 }
655
656
657
658
659
660 ath9k_cmn_init_crypto(sc->sc_ah);
661
662 spin_unlock_bh(&sc->sc_pcu_lock);
663
664 mutex_unlock(&sc->mutex);
665
666 ath9k_ps_restore(sc);
667
668 return 0;
669}
670
671static void ath9k_tx(struct ieee80211_hw *hw,
672 struct ieee80211_tx_control *control,
673 struct sk_buff *skb)
674{
675 struct ath_softc *sc = hw->priv;
676 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
677 struct ath_tx_control txctl;
678 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
679 unsigned long flags;
680
681 if (sc->ps_enabled) {
682
683
684
685
686 if (ieee80211_is_data(hdr->frame_control) &&
687 !ieee80211_is_nullfunc(hdr->frame_control) &&
688 !ieee80211_has_pm(hdr->frame_control)) {
689 ath_dbg(common, PS,
690 "Add PM=1 for a TX frame while in PS mode\n");
691 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
692 }
693 }
694
695 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
696
697
698
699
700
701 ath9k_ps_wakeup(sc);
702 spin_lock_irqsave(&sc->sc_pm_lock, flags);
703 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
704 ath9k_hw_setrxabort(sc->sc_ah, 0);
705 if (ieee80211_is_pspoll(hdr->frame_control)) {
706 ath_dbg(common, PS,
707 "Sending PS-Poll to pick a buffered frame\n");
708 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
709 } else {
710 ath_dbg(common, PS, "Wake up to complete TX\n");
711 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
712 }
713
714
715
716
717
718 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
719 ath9k_ps_restore(sc);
720 }
721
722
723
724
725
726 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
727 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
728 goto exit;
729 }
730
731 memset(&txctl, 0, sizeof(struct ath_tx_control));
732 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
733 txctl.sta = control->sta;
734
735 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
736
737 if (ath_tx_start(hw, skb, &txctl) != 0) {
738 ath_dbg(common, XMIT, "TX failed\n");
739 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
740 goto exit;
741 }
742
743 return;
744exit:
745 ieee80211_free_txskb(hw, skb);
746}
747
748static void ath9k_stop(struct ieee80211_hw *hw)
749{
750 struct ath_softc *sc = hw->priv;
751 struct ath_hw *ah = sc->sc_ah;
752 struct ath_common *common = ath9k_hw_common(ah);
753 bool prev_idle;
754
755 mutex_lock(&sc->mutex);
756
757 ath_cancel_work(sc);
758 del_timer_sync(&sc->rx_poll_timer);
759
760 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
761 ath_dbg(common, ANY, "Device not present\n");
762 mutex_unlock(&sc->mutex);
763 return;
764 }
765
766
767 ath9k_ps_wakeup(sc);
768
769 spin_lock_bh(&sc->sc_pcu_lock);
770
771
772 ah->imask &= ~ATH9K_INT_GLOBAL;
773
774
775
776 ath9k_hw_disable_interrupts(ah);
777
778 spin_unlock_bh(&sc->sc_pcu_lock);
779
780
781
782 synchronize_irq(sc->irq);
783 tasklet_kill(&sc->intr_tq);
784 tasklet_kill(&sc->bcon_tasklet);
785
786 prev_idle = sc->ps_idle;
787 sc->ps_idle = true;
788
789 spin_lock_bh(&sc->sc_pcu_lock);
790
791 if (ah->led_pin >= 0) {
792 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
793 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
794 }
795
796 ath_prepare_reset(sc);
797
798 if (sc->rx.frag) {
799 dev_kfree_skb_any(sc->rx.frag);
800 sc->rx.frag = NULL;
801 }
802
803 if (!ah->curchan)
804 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
805
806 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
807 ath9k_hw_phy_disable(ah);
808
809 ath9k_hw_configpcipowersave(ah, true);
810
811 spin_unlock_bh(&sc->sc_pcu_lock);
812
813 ath9k_ps_restore(sc);
814
815 set_bit(SC_OP_INVALID, &sc->sc_flags);
816 sc->ps_idle = prev_idle;
817
818 mutex_unlock(&sc->mutex);
819
820 ath_dbg(common, CONFIG, "Driver halt\n");
821}
822
823bool ath9k_uses_beacons(int type)
824{
825 switch (type) {
826 case NL80211_IFTYPE_AP:
827 case NL80211_IFTYPE_ADHOC:
828 case NL80211_IFTYPE_MESH_POINT:
829 return true;
830 default:
831 return false;
832 }
833}
834
835static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
836{
837 struct ath9k_vif_iter_data *iter_data = data;
838 int i;
839
840 if (iter_data->has_hw_macaddr) {
841 for (i = 0; i < ETH_ALEN; i++)
842 iter_data->mask[i] &=
843 ~(iter_data->hw_macaddr[i] ^ mac[i]);
844 } else {
845 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
846 iter_data->has_hw_macaddr = true;
847 }
848
849 switch (vif->type) {
850 case NL80211_IFTYPE_AP:
851 iter_data->naps++;
852 break;
853 case NL80211_IFTYPE_STATION:
854 iter_data->nstations++;
855 break;
856 case NL80211_IFTYPE_ADHOC:
857 iter_data->nadhocs++;
858 break;
859 case NL80211_IFTYPE_MESH_POINT:
860 iter_data->nmeshes++;
861 break;
862 case NL80211_IFTYPE_WDS:
863 iter_data->nwds++;
864 break;
865 default:
866 break;
867 }
868}
869
870static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
871{
872 struct ath_softc *sc = data;
873 struct ath_vif *avp = (void *)vif->drv_priv;
874
875 if (vif->type != NL80211_IFTYPE_STATION)
876 return;
877
878 if (avp->primary_sta_vif)
879 ath9k_set_assoc_state(sc, vif);
880}
881
882
883void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
884 struct ieee80211_vif *vif,
885 struct ath9k_vif_iter_data *iter_data)
886{
887 struct ath_softc *sc = hw->priv;
888 struct ath_hw *ah = sc->sc_ah;
889 struct ath_common *common = ath9k_hw_common(ah);
890
891
892
893
894
895 memset(iter_data, 0, sizeof(*iter_data));
896 memset(&iter_data->mask, 0xff, ETH_ALEN);
897
898 if (vif)
899 ath9k_vif_iter(iter_data, vif->addr, vif);
900
901
902 ieee80211_iterate_active_interfaces_atomic(
903 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
904 ath9k_vif_iter, iter_data);
905
906 memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN);
907}
908
909
910static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
911 struct ieee80211_vif *vif)
912{
913 struct ath_softc *sc = hw->priv;
914 struct ath_hw *ah = sc->sc_ah;
915 struct ath_common *common = ath9k_hw_common(ah);
916 struct ath9k_vif_iter_data iter_data;
917 enum nl80211_iftype old_opmode = ah->opmode;
918
919 ath9k_calculate_iter_data(hw, vif, &iter_data);
920
921 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
922 ath_hw_setbssidmask(common);
923
924 if (iter_data.naps > 0) {
925 ath9k_hw_set_tsfadjust(ah, true);
926 ah->opmode = NL80211_IFTYPE_AP;
927 } else {
928 ath9k_hw_set_tsfadjust(ah, false);
929
930 if (iter_data.nmeshes)
931 ah->opmode = NL80211_IFTYPE_MESH_POINT;
932 else if (iter_data.nwds)
933 ah->opmode = NL80211_IFTYPE_AP;
934 else if (iter_data.nadhocs)
935 ah->opmode = NL80211_IFTYPE_ADHOC;
936 else
937 ah->opmode = NL80211_IFTYPE_STATION;
938 }
939
940 ath9k_hw_setopmode(ah);
941
942 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
943 ah->imask |= ATH9K_INT_TSFOOR;
944 else
945 ah->imask &= ~ATH9K_INT_TSFOOR;
946
947 ath9k_hw_set_interrupts(ah);
948
949
950
951
952
953 if (ah->opmode == NL80211_IFTYPE_STATION &&
954 old_opmode == NL80211_IFTYPE_AP &&
955 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
956 ieee80211_iterate_active_interfaces_atomic(
957 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
958 ath9k_sta_vif_iter, sc);
959 }
960}
961
962static int ath9k_add_interface(struct ieee80211_hw *hw,
963 struct ieee80211_vif *vif)
964{
965 struct ath_softc *sc = hw->priv;
966 struct ath_hw *ah = sc->sc_ah;
967 struct ath_common *common = ath9k_hw_common(ah);
968
969 mutex_lock(&sc->mutex);
970
971 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
972 sc->nvifs++;
973
974 ath9k_ps_wakeup(sc);
975 ath9k_calculate_summary_state(hw, vif);
976 ath9k_ps_restore(sc);
977
978 if (ath9k_uses_beacons(vif->type))
979 ath9k_beacon_assign_slot(sc, vif);
980
981 mutex_unlock(&sc->mutex);
982 return 0;
983}
984
985static int ath9k_change_interface(struct ieee80211_hw *hw,
986 struct ieee80211_vif *vif,
987 enum nl80211_iftype new_type,
988 bool p2p)
989{
990 struct ath_softc *sc = hw->priv;
991 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
992
993 ath_dbg(common, CONFIG, "Change Interface\n");
994 mutex_lock(&sc->mutex);
995
996 if (ath9k_uses_beacons(vif->type))
997 ath9k_beacon_remove_slot(sc, vif);
998
999 vif->type = new_type;
1000 vif->p2p = p2p;
1001
1002 ath9k_ps_wakeup(sc);
1003 ath9k_calculate_summary_state(hw, vif);
1004 ath9k_ps_restore(sc);
1005
1006 if (ath9k_uses_beacons(vif->type))
1007 ath9k_beacon_assign_slot(sc, vif);
1008
1009 mutex_unlock(&sc->mutex);
1010 return 0;
1011}
1012
1013static void ath9k_remove_interface(struct ieee80211_hw *hw,
1014 struct ieee80211_vif *vif)
1015{
1016 struct ath_softc *sc = hw->priv;
1017 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1018
1019 ath_dbg(common, CONFIG, "Detach Interface\n");
1020
1021 mutex_lock(&sc->mutex);
1022
1023 sc->nvifs--;
1024
1025 if (ath9k_uses_beacons(vif->type))
1026 ath9k_beacon_remove_slot(sc, vif);
1027
1028 ath9k_ps_wakeup(sc);
1029 ath9k_calculate_summary_state(hw, NULL);
1030 ath9k_ps_restore(sc);
1031
1032 mutex_unlock(&sc->mutex);
1033}
1034
1035static void ath9k_enable_ps(struct ath_softc *sc)
1036{
1037 struct ath_hw *ah = sc->sc_ah;
1038 struct ath_common *common = ath9k_hw_common(ah);
1039
1040 sc->ps_enabled = true;
1041 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1042 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1043 ah->imask |= ATH9K_INT_TIM_TIMER;
1044 ath9k_hw_set_interrupts(ah);
1045 }
1046 ath9k_hw_setrxabort(ah, 1);
1047 }
1048 ath_dbg(common, PS, "PowerSave enabled\n");
1049}
1050
1051static void ath9k_disable_ps(struct ath_softc *sc)
1052{
1053 struct ath_hw *ah = sc->sc_ah;
1054 struct ath_common *common = ath9k_hw_common(ah);
1055
1056 sc->ps_enabled = false;
1057 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1058 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1059 ath9k_hw_setrxabort(ah, 0);
1060 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1061 PS_WAIT_FOR_CAB |
1062 PS_WAIT_FOR_PSPOLL_DATA |
1063 PS_WAIT_FOR_TX_ACK);
1064 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1065 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1066 ath9k_hw_set_interrupts(ah);
1067 }
1068 }
1069 ath_dbg(common, PS, "PowerSave disabled\n");
1070}
1071
1072void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1073{
1074 struct ath_softc *sc = hw->priv;
1075 struct ath_hw *ah = sc->sc_ah;
1076 struct ath_common *common = ath9k_hw_common(ah);
1077 u32 rxfilter;
1078
1079 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1080 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1081 return;
1082 }
1083
1084 ath9k_ps_wakeup(sc);
1085 rxfilter = ath9k_hw_getrxfilter(ah);
1086 ath9k_hw_setrxfilter(ah, rxfilter |
1087 ATH9K_RX_FILTER_PHYRADAR |
1088 ATH9K_RX_FILTER_PHYERR);
1089
1090
1091
1092
1093
1094
1095 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1096 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1097 ath9k_ps_restore(sc);
1098}
1099
1100int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1101 enum spectral_mode spectral_mode)
1102{
1103 struct ath_softc *sc = hw->priv;
1104 struct ath_hw *ah = sc->sc_ah;
1105 struct ath_common *common = ath9k_hw_common(ah);
1106
1107 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1108 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1109 return -1;
1110 }
1111
1112 switch (spectral_mode) {
1113 case SPECTRAL_DISABLED:
1114 sc->spec_config.enabled = 0;
1115 break;
1116 case SPECTRAL_BACKGROUND:
1117
1118
1119
1120 sc->spec_config.endless = 1;
1121 sc->spec_config.enabled = 1;
1122 break;
1123 case SPECTRAL_CHANSCAN:
1124 case SPECTRAL_MANUAL:
1125 sc->spec_config.endless = 0;
1126 sc->spec_config.enabled = 1;
1127 break;
1128 default:
1129 return -1;
1130 }
1131
1132 ath9k_ps_wakeup(sc);
1133 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1134 ath9k_ps_restore(sc);
1135
1136 sc->spectral_mode = spectral_mode;
1137
1138 return 0;
1139}
1140
1141static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1142{
1143 struct ath_softc *sc = hw->priv;
1144 struct ath_hw *ah = sc->sc_ah;
1145 struct ath_common *common = ath9k_hw_common(ah);
1146 struct ieee80211_conf *conf = &hw->conf;
1147 bool reset_channel = false;
1148
1149 ath9k_ps_wakeup(sc);
1150 mutex_lock(&sc->mutex);
1151
1152 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1153 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1154 if (sc->ps_idle) {
1155 ath_cancel_work(sc);
1156 ath9k_stop_btcoex(sc);
1157 } else {
1158 ath9k_start_btcoex(sc);
1159
1160
1161
1162
1163 reset_channel = ah->chip_fullsleep;
1164 }
1165 }
1166
1167
1168
1169
1170
1171
1172
1173 if (changed & IEEE80211_CONF_CHANGE_PS) {
1174 unsigned long flags;
1175 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1176 if (conf->flags & IEEE80211_CONF_PS)
1177 ath9k_enable_ps(sc);
1178 else
1179 ath9k_disable_ps(sc);
1180 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1181 }
1182
1183 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1184 if (conf->flags & IEEE80211_CONF_MONITOR) {
1185 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1186 sc->sc_ah->is_monitoring = true;
1187 } else {
1188 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1189 sc->sc_ah->is_monitoring = false;
1190 }
1191 }
1192
1193 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1194 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
1195 enum nl80211_channel_type channel_type =
1196 cfg80211_get_chandef_type(&conf->chandef);
1197 int pos = curchan->hw_value;
1198 int old_pos = -1;
1199 unsigned long flags;
1200
1201 if (ah->curchan)
1202 old_pos = ah->curchan - &ah->channels[0];
1203
1204 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1205 curchan->center_freq, channel_type);
1206
1207
1208 spin_lock_irqsave(&common->cc_lock, flags);
1209 ath_update_survey_stats(sc);
1210 spin_unlock_irqrestore(&common->cc_lock, flags);
1211
1212 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1213 curchan, channel_type);
1214
1215
1216
1217
1218
1219
1220
1221 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1222 sc->cur_survey != &sc->survey[pos]) {
1223
1224 if (sc->cur_survey)
1225 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1226
1227 sc->cur_survey = &sc->survey[pos];
1228
1229 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1230 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1231 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1232 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1233 }
1234
1235 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1236 ath_err(common, "Unable to set channel\n");
1237 mutex_unlock(&sc->mutex);
1238 ath9k_ps_restore(sc);
1239 return -EINVAL;
1240 }
1241
1242
1243
1244
1245
1246
1247 if (old_pos >= 0)
1248 ath_update_survey_nf(sc, old_pos);
1249
1250
1251
1252
1253
1254 if (hw->conf.radar_enabled) {
1255 u32 rxfilter;
1256
1257
1258 ath9k_hw_set_radar_params(ah);
1259 rxfilter = ath9k_hw_getrxfilter(ah);
1260 rxfilter |= ATH9K_RX_FILTER_PHYRADAR |
1261 ATH9K_RX_FILTER_PHYERR;
1262 ath9k_hw_setrxfilter(ah, rxfilter);
1263 ath_dbg(common, DFS, "DFS enabled at freq %d\n",
1264 curchan->center_freq);
1265 } else {
1266
1267 if (test_bit(SC_OP_SCANNING, &sc->sc_flags) &&
1268 sc->spectral_mode == SPECTRAL_CHANSCAN)
1269 ath9k_spectral_scan_trigger(hw);
1270 }
1271 }
1272
1273 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1274 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1275 sc->config.txpowlimit = 2 * conf->power_level;
1276 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1277 sc->config.txpowlimit, &sc->curtxpow);
1278 }
1279
1280 mutex_unlock(&sc->mutex);
1281 ath9k_ps_restore(sc);
1282
1283 return 0;
1284}
1285
1286#define SUPPORTED_FILTERS \
1287 (FIF_PROMISC_IN_BSS | \
1288 FIF_ALLMULTI | \
1289 FIF_CONTROL | \
1290 FIF_PSPOLL | \
1291 FIF_OTHER_BSS | \
1292 FIF_BCN_PRBRESP_PROMISC | \
1293 FIF_PROBE_REQ | \
1294 FIF_FCSFAIL)
1295
1296
1297static void ath9k_configure_filter(struct ieee80211_hw *hw,
1298 unsigned int changed_flags,
1299 unsigned int *total_flags,
1300 u64 multicast)
1301{
1302 struct ath_softc *sc = hw->priv;
1303 u32 rfilt;
1304
1305 changed_flags &= SUPPORTED_FILTERS;
1306 *total_flags &= SUPPORTED_FILTERS;
1307
1308 sc->rx.rxfilter = *total_flags;
1309 ath9k_ps_wakeup(sc);
1310 rfilt = ath_calcrxfilter(sc);
1311 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1312 ath9k_ps_restore(sc);
1313
1314 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1315 rfilt);
1316}
1317
1318static int ath9k_sta_add(struct ieee80211_hw *hw,
1319 struct ieee80211_vif *vif,
1320 struct ieee80211_sta *sta)
1321{
1322 struct ath_softc *sc = hw->priv;
1323 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1324 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1325 struct ieee80211_key_conf ps_key = { };
1326 int key;
1327
1328 ath_node_attach(sc, sta, vif);
1329
1330 if (vif->type != NL80211_IFTYPE_AP &&
1331 vif->type != NL80211_IFTYPE_AP_VLAN)
1332 return 0;
1333
1334 key = ath_key_config(common, vif, sta, &ps_key);
1335 if (key > 0)
1336 an->ps_key = key;
1337
1338 return 0;
1339}
1340
1341static void ath9k_del_ps_key(struct ath_softc *sc,
1342 struct ieee80211_vif *vif,
1343 struct ieee80211_sta *sta)
1344{
1345 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1346 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1347 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1348
1349 if (!an->ps_key)
1350 return;
1351
1352 ath_key_delete(common, &ps_key);
1353 an->ps_key = 0;
1354}
1355
1356static int ath9k_sta_remove(struct ieee80211_hw *hw,
1357 struct ieee80211_vif *vif,
1358 struct ieee80211_sta *sta)
1359{
1360 struct ath_softc *sc = hw->priv;
1361
1362 ath9k_del_ps_key(sc, vif, sta);
1363 ath_node_detach(sc, sta);
1364
1365 return 0;
1366}
1367
1368static void ath9k_sta_notify(struct ieee80211_hw *hw,
1369 struct ieee80211_vif *vif,
1370 enum sta_notify_cmd cmd,
1371 struct ieee80211_sta *sta)
1372{
1373 struct ath_softc *sc = hw->priv;
1374 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1375
1376 if (!sta->ht_cap.ht_supported)
1377 return;
1378
1379 switch (cmd) {
1380 case STA_NOTIFY_SLEEP:
1381 an->sleeping = true;
1382 ath_tx_aggr_sleep(sta, sc, an);
1383 break;
1384 case STA_NOTIFY_AWAKE:
1385 an->sleeping = false;
1386 ath_tx_aggr_wakeup(sc, an);
1387 break;
1388 }
1389}
1390
1391static int ath9k_conf_tx(struct ieee80211_hw *hw,
1392 struct ieee80211_vif *vif, u16 queue,
1393 const struct ieee80211_tx_queue_params *params)
1394{
1395 struct ath_softc *sc = hw->priv;
1396 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1397 struct ath_txq *txq;
1398 struct ath9k_tx_queue_info qi;
1399 int ret = 0;
1400
1401 if (queue >= IEEE80211_NUM_ACS)
1402 return 0;
1403
1404 txq = sc->tx.txq_map[queue];
1405
1406 ath9k_ps_wakeup(sc);
1407 mutex_lock(&sc->mutex);
1408
1409 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1410
1411 qi.tqi_aifs = params->aifs;
1412 qi.tqi_cwmin = params->cw_min;
1413 qi.tqi_cwmax = params->cw_max;
1414 qi.tqi_burstTime = params->txop * 32;
1415
1416 ath_dbg(common, CONFIG,
1417 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1418 queue, txq->axq_qnum, params->aifs, params->cw_min,
1419 params->cw_max, params->txop);
1420
1421 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1422 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1423 if (ret)
1424 ath_err(common, "TXQ Update failed\n");
1425
1426 mutex_unlock(&sc->mutex);
1427 ath9k_ps_restore(sc);
1428
1429 return ret;
1430}
1431
1432static int ath9k_set_key(struct ieee80211_hw *hw,
1433 enum set_key_cmd cmd,
1434 struct ieee80211_vif *vif,
1435 struct ieee80211_sta *sta,
1436 struct ieee80211_key_conf *key)
1437{
1438 struct ath_softc *sc = hw->priv;
1439 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1440 int ret = 0;
1441
1442 if (ath9k_modparam_nohwcrypt)
1443 return -ENOSPC;
1444
1445 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1446 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1447 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1448 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1449 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1450
1451
1452
1453
1454
1455
1456
1457 return -EOPNOTSUPP;
1458 }
1459
1460 mutex_lock(&sc->mutex);
1461 ath9k_ps_wakeup(sc);
1462 ath_dbg(common, CONFIG, "Set HW Key\n");
1463
1464 switch (cmd) {
1465 case SET_KEY:
1466 if (sta)
1467 ath9k_del_ps_key(sc, vif, sta);
1468
1469 ret = ath_key_config(common, vif, sta, key);
1470 if (ret >= 0) {
1471 key->hw_key_idx = ret;
1472
1473 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1474 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1475 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1476 if (sc->sc_ah->sw_mgmt_crypto &&
1477 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1478 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1479 ret = 0;
1480 }
1481 break;
1482 case DISABLE_KEY:
1483 ath_key_delete(common, key);
1484 break;
1485 default:
1486 ret = -EINVAL;
1487 }
1488
1489 ath9k_ps_restore(sc);
1490 mutex_unlock(&sc->mutex);
1491
1492 return ret;
1493}
1494
1495static void ath9k_set_assoc_state(struct ath_softc *sc,
1496 struct ieee80211_vif *vif)
1497{
1498 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1499 struct ath_vif *avp = (void *)vif->drv_priv;
1500 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1501 unsigned long flags;
1502
1503 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1504 avp->primary_sta_vif = true;
1505
1506
1507
1508
1509
1510
1511
1512 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1513 return;
1514
1515 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1516 common->curaid = bss_conf->aid;
1517 ath9k_hw_write_associd(sc->sc_ah);
1518
1519 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1520 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1521
1522 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1523 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1524 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1525
1526 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1527 ath9k_mci_update_wlan_channels(sc, false);
1528
1529 ath_dbg(common, CONFIG,
1530 "Primary Station interface: %pM, BSSID: %pM\n",
1531 vif->addr, common->curbssid);
1532}
1533
1534static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1535{
1536 struct ath_softc *sc = data;
1537 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1538
1539 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
1540 return;
1541
1542 if (bss_conf->assoc)
1543 ath9k_set_assoc_state(sc, vif);
1544}
1545
1546static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1547 struct ieee80211_vif *vif,
1548 struct ieee80211_bss_conf *bss_conf,
1549 u32 changed)
1550{
1551#define CHECK_ANI \
1552 (BSS_CHANGED_ASSOC | \
1553 BSS_CHANGED_IBSS | \
1554 BSS_CHANGED_BEACON_ENABLED)
1555
1556 struct ath_softc *sc = hw->priv;
1557 struct ath_hw *ah = sc->sc_ah;
1558 struct ath_common *common = ath9k_hw_common(ah);
1559 struct ath_vif *avp = (void *)vif->drv_priv;
1560 int slottime;
1561
1562 ath9k_ps_wakeup(sc);
1563 mutex_lock(&sc->mutex);
1564
1565 if (changed & BSS_CHANGED_ASSOC) {
1566 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1567 bss_conf->bssid, bss_conf->assoc);
1568
1569 if (avp->primary_sta_vif && !bss_conf->assoc) {
1570 clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1571 avp->primary_sta_vif = false;
1572
1573 if (ah->opmode == NL80211_IFTYPE_STATION)
1574 clear_bit(SC_OP_BEACONS, &sc->sc_flags);
1575 }
1576
1577 ieee80211_iterate_active_interfaces_atomic(
1578 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1579 ath9k_bss_assoc_iter, sc);
1580
1581 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags) &&
1582 ah->opmode == NL80211_IFTYPE_STATION) {
1583 memset(common->curbssid, 0, ETH_ALEN);
1584 common->curaid = 0;
1585 ath9k_hw_write_associd(sc->sc_ah);
1586 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1587 ath9k_mci_update_wlan_channels(sc, true);
1588 }
1589 }
1590
1591 if (changed & BSS_CHANGED_IBSS) {
1592 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1593 common->curaid = bss_conf->aid;
1594 ath9k_hw_write_associd(sc->sc_ah);
1595 }
1596
1597 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1598 (changed & BSS_CHANGED_BEACON_INT)) {
1599 if (ah->opmode == NL80211_IFTYPE_AP &&
1600 bss_conf->enable_beacon)
1601 ath9k_set_tsfadjust(sc, vif);
1602 if (ath9k_allow_beacon_config(sc, vif))
1603 ath9k_beacon_config(sc, vif, changed);
1604 }
1605
1606 if (changed & BSS_CHANGED_ERP_SLOT) {
1607 if (bss_conf->use_short_slot)
1608 slottime = 9;
1609 else
1610 slottime = 20;
1611 if (vif->type == NL80211_IFTYPE_AP) {
1612
1613
1614
1615
1616
1617 sc->beacon.slottime = slottime;
1618 sc->beacon.updateslot = UPDATE;
1619 } else {
1620 ah->slottime = slottime;
1621 ath9k_hw_init_global_settings(ah);
1622 }
1623 }
1624
1625 if (changed & CHECK_ANI)
1626 ath_check_ani(sc);
1627
1628 mutex_unlock(&sc->mutex);
1629 ath9k_ps_restore(sc);
1630
1631#undef CHECK_ANI
1632}
1633
1634static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1635{
1636 struct ath_softc *sc = hw->priv;
1637 u64 tsf;
1638
1639 mutex_lock(&sc->mutex);
1640 ath9k_ps_wakeup(sc);
1641 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1642 ath9k_ps_restore(sc);
1643 mutex_unlock(&sc->mutex);
1644
1645 return tsf;
1646}
1647
1648static void ath9k_set_tsf(struct ieee80211_hw *hw,
1649 struct ieee80211_vif *vif,
1650 u64 tsf)
1651{
1652 struct ath_softc *sc = hw->priv;
1653
1654 mutex_lock(&sc->mutex);
1655 ath9k_ps_wakeup(sc);
1656 ath9k_hw_settsf64(sc->sc_ah, tsf);
1657 ath9k_ps_restore(sc);
1658 mutex_unlock(&sc->mutex);
1659}
1660
1661static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1662{
1663 struct ath_softc *sc = hw->priv;
1664
1665 mutex_lock(&sc->mutex);
1666
1667 ath9k_ps_wakeup(sc);
1668 ath9k_hw_reset_tsf(sc->sc_ah);
1669 ath9k_ps_restore(sc);
1670
1671 mutex_unlock(&sc->mutex);
1672}
1673
1674static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1675 struct ieee80211_vif *vif,
1676 enum ieee80211_ampdu_mlme_action action,
1677 struct ieee80211_sta *sta,
1678 u16 tid, u16 *ssn, u8 buf_size)
1679{
1680 struct ath_softc *sc = hw->priv;
1681 bool flush = false;
1682 int ret = 0;
1683
1684 mutex_lock(&sc->mutex);
1685
1686 switch (action) {
1687 case IEEE80211_AMPDU_RX_START:
1688 break;
1689 case IEEE80211_AMPDU_RX_STOP:
1690 break;
1691 case IEEE80211_AMPDU_TX_START:
1692 ath9k_ps_wakeup(sc);
1693 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1694 if (!ret)
1695 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1696 ath9k_ps_restore(sc);
1697 break;
1698 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1699 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1700 flush = true;
1701 case IEEE80211_AMPDU_TX_STOP_CONT:
1702 ath9k_ps_wakeup(sc);
1703 ath_tx_aggr_stop(sc, sta, tid);
1704 if (!flush)
1705 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1706 ath9k_ps_restore(sc);
1707 break;
1708 case IEEE80211_AMPDU_TX_OPERATIONAL:
1709 ath9k_ps_wakeup(sc);
1710 ath_tx_aggr_resume(sc, sta, tid);
1711 ath9k_ps_restore(sc);
1712 break;
1713 default:
1714 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1715 }
1716
1717 mutex_unlock(&sc->mutex);
1718
1719 return ret;
1720}
1721
1722static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1723 struct survey_info *survey)
1724{
1725 struct ath_softc *sc = hw->priv;
1726 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1727 struct ieee80211_supported_band *sband;
1728 struct ieee80211_channel *chan;
1729 unsigned long flags;
1730 int pos;
1731
1732 spin_lock_irqsave(&common->cc_lock, flags);
1733 if (idx == 0)
1734 ath_update_survey_stats(sc);
1735
1736 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1737 if (sband && idx >= sband->n_channels) {
1738 idx -= sband->n_channels;
1739 sband = NULL;
1740 }
1741
1742 if (!sband)
1743 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1744
1745 if (!sband || idx >= sband->n_channels) {
1746 spin_unlock_irqrestore(&common->cc_lock, flags);
1747 return -ENOENT;
1748 }
1749
1750 chan = &sband->channels[idx];
1751 pos = chan->hw_value;
1752 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1753 survey->channel = chan;
1754 spin_unlock_irqrestore(&common->cc_lock, flags);
1755
1756 return 0;
1757}
1758
1759static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1760{
1761 struct ath_softc *sc = hw->priv;
1762 struct ath_hw *ah = sc->sc_ah;
1763
1764 mutex_lock(&sc->mutex);
1765 ah->coverage_class = coverage_class;
1766
1767 ath9k_ps_wakeup(sc);
1768 ath9k_hw_init_global_settings(ah);
1769 ath9k_ps_restore(sc);
1770
1771 mutex_unlock(&sc->mutex);
1772}
1773
1774static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1775{
1776 struct ath_softc *sc = hw->priv;
1777 struct ath_hw *ah = sc->sc_ah;
1778 struct ath_common *common = ath9k_hw_common(ah);
1779 int timeout = 200;
1780 int i, j;
1781 bool drain_txq;
1782
1783 mutex_lock(&sc->mutex);
1784 cancel_delayed_work_sync(&sc->tx_complete_work);
1785
1786 if (ah->ah_flags & AH_UNPLUGGED) {
1787 ath_dbg(common, ANY, "Device has been unplugged!\n");
1788 mutex_unlock(&sc->mutex);
1789 return;
1790 }
1791
1792 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
1793 ath_dbg(common, ANY, "Device not present\n");
1794 mutex_unlock(&sc->mutex);
1795 return;
1796 }
1797
1798 for (j = 0; j < timeout; j++) {
1799 bool npend = false;
1800
1801 if (j)
1802 usleep_range(1000, 2000);
1803
1804 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1805 if (!ATH_TXQ_SETUP(sc, i))
1806 continue;
1807
1808 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1809
1810 if (npend)
1811 break;
1812 }
1813
1814 if (!npend)
1815 break;
1816 }
1817
1818 if (drop) {
1819 ath9k_ps_wakeup(sc);
1820 spin_lock_bh(&sc->sc_pcu_lock);
1821 drain_txq = ath_drain_all_txq(sc);
1822 spin_unlock_bh(&sc->sc_pcu_lock);
1823
1824 if (!drain_txq)
1825 ath_reset(sc);
1826
1827 ath9k_ps_restore(sc);
1828 ieee80211_wake_queues(hw);
1829 }
1830
1831 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
1832 mutex_unlock(&sc->mutex);
1833}
1834
1835static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
1836{
1837 struct ath_softc *sc = hw->priv;
1838 int i;
1839
1840 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1841 if (!ATH_TXQ_SETUP(sc, i))
1842 continue;
1843
1844 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
1845 return true;
1846 }
1847 return false;
1848}
1849
1850static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
1851{
1852 struct ath_softc *sc = hw->priv;
1853 struct ath_hw *ah = sc->sc_ah;
1854 struct ieee80211_vif *vif;
1855 struct ath_vif *avp;
1856 struct ath_buf *bf;
1857 struct ath_tx_status ts;
1858 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1859 int status;
1860
1861 vif = sc->beacon.bslot[0];
1862 if (!vif)
1863 return 0;
1864
1865 if (!vif->bss_conf.enable_beacon)
1866 return 0;
1867
1868 avp = (void *)vif->drv_priv;
1869
1870 if (!sc->beacon.tx_processed && !edma) {
1871 tasklet_disable(&sc->bcon_tasklet);
1872
1873 bf = avp->av_bcbuf;
1874 if (!bf || !bf->bf_mpdu)
1875 goto skip;
1876
1877 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
1878 if (status == -EINPROGRESS)
1879 goto skip;
1880
1881 sc->beacon.tx_processed = true;
1882 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
1883
1884skip:
1885 tasklet_enable(&sc->bcon_tasklet);
1886 }
1887
1888 return sc->beacon.tx_last;
1889}
1890
1891static int ath9k_get_stats(struct ieee80211_hw *hw,
1892 struct ieee80211_low_level_stats *stats)
1893{
1894 struct ath_softc *sc = hw->priv;
1895 struct ath_hw *ah = sc->sc_ah;
1896 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
1897
1898 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
1899 stats->dot11RTSFailureCount = mib_stats->rts_bad;
1900 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
1901 stats->dot11RTSSuccessCount = mib_stats->rts_good;
1902 return 0;
1903}
1904
1905static u32 fill_chainmask(u32 cap, u32 new)
1906{
1907 u32 filled = 0;
1908 int i;
1909
1910 for (i = 0; cap && new; i++, cap >>= 1) {
1911 if (!(cap & BIT(0)))
1912 continue;
1913
1914 if (new & BIT(0))
1915 filled |= BIT(i);
1916
1917 new >>= 1;
1918 }
1919
1920 return filled;
1921}
1922
1923static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
1924{
1925 if (AR_SREV_9300_20_OR_LATER(ah))
1926 return true;
1927
1928 switch (val & 0x7) {
1929 case 0x1:
1930 case 0x3:
1931 case 0x7:
1932 return true;
1933 case 0x2:
1934 return (ah->caps.rx_chainmask == 1);
1935 default:
1936 return false;
1937 }
1938}
1939
1940static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
1941{
1942 struct ath_softc *sc = hw->priv;
1943 struct ath_hw *ah = sc->sc_ah;
1944
1945 if (ah->caps.rx_chainmask != 1)
1946 rx_ant |= tx_ant;
1947
1948 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
1949 return -EINVAL;
1950
1951 sc->ant_rx = rx_ant;
1952 sc->ant_tx = tx_ant;
1953
1954 if (ah->caps.rx_chainmask == 1)
1955 return 0;
1956
1957
1958 if (AR_SREV_9100(ah))
1959 ah->rxchainmask = 0x7;
1960 else
1961 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
1962
1963 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
1964 ath9k_reload_chainmask_settings(sc);
1965
1966 return 0;
1967}
1968
1969static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
1970{
1971 struct ath_softc *sc = hw->priv;
1972
1973 *tx_ant = sc->ant_tx;
1974 *rx_ant = sc->ant_rx;
1975 return 0;
1976}
1977
1978#ifdef CONFIG_PM_SLEEP
1979
1980static void ath9k_wow_map_triggers(struct ath_softc *sc,
1981 struct cfg80211_wowlan *wowlan,
1982 u32 *wow_triggers)
1983{
1984 if (wowlan->disconnect)
1985 *wow_triggers |= AH_WOW_LINK_CHANGE |
1986 AH_WOW_BEACON_MISS;
1987 if (wowlan->magic_pkt)
1988 *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
1989
1990 if (wowlan->n_patterns)
1991 *wow_triggers |= AH_WOW_USER_PATTERN_EN;
1992
1993 sc->wow_enabled = *wow_triggers;
1994
1995}
1996
1997static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
1998{
1999 struct ath_hw *ah = sc->sc_ah;
2000 struct ath_common *common = ath9k_hw_common(ah);
2001 int pattern_count = 0;
2002 int i, byte_cnt;
2003 u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
2004 u8 dis_deauth_mask[MAX_PATTERN_SIZE];
2005
2006 memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
2007 memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039 byte_cnt = 0;
2040
2041
2042
2043 for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
2044 dis_deauth_mask[i] = 0xff;
2045
2046
2047 dis_deauth_pattern[byte_cnt] = 0xa0;
2048 byte_cnt++;
2049
2050
2051 byte_cnt += 3;
2052
2053
2054
2055
2056
2057 byte_cnt += 6;
2058
2059
2060 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
2061
2062 byte_cnt += 6;
2063
2064
2065
2066 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
2067
2068
2069
2070 dis_deauth_mask[0] = 0xfe;
2071 dis_deauth_mask[1] = 0x03;
2072 dis_deauth_mask[2] = 0xc0;
2073
2074 ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
2075
2076 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
2077 pattern_count, byte_cnt);
2078
2079 pattern_count++;
2080
2081
2082
2083
2084 dis_deauth_pattern[0] = 0xC0;
2085
2086 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
2087 pattern_count, byte_cnt);
2088
2089}
2090
2091static void ath9k_wow_add_pattern(struct ath_softc *sc,
2092 struct cfg80211_wowlan *wowlan)
2093{
2094 struct ath_hw *ah = sc->sc_ah;
2095 struct ath9k_wow_pattern *wow_pattern = NULL;
2096 struct cfg80211_wowlan_trig_pkt_pattern *patterns = wowlan->patterns;
2097 int mask_len;
2098 s8 i = 0;
2099
2100 if (!wowlan->n_patterns)
2101 return;
2102
2103
2104
2105
2106 for (i = 0; i < wowlan->n_patterns; i++) {
2107
2108 wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
2109
2110 if (!wow_pattern)
2111 return;
2112
2113
2114
2115
2116
2117
2118 mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
2119 memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
2120 memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
2121 memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
2122 patterns[i].pattern_len);
2123 memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
2124 wow_pattern->pattern_len = patterns[i].pattern_len;
2125
2126
2127
2128
2129
2130
2131 ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
2132 wow_pattern->mask_bytes,
2133 i + 2,
2134 wow_pattern->pattern_len);
2135 kfree(wow_pattern);
2136
2137 }
2138
2139}
2140
2141static int ath9k_suspend(struct ieee80211_hw *hw,
2142 struct cfg80211_wowlan *wowlan)
2143{
2144 struct ath_softc *sc = hw->priv;
2145 struct ath_hw *ah = sc->sc_ah;
2146 struct ath_common *common = ath9k_hw_common(ah);
2147 u32 wow_triggers_enabled = 0;
2148 int ret = 0;
2149
2150 mutex_lock(&sc->mutex);
2151
2152 ath_cancel_work(sc);
2153 ath_stop_ani(sc);
2154 del_timer_sync(&sc->rx_poll_timer);
2155
2156 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
2157 ath_dbg(common, ANY, "Device not present\n");
2158 ret = -EINVAL;
2159 goto fail_wow;
2160 }
2161
2162 if (WARN_ON(!wowlan)) {
2163 ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
2164 ret = -EINVAL;
2165 goto fail_wow;
2166 }
2167
2168 if (!device_can_wakeup(sc->dev)) {
2169 ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
2170 ret = 1;
2171 goto fail_wow;
2172 }
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
2183 ath_dbg(common, WOW, "None of the STA vifs are associated\n");
2184 ret = 1;
2185 goto fail_wow;
2186 }
2187
2188 if (sc->nvifs > 1) {
2189 ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
2190 ret = 1;
2191 goto fail_wow;
2192 }
2193
2194 ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
2195
2196 ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
2197 wow_triggers_enabled);
2198
2199 ath9k_ps_wakeup(sc);
2200
2201 ath9k_stop_btcoex(sc);
2202
2203
2204
2205
2206
2207 ath9k_wow_add_disassoc_deauth_pattern(sc);
2208
2209 if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
2210 ath9k_wow_add_pattern(sc, wowlan);
2211
2212 spin_lock_bh(&sc->sc_pcu_lock);
2213
2214
2215
2216
2217
2218 sc->wow_intr_before_sleep = ah->imask;
2219 ah->imask &= ~ATH9K_INT_GLOBAL;
2220 ath9k_hw_disable_interrupts(ah);
2221 ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
2222 ath9k_hw_set_interrupts(ah);
2223 ath9k_hw_enable_interrupts(ah);
2224
2225 spin_unlock_bh(&sc->sc_pcu_lock);
2226
2227
2228
2229
2230
2231 synchronize_irq(sc->irq);
2232 tasklet_kill(&sc->intr_tq);
2233
2234 ath9k_hw_wow_enable(ah, wow_triggers_enabled);
2235
2236 ath9k_ps_restore(sc);
2237 ath_dbg(common, ANY, "WoW enabled in ath9k\n");
2238 atomic_inc(&sc->wow_sleep_proc_intr);
2239
2240fail_wow:
2241 mutex_unlock(&sc->mutex);
2242 return ret;
2243}
2244
2245static int ath9k_resume(struct ieee80211_hw *hw)
2246{
2247 struct ath_softc *sc = hw->priv;
2248 struct ath_hw *ah = sc->sc_ah;
2249 struct ath_common *common = ath9k_hw_common(ah);
2250 u32 wow_status;
2251
2252 mutex_lock(&sc->mutex);
2253
2254 ath9k_ps_wakeup(sc);
2255
2256 spin_lock_bh(&sc->sc_pcu_lock);
2257
2258 ath9k_hw_disable_interrupts(ah);
2259 ah->imask = sc->wow_intr_before_sleep;
2260 ath9k_hw_set_interrupts(ah);
2261 ath9k_hw_enable_interrupts(ah);
2262
2263 spin_unlock_bh(&sc->sc_pcu_lock);
2264
2265 wow_status = ath9k_hw_wow_wakeup(ah);
2266
2267 if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
2268
2269
2270
2271
2272
2273 wow_status |= AH_WOW_BEACON_MISS;
2274 atomic_dec(&sc->wow_got_bmiss_intr);
2275 ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
2276 }
2277
2278 atomic_dec(&sc->wow_sleep_proc_intr);
2279
2280 if (wow_status) {
2281 ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
2282 ath9k_hw_wow_event_to_string(wow_status), wow_status);
2283 }
2284
2285 ath_restart_work(sc);
2286 ath9k_start_btcoex(sc);
2287
2288 ath9k_ps_restore(sc);
2289 mutex_unlock(&sc->mutex);
2290
2291 return 0;
2292}
2293
2294static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
2295{
2296 struct ath_softc *sc = hw->priv;
2297
2298 mutex_lock(&sc->mutex);
2299 device_init_wakeup(sc->dev, 1);
2300 device_set_wakeup_enable(sc->dev, enabled);
2301 mutex_unlock(&sc->mutex);
2302}
2303
2304#endif
2305static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2306{
2307 struct ath_softc *sc = hw->priv;
2308 set_bit(SC_OP_SCANNING, &sc->sc_flags);
2309}
2310
2311static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2312{
2313 struct ath_softc *sc = hw->priv;
2314 clear_bit(SC_OP_SCANNING, &sc->sc_flags);
2315}
2316
2317struct ieee80211_ops ath9k_ops = {
2318 .tx = ath9k_tx,
2319 .start = ath9k_start,
2320 .stop = ath9k_stop,
2321 .add_interface = ath9k_add_interface,
2322 .change_interface = ath9k_change_interface,
2323 .remove_interface = ath9k_remove_interface,
2324 .config = ath9k_config,
2325 .configure_filter = ath9k_configure_filter,
2326 .sta_add = ath9k_sta_add,
2327 .sta_remove = ath9k_sta_remove,
2328 .sta_notify = ath9k_sta_notify,
2329 .conf_tx = ath9k_conf_tx,
2330 .bss_info_changed = ath9k_bss_info_changed,
2331 .set_key = ath9k_set_key,
2332 .get_tsf = ath9k_get_tsf,
2333 .set_tsf = ath9k_set_tsf,
2334 .reset_tsf = ath9k_reset_tsf,
2335 .ampdu_action = ath9k_ampdu_action,
2336 .get_survey = ath9k_get_survey,
2337 .rfkill_poll = ath9k_rfkill_poll_state,
2338 .set_coverage_class = ath9k_set_coverage_class,
2339 .flush = ath9k_flush,
2340 .tx_frames_pending = ath9k_tx_frames_pending,
2341 .tx_last_beacon = ath9k_tx_last_beacon,
2342 .release_buffered_frames = ath9k_release_buffered_frames,
2343 .get_stats = ath9k_get_stats,
2344 .set_antenna = ath9k_set_antenna,
2345 .get_antenna = ath9k_get_antenna,
2346
2347#ifdef CONFIG_PM_SLEEP
2348 .suspend = ath9k_suspend,
2349 .resume = ath9k_resume,
2350 .set_wakeup = ath9k_set_wakeup,
2351#endif
2352
2353#ifdef CONFIG_ATH9K_DEBUGFS
2354 .get_et_sset_count = ath9k_get_et_sset_count,
2355 .get_et_stats = ath9k_get_et_stats,
2356 .get_et_strings = ath9k_get_et_strings,
2357#endif
2358
2359#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
2360 .sta_add_debugfs = ath9k_sta_add_debugfs,
2361 .sta_remove_debugfs = ath9k_sta_remove_debugfs,
2362#endif
2363 .sw_scan_start = ath9k_sw_scan_start,
2364 .sw_scan_complete = ath9k_sw_scan_complete,
2365};
2366