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30#include "../wifi.h"
31#include "../pci.h"
32#include "../base.h"
33#include "../stats.h"
34#include "reg.h"
35#include "def.h"
36#include "phy.h"
37#include "trx.h"
38#include "led.h"
39
40static u8 _rtl8723ae_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
41{
42 __le16 fc = rtl_get_fc(skb);
43
44 if (unlikely(ieee80211_is_beacon(fc)))
45 return QSLT_BEACON;
46 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
47 return QSLT_MGNT;
48
49 return skb->priority;
50}
51
52static void _rtl8723ae_query_rxphystatus(struct ieee80211_hw *hw,
53 struct rtl_stats *pstatus, u8 *pdesc,
54 struct rx_fwinfo_8723e *p_drvinfo,
55 bool bpacket_match_bssid,
56 bool bpacket_toself, bool packet_beacon)
57{
58 struct rtl_priv *rtlpriv = rtl_priv(hw);
59 struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
60 struct phy_sts_cck_8723e_t *cck_buf;
61 s8 rx_pwr_all, rx_pwr[4];
62 u8 rf_rx_num = 0, evm, pwdb_all;
63 u8 i, max_spatial_stream;
64 u32 rssi, total_rssi = 0;
65 bool is_cck = pstatus->is_cck;
66
67
68 pstatus->packet_matchbssid = bpacket_match_bssid;
69 pstatus->packet_toself = bpacket_toself;
70 pstatus->packet_beacon = packet_beacon;
71 pstatus->rx_mimo_sig_qual[0] = -1;
72 pstatus->rx_mimo_sig_qual[1] = -1;
73
74 if (is_cck) {
75 u8 report, cck_highpwr;
76
77
78 cck_buf = (struct phy_sts_cck_8723e_t *)p_drvinfo;
79
80
81
82
83
84 if (ppsc->rfpwr_state == ERFON)
85 cck_highpwr = (u8) rtl_get_bbreg(hw,
86 RFPGA0_XA_HSSIPARAMETER2,
87 BIT(9));
88 else
89 cck_highpwr = false;
90
91 if (!cck_highpwr) {
92 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
93 report = cck_buf->cck_agc_rpt & 0xc0;
94 report = report >> 6;
95 switch (report) {
96 case 0x3:
97 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
98 break;
99 case 0x2:
100 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
101 break;
102 case 0x1:
103 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
104 break;
105 case 0x0:
106 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
107 break;
108 }
109 } else {
110 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
111 report = p_drvinfo->cfosho[0] & 0x60;
112 report = report >> 5;
113 switch (report) {
114 case 0x3:
115 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
116 break;
117 case 0x2:
118 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
119 break;
120 case 0x1:
121 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
122 break;
123 case 0x0:
124 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
125 break;
126 }
127 }
128
129 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
130
131
132
133 pwdb_all += 6;
134 if (pwdb_all > 100)
135 pwdb_all = 100;
136
137
138
139 if (pwdb_all > 34 && pwdb_all <= 42)
140 pwdb_all -= 2;
141 else if (pwdb_all > 26 && pwdb_all <= 34)
142 pwdb_all -= 6;
143 else if (pwdb_all > 14 && pwdb_all <= 26)
144 pwdb_all -= 8;
145 else if (pwdb_all > 4 && pwdb_all <= 14)
146 pwdb_all -= 4;
147
148 pstatus->rx_pwdb_all = pwdb_all;
149 pstatus->recvsignalpower = rx_pwr_all;
150
151
152 if (bpacket_match_bssid) {
153 u8 sq;
154
155 if (pstatus->rx_pwdb_all > 40) {
156 sq = 100;
157 } else {
158 sq = cck_buf->sq_rpt;
159 if (sq > 64)
160 sq = 0;
161 else if (sq < 20)
162 sq = 100;
163 else
164 sq = ((64 - sq) * 100) / 44;
165 }
166
167 pstatus->signalquality = sq;
168 pstatus->rx_mimo_sig_qual[0] = sq;
169 pstatus->rx_mimo_sig_qual[1] = -1;
170 }
171 } else {
172 rtlpriv->dm.rfpath_rxenable[0] =
173 rtlpriv->dm.rfpath_rxenable[1] = true;
174
175
176 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
177
178
179 if (rtlpriv->dm.rfpath_rxenable[i])
180 rf_rx_num++;
181
182 rx_pwr[i] = ((p_drvinfo->gain_trsw[i] & 0x3f)*2) - 110;
183
184
185 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
186 total_rssi += rssi;
187
188
189 rtlpriv->stats.rx_snr_db[i] = (p_drvinfo->rxsnr[i] / 2);
190
191
192 if (bpacket_match_bssid)
193 pstatus->rx_mimo_signalstrength[i] = (u8) rssi;
194 }
195
196
197
198
199 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
200
201 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
202 pstatus->rx_pwdb_all = pwdb_all;
203 pstatus->rxpower = rx_pwr_all;
204 pstatus->recvsignalpower = rx_pwr_all;
205
206
207 if (pstatus->is_ht && pstatus->rate >= DESC92_RATEMCS8 &&
208 pstatus->rate <= DESC92_RATEMCS15)
209 max_spatial_stream = 2;
210 else
211 max_spatial_stream = 1;
212
213 for (i = 0; i < max_spatial_stream; i++) {
214 evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
215
216 if (bpacket_match_bssid) {
217
218
219
220 if (i == 0)
221 pstatus->signalquality = (evm & 0xff);
222 pstatus->rx_mimo_sig_qual[i] = (evm & 0xff);
223 }
224 }
225 }
226
227
228
229
230 if (is_cck)
231 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
232 pwdb_all));
233 else if (rf_rx_num != 0)
234 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
235 total_rssi /= rf_rx_num));
236}
237
238static void _rtl8723ae_translate_rx_signal_stuff(struct ieee80211_hw *hw,
239 struct sk_buff *skb, struct rtl_stats *pstatus,
240 u8 *pdesc, struct rx_fwinfo_8723e *p_drvinfo)
241{
242 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
243 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
244 struct ieee80211_hdr *hdr;
245 u8 *tmp_buf;
246 u8 *praddr;
247 __le16 fc;
248 u16 type;
249 bool packet_matchbssid, packet_toself, packet_beacon = false;
250
251 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
252
253 hdr = (struct ieee80211_hdr *)tmp_buf;
254 fc = hdr->frame_control;
255 type = WLAN_FC_GET_TYPE(fc);
256 praddr = hdr->addr1;
257
258 packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
259 (!compare_ether_addr(mac->bssid,
260 (le16_to_cpu(fc) & IEEE80211_FCTL_TODS) ?
261 hdr->addr1 : (le16_to_cpu(fc) &
262 IEEE80211_FCTL_FROMDS) ?
263 hdr->addr2 : hdr->addr3)) && (!pstatus->hwerror) &&
264 (!pstatus->crc) && (!pstatus->icv));
265
266 packet_toself = packet_matchbssid &&
267 (!compare_ether_addr(praddr, rtlefuse->dev_addr));
268
269 if (ieee80211_is_beacon(fc))
270 packet_beacon = true;
271
272 _rtl8723ae_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
273 packet_matchbssid, packet_toself,
274 packet_beacon);
275
276 rtl_process_phyinfo(hw, tmp_buf, pstatus);
277}
278
279bool rtl8723ae_rx_query_desc(struct ieee80211_hw *hw,
280 struct rtl_stats *status,
281 struct ieee80211_rx_status *rx_status,
282 u8 *pdesc, struct sk_buff *skb)
283{
284 struct rx_fwinfo_8723e *p_drvinfo;
285 struct ieee80211_hdr *hdr;
286 u32 phystatus = GET_RX_DESC_PHYST(pdesc);
287
288 status->length = (u16) GET_RX_DESC_PKT_LEN(pdesc);
289 status->rx_drvinfo_size = (u8) GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
290 RX_DRV_INFO_SIZE_UNIT;
291 status->rx_bufshift = (u8) (GET_RX_DESC_SHIFT(pdesc) & 0x03);
292 status->icv = (u16) GET_RX_DESC_ICV(pdesc);
293 status->crc = (u16) GET_RX_DESC_CRC32(pdesc);
294 status->hwerror = (status->crc | status->icv);
295 status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
296 status->rate = (u8) GET_RX_DESC_RXMCS(pdesc);
297 status->shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
298 status->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
299 status->isfirst_ampdu = (bool) ((GET_RX_DESC_PAGGR(pdesc) == 1)
300 && (GET_RX_DESC_FAGGR(pdesc) == 1));
301 status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
302 status->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
303 status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
304
305 status->is_cck = RTL8723E_RX_HAL_IS_CCK_RATE(status->rate);
306
307 rx_status->freq = hw->conf.chandef.chan->center_freq;
308 rx_status->band = hw->conf.chandef.chan->band;
309
310 if (status->crc)
311 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
312
313 if (status->rx_is40Mhzpacket)
314 rx_status->flag |= RX_FLAG_40MHZ;
315
316 if (status->is_ht)
317 rx_status->flag |= RX_FLAG_HT;
318
319 rx_status->flag |= RX_FLAG_MACTIME_START;
320
321
322
323
324
325
326
327
328
329 if (status->decrypted) {
330 hdr = (struct ieee80211_hdr *)(skb->data +
331 status->rx_drvinfo_size + status->rx_bufshift);
332
333 if (!hdr) {
334
335 return false;
336 }
337 if ((ieee80211_is_robust_mgmt_frame(hdr)) &&
338 (ieee80211_has_protected(hdr->frame_control)))
339 rx_status->flag &= ~RX_FLAG_DECRYPTED;
340 else
341 rx_status->flag |= RX_FLAG_DECRYPTED;
342 }
343
344
345
346
347
348 rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
349 status->rate, false);
350
351 rx_status->mactime = status->timestamp_low;
352 if (phystatus == true) {
353 p_drvinfo = (struct rx_fwinfo_8723e *)(skb->data +
354 status->rx_bufshift);
355
356 _rtl8723ae_translate_rx_signal_stuff(hw,
357 skb, status, pdesc, p_drvinfo);
358 }
359
360
361 rx_status->signal = status->recvsignalpower + 10;
362
363
364 return true;
365}
366
367void rtl8723ae_tx_fill_desc(struct ieee80211_hw *hw,
368 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
369 struct ieee80211_tx_info *info,
370 struct ieee80211_sta *sta,
371 struct sk_buff *skb, u8 hw_queue,
372 struct rtl_tcb_desc *ptcdesc)
373{
374 struct rtl_priv *rtlpriv = rtl_priv(hw);
375 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
376 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
377 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
378 bool defaultadapter = true;
379 u8 *pdesc = (u8 *) pdesc_tx;
380 u16 seq_number;
381 __le16 fc = hdr->frame_control;
382 u8 fw_qsel = _rtl8723ae_map_hwqueue_to_fwqueue(skb, hw_queue);
383 bool firstseg = ((hdr->seq_ctrl &
384 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
385 bool lastseg = ((hdr->frame_control &
386 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
387 dma_addr_t mapping = pci_map_single(rtlpci->pdev,
388 skb->data, skb->len,
389 PCI_DMA_TODEVICE);
390 u8 bw_40 = 0;
391
392 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
393 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
394 "DMA mapping error");
395 return;
396 }
397 if (mac->opmode == NL80211_IFTYPE_STATION) {
398 bw_40 = mac->bw_40;
399 } else if (mac->opmode == NL80211_IFTYPE_AP ||
400 mac->opmode == NL80211_IFTYPE_ADHOC) {
401 if (sta)
402 bw_40 = sta->bandwidth >= IEEE80211_STA_RX_BW_40;
403 }
404
405 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
406
407 rtl_get_tcb_desc(hw, info, sta, skb, ptcdesc);
408
409 CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8723e));
410
411 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
412 firstseg = true;
413 lastseg = true;
414 }
415
416 if (firstseg) {
417 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
418
419 SET_TX_DESC_TX_RATE(pdesc, ptcdesc->hw_rate);
420
421 if (ptcdesc->use_shortgi || ptcdesc->use_shortpreamble)
422 SET_TX_DESC_DATA_SHORTGI(pdesc, 1);
423
424 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
425 SET_TX_DESC_AGG_BREAK(pdesc, 1);
426 SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
427 }
428 SET_TX_DESC_SEQ(pdesc, seq_number);
429
430 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcdesc->rts_enable &&
431 !ptcdesc->
432 cts_enable) ? 1 : 0));
433 SET_TX_DESC_HW_RTS_ENABLE(pdesc,
434 ((ptcdesc->rts_enable
435 || ptcdesc->cts_enable) ? 1 : 0));
436 SET_TX_DESC_CTS2SELF(pdesc, ((ptcdesc->cts_enable) ? 1 : 0));
437 SET_TX_DESC_RTS_STBC(pdesc, ((ptcdesc->rts_stbc) ? 1 : 0));
438
439 SET_TX_DESC_RTS_RATE(pdesc, ptcdesc->rts_rate);
440 SET_TX_DESC_RTS_BW(pdesc, 0);
441 SET_TX_DESC_RTS_SC(pdesc, ptcdesc->rts_sc);
442 SET_TX_DESC_RTS_SHORT(pdesc,
443 ((ptcdesc->rts_rate <= DESC92_RATE54M) ?
444 (ptcdesc->rts_use_shortpreamble ? 1 : 0)
445 : (ptcdesc->rts_use_shortgi ? 1 : 0)));
446
447 if (bw_40) {
448 if (ptcdesc->packet_bw) {
449 SET_TX_DESC_DATA_BW(pdesc, 1);
450 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
451 } else {
452 SET_TX_DESC_DATA_BW(pdesc, 0);
453 SET_TX_DESC_TX_SUB_CARRIER(pdesc,
454 mac->cur_40_prime_sc);
455 }
456 } else {
457 SET_TX_DESC_DATA_BW(pdesc, 0);
458 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
459 }
460
461 SET_TX_DESC_LINIP(pdesc, 0);
462 SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
463
464 if (sta) {
465 u8 ampdu_density = sta->ht_cap.ampdu_density;
466 SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
467 }
468
469 if (info->control.hw_key) {
470 struct ieee80211_key_conf *keyconf =
471 info->control.hw_key;
472
473 switch (keyconf->cipher) {
474 case WLAN_CIPHER_SUITE_WEP40:
475 case WLAN_CIPHER_SUITE_WEP104:
476 case WLAN_CIPHER_SUITE_TKIP:
477 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
478 break;
479 case WLAN_CIPHER_SUITE_CCMP:
480 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
481 break;
482 default:
483 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
484 break;
485 }
486 }
487
488 SET_TX_DESC_PKT_ID(pdesc, 0);
489 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
490
491 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
492 SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
493 SET_TX_DESC_DISABLE_FB(pdesc, 0);
494 SET_TX_DESC_USE_RATE(pdesc, ptcdesc->use_driver_rate ? 1 : 0);
495
496 if (ieee80211_is_data_qos(fc)) {
497 if (mac->rdg_en) {
498 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
499 "Enable RDG function.\n");
500 SET_TX_DESC_RDG_ENABLE(pdesc, 1);
501 SET_TX_DESC_HTC(pdesc, 1);
502 }
503 }
504 }
505
506 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
507 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
508
509 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
510
511 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
512
513 if (rtlpriv->dm.useramask) {
514 SET_TX_DESC_RATE_ID(pdesc, ptcdesc->ratr_index);
515 SET_TX_DESC_MACID(pdesc, ptcdesc->mac_id);
516 } else {
517 SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcdesc->ratr_index);
518 SET_TX_DESC_MACID(pdesc, ptcdesc->ratr_index);
519 }
520
521 if ((!ieee80211_is_data_qos(fc)) && ppsc->fwctrl_lps) {
522 SET_TX_DESC_HWSEQ_EN_8723(pdesc, 1);
523
524 if (!defaultadapter)
525 SET_TX_DESC_HWSEQ_SEL_8723(pdesc, 1);
526 }
527
528 SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
529
530 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
531 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
532 SET_TX_DESC_BMC(pdesc, 1);
533 }
534
535 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
536}
537
538void rtl8723ae_tx_fill_cmddesc(struct ieee80211_hw *hw,
539 u8 *pdesc, bool firstseg,
540 bool lastseg, struct sk_buff *skb)
541{
542 struct rtl_priv *rtlpriv = rtl_priv(hw);
543 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
544 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
545 u8 fw_queue = QSLT_BEACON;
546 dma_addr_t mapping = pci_map_single(rtlpci->pdev,
547 skb->data, skb->len,
548 PCI_DMA_TODEVICE);
549 __le16 fc = hdr->frame_control;
550
551 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
552 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
553 "DMA mapping error");
554 return;
555 }
556 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
557
558 if (firstseg)
559 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
560
561 SET_TX_DESC_TX_RATE(pdesc, DESC92_RATE1M);
562
563 SET_TX_DESC_SEQ(pdesc, 0);
564
565 SET_TX_DESC_LINIP(pdesc, 0);
566
567 SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
568
569 SET_TX_DESC_FIRST_SEG(pdesc, 1);
570 SET_TX_DESC_LAST_SEG(pdesc, 1);
571
572 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) (skb->len));
573
574 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
575
576 SET_TX_DESC_RATE_ID(pdesc, 7);
577 SET_TX_DESC_MACID(pdesc, 0);
578
579 SET_TX_DESC_OWN(pdesc, 1);
580
581 SET_TX_DESC_PKT_SIZE((u8 *) pdesc, (u16) (skb->len));
582
583 SET_TX_DESC_FIRST_SEG(pdesc, 1);
584 SET_TX_DESC_LAST_SEG(pdesc, 1);
585
586 SET_TX_DESC_OFFSET(pdesc, 0x20);
587
588 SET_TX_DESC_USE_RATE(pdesc, 1);
589
590 if (!ieee80211_is_data_qos(fc)) {
591 SET_TX_DESC_HWSEQ_EN_8723(pdesc, 1);
592
593
594 }
595
596 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
597 "H2C Tx Cmd Content\n",
598 pdesc, TX_DESC_SIZE);
599}
600
601void rtl8723ae_set_desc(u8 *pdesc, bool istx, u8 desc_name, u8 *val)
602{
603 if (istx == true) {
604 switch (desc_name) {
605 case HW_DESC_OWN:
606 SET_TX_DESC_OWN(pdesc, 1);
607 break;
608 case HW_DESC_TX_NEXTDESC_ADDR:
609 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
610 break;
611 default:
612 RT_ASSERT(false, "ERR txdesc :%d not process\n",
613 desc_name);
614 break;
615 }
616 } else {
617 switch (desc_name) {
618 case HW_DESC_RXOWN:
619 SET_RX_DESC_OWN(pdesc, 1);
620 break;
621 case HW_DESC_RXBUFF_ADDR:
622 SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *) val);
623 break;
624 case HW_DESC_RXPKT_LEN:
625 SET_RX_DESC_PKT_LEN(pdesc, *(u32 *) val);
626 break;
627 case HW_DESC_RXERO:
628 SET_RX_DESC_EOR(pdesc, 1);
629 break;
630 default:
631 RT_ASSERT(false, "ERR rxdesc :%d not process\n",
632 desc_name);
633 break;
634 }
635 }
636}
637
638u32 rtl8723ae_get_desc(u8 *pdesc, bool istx, u8 desc_name)
639{
640 u32 ret = 0;
641
642 if (istx == true) {
643 switch (desc_name) {
644 case HW_DESC_OWN:
645 ret = GET_TX_DESC_OWN(pdesc);
646 break;
647 case HW_DESC_TXBUFF_ADDR:
648 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
649 break;
650 default:
651 RT_ASSERT(false, "ERR txdesc :%d not process\n",
652 desc_name);
653 break;
654 }
655 } else {
656 switch (desc_name) {
657 case HW_DESC_OWN:
658 ret = GET_RX_DESC_OWN(pdesc);
659 break;
660 case HW_DESC_RXPKT_LEN:
661 ret = GET_RX_DESC_PKT_LEN(pdesc);
662 break;
663 default:
664 RT_ASSERT(false, "ERR rxdesc :%d not process\n",
665 desc_name);
666 break;
667 }
668 }
669 return ret;
670}
671
672void rtl8723ae_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
673{
674 struct rtl_priv *rtlpriv = rtl_priv(hw);
675 if (hw_queue == BEACON_QUEUE) {
676 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
677 } else {
678 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
679 BIT(0) << (hw_queue));
680 }
681}
682
