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29#include <linux/module.h>
30#include <linux/kernel.h>
31#include <linux/types.h>
32#include <linux/slab.h>
33#include <linux/workqueue.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/wait.h>
37#include <linux/pci.h>
38#include <linux/pci_hotplug.h>
39#include <linux/kthread.h>
40#include "cpqphp.h"
41
42static u32 configure_new_device(struct controller* ctrl, struct pci_func *func,
43 u8 behind_bridge, struct resource_lists *resources);
44static int configure_new_function(struct controller* ctrl, struct pci_func *func,
45 u8 behind_bridge, struct resource_lists *resources);
46static void interrupt_event_handler(struct controller *ctrl);
47
48
49static struct task_struct *cpqhp_event_thread;
50static unsigned long pushbutton_pending;
51
52
53static void long_delay(int delay)
54{
55
56
57
58
59
60
61 msleep_interruptible(jiffies_to_msecs(delay));
62}
63
64
65
66#define WRONG_BUS_FREQUENCY 0x07
67static u8 handle_switch_change(u8 change, struct controller * ctrl)
68{
69 int hp_slot;
70 u8 rc = 0;
71 u16 temp_word;
72 struct pci_func *func;
73 struct event_info *taskInfo;
74
75 if (!change)
76 return 0;
77
78
79 dbg("cpqsbd: Switch interrupt received.\n");
80
81 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
82 if (change & (0x1L << hp_slot)) {
83
84
85
86 func = cpqhp_slot_find(ctrl->bus,
87 (hp_slot + ctrl->slot_device_offset), 0);
88
89
90
91
92 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
93 ctrl->next_event = (ctrl->next_event + 1) % 10;
94 taskInfo->hp_slot = hp_slot;
95
96 rc++;
97
98 temp_word = ctrl->ctrl_int_comp >> 16;
99 func->presence_save = (temp_word >> hp_slot) & 0x01;
100 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
101
102 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
103
104
105
106
107 func->switch_save = 0;
108
109 taskInfo->event_type = INT_SWITCH_OPEN;
110 } else {
111
112
113
114
115 func->switch_save = 0x10;
116
117 taskInfo->event_type = INT_SWITCH_CLOSE;
118 }
119 }
120 }
121
122 return rc;
123}
124
125
126
127
128
129
130static struct slot *cpqhp_find_slot(struct controller *ctrl, u8 device)
131{
132 struct slot *slot = ctrl->slot;
133
134 while (slot && (slot->device != device))
135 slot = slot->next;
136
137 return slot;
138}
139
140
141static u8 handle_presence_change(u16 change, struct controller * ctrl)
142{
143 int hp_slot;
144 u8 rc = 0;
145 u8 temp_byte;
146 u16 temp_word;
147 struct pci_func *func;
148 struct event_info *taskInfo;
149 struct slot *p_slot;
150
151 if (!change)
152 return 0;
153
154
155
156
157 dbg("cpqsbd: Presence/Notify input change.\n");
158 dbg(" Changed bits are 0x%4.4x\n", change );
159
160 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
161 if (change & (0x0101 << hp_slot)) {
162
163
164
165 func = cpqhp_slot_find(ctrl->bus,
166 (hp_slot + ctrl->slot_device_offset), 0);
167
168 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
169 ctrl->next_event = (ctrl->next_event + 1) % 10;
170 taskInfo->hp_slot = hp_slot;
171
172 rc++;
173
174 p_slot = cpqhp_find_slot(ctrl, hp_slot + (readb(ctrl->hpc_reg + SLOT_MASK) >> 4));
175 if (!p_slot)
176 return 0;
177
178
179
180
181 if (func->switch_save && (ctrl->push_button == 1)) {
182 temp_word = ctrl->ctrl_int_comp >> 16;
183 temp_byte = (temp_word >> hp_slot) & 0x01;
184 temp_byte |= (temp_word >> (hp_slot + 7)) & 0x02;
185
186 if (temp_byte != func->presence_save) {
187
188
189
190 dbg("hp_slot %d button pressed\n", hp_slot);
191 taskInfo->event_type = INT_BUTTON_PRESS;
192 } else {
193
194
195
196 dbg("hp_slot %d button released\n", hp_slot);
197 taskInfo->event_type = INT_BUTTON_RELEASE;
198
199
200 if ((p_slot->state == BLINKINGON_STATE)
201 || (p_slot->state == BLINKINGOFF_STATE)) {
202 taskInfo->event_type = INT_BUTTON_CANCEL;
203 dbg("hp_slot %d button cancel\n", hp_slot);
204 } else if ((p_slot->state == POWERON_STATE)
205 || (p_slot->state == POWEROFF_STATE)) {
206
207 taskInfo->event_type = INT_BUTTON_IGNORE;
208 dbg("hp_slot %d button ignore\n", hp_slot);
209 }
210 }
211 } else {
212
213
214
215 temp_word = ctrl->ctrl_int_comp >> 16;
216 func->presence_save = (temp_word >> hp_slot) & 0x01;
217 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
218
219 if ((!(ctrl->ctrl_int_comp & (0x010000 << hp_slot))) ||
220 (!(ctrl->ctrl_int_comp & (0x01000000 << hp_slot)))) {
221
222 taskInfo->event_type = INT_PRESENCE_ON;
223 } else {
224
225 taskInfo->event_type = INT_PRESENCE_OFF;
226 }
227 }
228 }
229 }
230
231 return rc;
232}
233
234
235static u8 handle_power_fault(u8 change, struct controller * ctrl)
236{
237 int hp_slot;
238 u8 rc = 0;
239 struct pci_func *func;
240 struct event_info *taskInfo;
241
242 if (!change)
243 return 0;
244
245
246
247
248
249 info("power fault interrupt\n");
250
251 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
252 if (change & (0x01 << hp_slot)) {
253
254
255
256 func = cpqhp_slot_find(ctrl->bus,
257 (hp_slot + ctrl->slot_device_offset), 0);
258
259 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
260 ctrl->next_event = (ctrl->next_event + 1) % 10;
261 taskInfo->hp_slot = hp_slot;
262
263 rc++;
264
265 if (ctrl->ctrl_int_comp & (0x00000100 << hp_slot)) {
266
267
268
269 func->status = 0x00;
270
271 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
272 } else {
273
274
275
276 taskInfo->event_type = INT_POWER_FAULT;
277
278 if (ctrl->rev < 4) {
279 amber_LED_on (ctrl, hp_slot);
280 green_LED_off (ctrl, hp_slot);
281 set_SOGO (ctrl);
282
283
284
285
286
287
288
289
290
291
292
293
294
295 } else {
296
297 func->status = 0xFF;
298 info("power fault bit %x set\n", hp_slot);
299 }
300 }
301 }
302 }
303
304 return rc;
305}
306
307
308
309
310
311
312static int sort_by_size(struct pci_resource **head)
313{
314 struct pci_resource *current_res;
315 struct pci_resource *next_res;
316 int out_of_order = 1;
317
318 if (!(*head))
319 return 1;
320
321 if (!((*head)->next))
322 return 0;
323
324 while (out_of_order) {
325 out_of_order = 0;
326
327
328 if (((*head)->next) &&
329 ((*head)->length > (*head)->next->length)) {
330 out_of_order++;
331 current_res = *head;
332 *head = (*head)->next;
333 current_res->next = (*head)->next;
334 (*head)->next = current_res;
335 }
336
337 current_res = *head;
338
339 while (current_res->next && current_res->next->next) {
340 if (current_res->next->length > current_res->next->next->length) {
341 out_of_order++;
342 next_res = current_res->next;
343 current_res->next = current_res->next->next;
344 current_res = current_res->next;
345 next_res->next = current_res->next;
346 current_res->next = next_res;
347 } else
348 current_res = current_res->next;
349 }
350 }
351
352 return 0;
353}
354
355
356
357
358
359
360static int sort_by_max_size(struct pci_resource **head)
361{
362 struct pci_resource *current_res;
363 struct pci_resource *next_res;
364 int out_of_order = 1;
365
366 if (!(*head))
367 return 1;
368
369 if (!((*head)->next))
370 return 0;
371
372 while (out_of_order) {
373 out_of_order = 0;
374
375
376 if (((*head)->next) &&
377 ((*head)->length < (*head)->next->length)) {
378 out_of_order++;
379 current_res = *head;
380 *head = (*head)->next;
381 current_res->next = (*head)->next;
382 (*head)->next = current_res;
383 }
384
385 current_res = *head;
386
387 while (current_res->next && current_res->next->next) {
388 if (current_res->next->length < current_res->next->next->length) {
389 out_of_order++;
390 next_res = current_res->next;
391 current_res->next = current_res->next->next;
392 current_res = current_res->next;
393 next_res->next = current_res->next;
394 current_res->next = next_res;
395 } else
396 current_res = current_res->next;
397 }
398 }
399
400 return 0;
401}
402
403
404
405
406
407
408
409
410static struct pci_resource *do_pre_bridge_resource_split(struct pci_resource **head,
411 struct pci_resource **orig_head, u32 alignment)
412{
413 struct pci_resource *prevnode = NULL;
414 struct pci_resource *node;
415 struct pci_resource *split_node;
416 u32 rc;
417 u32 temp_dword;
418 dbg("do_pre_bridge_resource_split\n");
419
420 if (!(*head) || !(*orig_head))
421 return NULL;
422
423 rc = cpqhp_resource_sort_and_combine(head);
424
425 if (rc)
426 return NULL;
427
428 if ((*head)->base != (*orig_head)->base)
429 return NULL;
430
431 if ((*head)->length == (*orig_head)->length)
432 return NULL;
433
434
435
436
437
438
439 node = *head;
440
441 if (node->length & (alignment -1)) {
442
443
444
445 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
446
447 if (!split_node)
448 return NULL;
449
450 temp_dword = (node->length | (alignment-1)) + 1 - alignment;
451
452 split_node->base = node->base;
453 split_node->length = temp_dword;
454
455 node->length -= temp_dword;
456 node->base += split_node->length;
457
458
459 *head = split_node;
460 split_node->next = node;
461 }
462
463 if (node->length < alignment)
464 return NULL;
465
466
467 if (*head == node) {
468 *head = node->next;
469 } else {
470 prevnode = *head;
471 while (prevnode->next != node)
472 prevnode = prevnode->next;
473
474 prevnode->next = node->next;
475 }
476 node->next = NULL;
477
478 return node;
479}
480
481
482
483
484
485
486
487static struct pci_resource *do_bridge_resource_split(struct pci_resource **head, u32 alignment)
488{
489 struct pci_resource *prevnode = NULL;
490 struct pci_resource *node;
491 u32 rc;
492 u32 temp_dword;
493
494 rc = cpqhp_resource_sort_and_combine(head);
495
496 if (rc)
497 return NULL;
498
499 node = *head;
500
501 while (node->next) {
502 prevnode = node;
503 node = node->next;
504 kfree(prevnode);
505 }
506
507 if (node->length < alignment)
508 goto error;
509
510 if (node->base & (alignment - 1)) {
511
512 temp_dword = (node->base | (alignment-1)) + 1;
513 if ((node->length - (temp_dword - node->base)) < alignment)
514 goto error;
515
516 node->length -= (temp_dword - node->base);
517 node->base = temp_dword;
518 }
519
520 if (node->length & (alignment - 1))
521
522 goto error;
523
524 return node;
525error:
526 kfree(node);
527 return NULL;
528}
529
530
531
532
533
534
535
536
537
538
539
540static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size)
541{
542 struct pci_resource *prevnode;
543 struct pci_resource *node;
544 struct pci_resource *split_node;
545 u32 temp_dword;
546
547 if (!(*head))
548 return NULL;
549
550 if (cpqhp_resource_sort_and_combine(head))
551 return NULL;
552
553 if (sort_by_size(head))
554 return NULL;
555
556 for (node = *head; node; node = node->next) {
557 if (node->length < size)
558 continue;
559
560 if (node->base & (size - 1)) {
561
562
563
564 temp_dword = (node->base | (size-1)) + 1;
565
566
567 if ((node->length - (temp_dword - node->base)) < size)
568 continue;
569
570 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
571
572 if (!split_node)
573 return NULL;
574
575 split_node->base = node->base;
576 split_node->length = temp_dword - node->base;
577 node->base = temp_dword;
578 node->length -= split_node->length;
579
580
581 split_node->next = node->next;
582 node->next = split_node;
583 }
584
585
586 if (node->length > size) {
587
588
589
590 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
591
592 if (!split_node)
593 return NULL;
594
595 split_node->base = node->base + size;
596 split_node->length = node->length - size;
597 node->length = size;
598
599
600 split_node->next = node->next;
601 node->next = split_node;
602 }
603
604
605 if (node->base & 0x300L)
606 continue;
607
608
609
610
611 if (*head == node) {
612 *head = node->next;
613 } else {
614 prevnode = *head;
615 while (prevnode->next != node)
616 prevnode = prevnode->next;
617
618 prevnode->next = node->next;
619 }
620 node->next = NULL;
621 break;
622 }
623
624 return node;
625}
626
627
628
629
630
631
632
633
634
635
636
637static struct pci_resource *get_max_resource(struct pci_resource **head, u32 size)
638{
639 struct pci_resource *max;
640 struct pci_resource *temp;
641 struct pci_resource *split_node;
642 u32 temp_dword;
643
644 if (cpqhp_resource_sort_and_combine(head))
645 return NULL;
646
647 if (sort_by_max_size(head))
648 return NULL;
649
650 for (max = *head; max; max = max->next) {
651
652
653
654 if (max->length < size)
655 continue;
656
657 if (max->base & (size - 1)) {
658
659
660
661 temp_dword = (max->base | (size-1)) + 1;
662
663
664 if ((max->length - (temp_dword - max->base)) < size)
665 continue;
666
667 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
668
669 if (!split_node)
670 return NULL;
671
672 split_node->base = max->base;
673 split_node->length = temp_dword - max->base;
674 max->base = temp_dword;
675 max->length -= split_node->length;
676
677 split_node->next = max->next;
678 max->next = split_node;
679 }
680
681 if ((max->base + max->length) & (size - 1)) {
682
683
684
685 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
686
687 if (!split_node)
688 return NULL;
689 temp_dword = ((max->base + max->length) & ~(size - 1));
690 split_node->base = temp_dword;
691 split_node->length = max->length + max->base
692 - split_node->base;
693 max->length -= split_node->length;
694
695 split_node->next = max->next;
696 max->next = split_node;
697 }
698
699
700 if (max->length < size)
701 continue;
702
703
704 temp = *head;
705 if (temp == max) {
706 *head = max->next;
707 } else {
708 while (temp && temp->next != max) {
709 temp = temp->next;
710 }
711
712 temp->next = max->next;
713 }
714
715 max->next = NULL;
716 break;
717 }
718
719 return max;
720}
721
722
723
724
725
726
727
728
729
730
731
732
733
734static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
735{
736 struct pci_resource *prevnode;
737 struct pci_resource *node;
738 struct pci_resource *split_node;
739 u32 temp_dword;
740
741 if (cpqhp_resource_sort_and_combine(head))
742 return NULL;
743
744 if (sort_by_size(head))
745 return NULL;
746
747 for (node = *head; node; node = node->next) {
748 dbg("%s: req_size =%x node=%p, base=%x, length=%x\n",
749 __func__, size, node, node->base, node->length);
750 if (node->length < size)
751 continue;
752
753 if (node->base & (size - 1)) {
754 dbg("%s: not aligned\n", __func__);
755
756
757
758 temp_dword = (node->base | (size-1)) + 1;
759
760
761 if ((node->length - (temp_dword - node->base)) < size)
762 continue;
763
764 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
765
766 if (!split_node)
767 return NULL;
768
769 split_node->base = node->base;
770 split_node->length = temp_dword - node->base;
771 node->base = temp_dword;
772 node->length -= split_node->length;
773
774 split_node->next = node->next;
775 node->next = split_node;
776 }
777
778
779 if (node->length > size) {
780 dbg("%s: too big\n", __func__);
781
782
783
784 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
785
786 if (!split_node)
787 return NULL;
788
789 split_node->base = node->base + size;
790 split_node->length = node->length - size;
791 node->length = size;
792
793
794 split_node->next = node->next;
795 node->next = split_node;
796 }
797
798 dbg("%s: got one!!!\n", __func__);
799
800
801 if (*head == node) {
802 *head = node->next;
803 } else {
804 prevnode = *head;
805 while (prevnode->next != node)
806 prevnode = prevnode->next;
807
808 prevnode->next = node->next;
809 }
810 node->next = NULL;
811 break;
812 }
813 return node;
814}
815
816
817
818
819
820
821
822
823
824
825
826
827int cpqhp_resource_sort_and_combine(struct pci_resource **head)
828{
829 struct pci_resource *node1;
830 struct pci_resource *node2;
831 int out_of_order = 1;
832
833 dbg("%s: head = %p, *head = %p\n", __func__, head, *head);
834
835 if (!(*head))
836 return 1;
837
838 dbg("*head->next = %p\n",(*head)->next);
839
840 if (!(*head)->next)
841 return 0;
842
843 dbg("*head->base = 0x%x\n",(*head)->base);
844 dbg("*head->next->base = 0x%x\n",(*head)->next->base);
845 while (out_of_order) {
846 out_of_order = 0;
847
848
849 if (((*head)->next) &&
850 ((*head)->base > (*head)->next->base)) {
851 node1 = *head;
852 (*head) = (*head)->next;
853 node1->next = (*head)->next;
854 (*head)->next = node1;
855 out_of_order++;
856 }
857
858 node1 = (*head);
859
860 while (node1->next && node1->next->next) {
861 if (node1->next->base > node1->next->next->base) {
862 out_of_order++;
863 node2 = node1->next;
864 node1->next = node1->next->next;
865 node1 = node1->next;
866 node2->next = node1->next;
867 node1->next = node2;
868 } else
869 node1 = node1->next;
870 }
871 }
872
873 node1 = *head;
874
875 while (node1 && node1->next) {
876 if ((node1->base + node1->length) == node1->next->base) {
877
878 dbg("8..\n");
879 node1->length += node1->next->length;
880 node2 = node1->next;
881 node1->next = node1->next->next;
882 kfree(node2);
883 } else
884 node1 = node1->next;
885 }
886
887 return 0;
888}
889
890
891irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data)
892{
893 struct controller *ctrl = data;
894 u8 schedule_flag = 0;
895 u8 reset;
896 u16 misc;
897 u32 Diff;
898 u32 temp_dword;
899
900
901 misc = readw(ctrl->hpc_reg + MISC);
902
903
904
905 if (!(misc & 0x000C)) {
906 return IRQ_NONE;
907 }
908
909 if (misc & 0x0004) {
910
911
912
913
914
915 misc |= 0x0004;
916 writew(misc, ctrl->hpc_reg + MISC);
917
918
919 misc = readw(ctrl->hpc_reg + MISC);
920
921 dbg ("%s - waking up\n", __func__);
922 wake_up_interruptible(&ctrl->queue);
923 }
924
925 if (misc & 0x0008) {
926
927 Diff = readl(ctrl->hpc_reg + INT_INPUT_CLEAR) ^ ctrl->ctrl_int_comp;
928
929 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
930
931
932 writel(Diff, ctrl->hpc_reg + INT_INPUT_CLEAR);
933
934
935 temp_dword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
936
937 if (!Diff)
938
939 writel(0xFFFFFFFF, ctrl->hpc_reg + INT_INPUT_CLEAR);
940
941 schedule_flag += handle_switch_change((u8)(Diff & 0xFFL), ctrl);
942 schedule_flag += handle_presence_change((u16)((Diff & 0xFFFF0000L) >> 16), ctrl);
943 schedule_flag += handle_power_fault((u8)((Diff & 0xFF00L) >> 8), ctrl);
944 }
945
946 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
947 if (reset & 0x40) {
948
949 reset &= 0xCF;
950 writeb(reset, ctrl->hpc_reg + RESET_FREQ_MODE);
951 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
952 wake_up_interruptible(&ctrl->queue);
953 }
954
955 if (schedule_flag) {
956 wake_up_process(cpqhp_event_thread);
957 dbg("Waking even thread");
958 }
959 return IRQ_HANDLED;
960}
961
962
963
964
965
966
967
968
969struct pci_func *cpqhp_slot_create(u8 busnumber)
970{
971 struct pci_func *new_slot;
972 struct pci_func *next;
973
974 new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL);
975 if (new_slot == NULL)
976 return new_slot;
977
978 new_slot->next = NULL;
979 new_slot->configured = 1;
980
981 if (cpqhp_slot_list[busnumber] == NULL) {
982 cpqhp_slot_list[busnumber] = new_slot;
983 } else {
984 next = cpqhp_slot_list[busnumber];
985 while (next->next != NULL)
986 next = next->next;
987 next->next = new_slot;
988 }
989 return new_slot;
990}
991
992
993
994
995
996
997
998
999static int slot_remove(struct pci_func * old_slot)
1000{
1001 struct pci_func *next;
1002
1003 if (old_slot == NULL)
1004 return 1;
1005
1006 next = cpqhp_slot_list[old_slot->bus];
1007 if (next == NULL)
1008 return 1;
1009
1010 if (next == old_slot) {
1011 cpqhp_slot_list[old_slot->bus] = old_slot->next;
1012 cpqhp_destroy_board_resources(old_slot);
1013 kfree(old_slot);
1014 return 0;
1015 }
1016
1017 while ((next->next != old_slot) && (next->next != NULL))
1018 next = next->next;
1019
1020 if (next->next == old_slot) {
1021 next->next = old_slot->next;
1022 cpqhp_destroy_board_resources(old_slot);
1023 kfree(old_slot);
1024 return 0;
1025 } else
1026 return 2;
1027}
1028
1029
1030
1031
1032
1033
1034
1035
1036static int bridge_slot_remove(struct pci_func *bridge)
1037{
1038 u8 subordinateBus, secondaryBus;
1039 u8 tempBus;
1040 struct pci_func *next;
1041
1042 secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
1043 subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
1044
1045 for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
1046 next = cpqhp_slot_list[tempBus];
1047
1048 while (!slot_remove(next))
1049 next = cpqhp_slot_list[tempBus];
1050 }
1051
1052 next = cpqhp_slot_list[bridge->bus];
1053
1054 if (next == NULL)
1055 return 1;
1056
1057 if (next == bridge) {
1058 cpqhp_slot_list[bridge->bus] = bridge->next;
1059 goto out;
1060 }
1061
1062 while ((next->next != bridge) && (next->next != NULL))
1063 next = next->next;
1064
1065 if (next->next != bridge)
1066 return 2;
1067 next->next = bridge->next;
1068out:
1069 kfree(bridge);
1070 return 0;
1071}
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082struct pci_func *cpqhp_slot_find(u8 bus, u8 device, u8 index)
1083{
1084 int found = -1;
1085 struct pci_func *func;
1086
1087 func = cpqhp_slot_list[bus];
1088
1089 if ((func == NULL) || ((func->device == device) && (index == 0)))
1090 return func;
1091
1092 if (func->device == device)
1093 found++;
1094
1095 while (func->next != NULL) {
1096 func = func->next;
1097
1098 if (func->device == device)
1099 found++;
1100
1101 if (found == index)
1102 return func;
1103 }
1104
1105 return NULL;
1106}
1107
1108
1109
1110
1111static int is_bridge(struct pci_func * func)
1112{
1113
1114 if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1115 return 1;
1116 else
1117 return 0;
1118}
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_slot)
1131{
1132 struct slot *slot;
1133 struct pci_bus *bus = ctrl->pci_bus;
1134 u8 reg;
1135 u8 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
1136 u16 reg16;
1137 u32 leds = readl(ctrl->hpc_reg + LED_CONTROL);
1138
1139 if (bus->cur_bus_speed == adapter_speed)
1140 return 0;
1141
1142
1143
1144
1145 for(slot = ctrl->slot; slot; slot = slot->next) {
1146 if (slot->device == (hp_slot + ctrl->slot_device_offset))
1147 continue;
1148 if (!slot->hotplug_slot || !slot->hotplug_slot->info)
1149 continue;
1150 if (slot->hotplug_slot->info->adapter_status == 0)
1151 continue;
1152
1153
1154
1155
1156 if (bus->cur_bus_speed < adapter_speed)
1157 return 0;
1158
1159 return 1;
1160 }
1161
1162
1163
1164
1165 if ((bus->cur_bus_speed > adapter_speed) && (!ctrl->pcix_speed_capability))
1166 return 1;
1167
1168
1169 if ((bus->cur_bus_speed < adapter_speed) && (!ctrl->pcix_speed_capability))
1170 return 0;
1171
1172
1173
1174
1175 if (bus->max_bus_speed < adapter_speed) {
1176 if (bus->cur_bus_speed == bus->max_bus_speed)
1177 return 0;
1178 adapter_speed = bus->max_bus_speed;
1179 }
1180
1181 writel(0x0L, ctrl->hpc_reg + LED_CONTROL);
1182 writeb(0x00, ctrl->hpc_reg + SLOT_ENABLE);
1183
1184 set_SOGO(ctrl);
1185 wait_for_ctrl_irq(ctrl);
1186
1187 if (adapter_speed != PCI_SPEED_133MHz_PCIX)
1188 reg = 0xF5;
1189 else
1190 reg = 0xF4;
1191 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1192
1193 reg16 = readw(ctrl->hpc_reg + NEXT_CURR_FREQ);
1194 reg16 &= ~0x000F;
1195 switch(adapter_speed) {
1196 case(PCI_SPEED_133MHz_PCIX):
1197 reg = 0x75;
1198 reg16 |= 0xB;
1199 break;
1200 case(PCI_SPEED_100MHz_PCIX):
1201 reg = 0x74;
1202 reg16 |= 0xA;
1203 break;
1204 case(PCI_SPEED_66MHz_PCIX):
1205 reg = 0x73;
1206 reg16 |= 0x9;
1207 break;
1208 case(PCI_SPEED_66MHz):
1209 reg = 0x73;
1210 reg16 |= 0x1;
1211 break;
1212 default:
1213 reg = 0x71;
1214 break;
1215
1216 }
1217 reg16 |= 0xB << 12;
1218 writew(reg16, ctrl->hpc_reg + NEXT_CURR_FREQ);
1219
1220 mdelay(5);
1221
1222
1223 writel(0, ctrl->hpc_reg + INT_MASK);
1224
1225 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1226
1227
1228 reg = ~0xF;
1229 pci_read_config_byte(ctrl->pci_dev, 0x43, ®);
1230 pci_write_config_byte(ctrl->pci_dev, 0x43, reg);
1231
1232
1233 if (((bus->cur_bus_speed == PCI_SPEED_66MHz) && (adapter_speed == PCI_SPEED_66MHz_PCIX)) ||
1234 ((bus->cur_bus_speed == PCI_SPEED_66MHz_PCIX) && (adapter_speed == PCI_SPEED_66MHz)))
1235 set_SOGO(ctrl);
1236
1237 wait_for_ctrl_irq(ctrl);
1238 mdelay(1100);
1239
1240
1241 writel(leds, ctrl->hpc_reg + LED_CONTROL);
1242 writeb(slot_power, ctrl->hpc_reg + SLOT_ENABLE);
1243
1244 set_SOGO(ctrl);
1245 wait_for_ctrl_irq(ctrl);
1246
1247 bus->cur_bus_speed = adapter_speed;
1248 slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1249
1250 info("Successfully changed frequency/mode for adapter in slot %d\n",
1251 slot->number);
1252 return 0;
1253}
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
1272{
1273 struct pci_bus *bus = ctrl->pci_bus;
1274 u8 hp_slot;
1275 u8 temp_byte;
1276 u8 adapter_speed;
1277 u32 rc = 0;
1278
1279 hp_slot = func->device - ctrl->slot_device_offset;
1280
1281
1282
1283
1284 if (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot))
1285 rc = INTERLOCK_OPEN;
1286
1287
1288
1289 else if (is_slot_enabled (ctrl, hp_slot))
1290 rc = CARD_FUNCTIONING;
1291 else {
1292 mutex_lock(&ctrl->crit_sect);
1293
1294
1295 enable_slot_power (ctrl, hp_slot);
1296
1297 set_SOGO(ctrl);
1298
1299
1300 wait_for_ctrl_irq (ctrl);
1301
1302
1303
1304 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1305 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1306 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1307
1308 set_SOGO(ctrl);
1309
1310
1311 wait_for_ctrl_irq (ctrl);
1312
1313 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1314 if (bus->cur_bus_speed != adapter_speed)
1315 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1316 rc = WRONG_BUS_FREQUENCY;
1317
1318
1319 disable_slot_power (ctrl, hp_slot);
1320
1321 set_SOGO(ctrl);
1322
1323
1324 wait_for_ctrl_irq (ctrl);
1325
1326 mutex_unlock(&ctrl->crit_sect);
1327
1328 if (rc)
1329 return rc;
1330
1331 mutex_lock(&ctrl->crit_sect);
1332
1333 slot_enable (ctrl, hp_slot);
1334 green_LED_blink (ctrl, hp_slot);
1335
1336 amber_LED_off (ctrl, hp_slot);
1337
1338 set_SOGO(ctrl);
1339
1340
1341 wait_for_ctrl_irq (ctrl);
1342
1343 mutex_unlock(&ctrl->crit_sect);
1344
1345
1346 long_delay(1*HZ);
1347
1348
1349 if (func->status == 0xFF) {
1350
1351 rc = POWER_FAILURE;
1352 func->status = 0;
1353 } else
1354 rc = cpqhp_valid_replace(ctrl, func);
1355
1356 if (!rc) {
1357
1358
1359 rc = cpqhp_configure_board(ctrl, func);
1360
1361
1362
1363
1364
1365
1366
1367
1368 mutex_lock(&ctrl->crit_sect);
1369
1370 amber_LED_on (ctrl, hp_slot);
1371 green_LED_off (ctrl, hp_slot);
1372 slot_disable (ctrl, hp_slot);
1373
1374 set_SOGO(ctrl);
1375
1376
1377 wait_for_ctrl_irq (ctrl);
1378
1379 mutex_unlock(&ctrl->crit_sect);
1380
1381 if (rc)
1382 return rc;
1383 else
1384 return 1;
1385
1386 } else {
1387
1388
1389
1390
1391
1392
1393
1394 mutex_lock(&ctrl->crit_sect);
1395
1396 amber_LED_on (ctrl, hp_slot);
1397 green_LED_off (ctrl, hp_slot);
1398 slot_disable (ctrl, hp_slot);
1399
1400 set_SOGO(ctrl);
1401
1402
1403 wait_for_ctrl_irq (ctrl);
1404
1405 mutex_unlock(&ctrl->crit_sect);
1406 }
1407
1408 }
1409 return rc;
1410
1411}
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422static u32 board_added(struct pci_func *func, struct controller *ctrl)
1423{
1424 u8 hp_slot;
1425 u8 temp_byte;
1426 u8 adapter_speed;
1427 int index;
1428 u32 temp_register = 0xFFFFFFFF;
1429 u32 rc = 0;
1430 struct pci_func *new_slot = NULL;
1431 struct pci_bus *bus = ctrl->pci_bus;
1432 struct slot *p_slot;
1433 struct resource_lists res_lists;
1434
1435 hp_slot = func->device - ctrl->slot_device_offset;
1436 dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n",
1437 __func__, func->device, ctrl->slot_device_offset, hp_slot);
1438
1439 mutex_lock(&ctrl->crit_sect);
1440
1441
1442 enable_slot_power(ctrl, hp_slot);
1443
1444 set_SOGO(ctrl);
1445
1446
1447 wait_for_ctrl_irq (ctrl);
1448
1449
1450
1451
1452 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1453 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1454 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1455
1456 set_SOGO(ctrl);
1457
1458
1459 wait_for_ctrl_irq (ctrl);
1460
1461 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1462 if (bus->cur_bus_speed != adapter_speed)
1463 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1464 rc = WRONG_BUS_FREQUENCY;
1465
1466
1467 disable_slot_power (ctrl, hp_slot);
1468
1469 set_SOGO(ctrl);
1470
1471
1472 wait_for_ctrl_irq(ctrl);
1473
1474 mutex_unlock(&ctrl->crit_sect);
1475
1476 if (rc)
1477 return rc;
1478
1479 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1480
1481
1482
1483 dbg("%s: before down\n", __func__);
1484 mutex_lock(&ctrl->crit_sect);
1485 dbg("%s: after down\n", __func__);
1486
1487 dbg("%s: before slot_enable\n", __func__);
1488 slot_enable (ctrl, hp_slot);
1489
1490 dbg("%s: before green_LED_blink\n", __func__);
1491 green_LED_blink (ctrl, hp_slot);
1492
1493 dbg("%s: before amber_LED_blink\n", __func__);
1494 amber_LED_off (ctrl, hp_slot);
1495
1496 dbg("%s: before set_SOGO\n", __func__);
1497 set_SOGO(ctrl);
1498
1499
1500 dbg("%s: before wait_for_ctrl_irq\n", __func__);
1501 wait_for_ctrl_irq (ctrl);
1502 dbg("%s: after wait_for_ctrl_irq\n", __func__);
1503
1504 dbg("%s: before up\n", __func__);
1505 mutex_unlock(&ctrl->crit_sect);
1506 dbg("%s: after up\n", __func__);
1507
1508
1509 dbg("%s: before long_delay\n", __func__);
1510 long_delay(1*HZ);
1511 dbg("%s: after long_delay\n", __func__);
1512
1513 dbg("%s: func status = %x\n", __func__, func->status);
1514
1515 if (func->status == 0xFF) {
1516
1517 temp_register = 0xFFFFFFFF;
1518 dbg("%s: temp register set to %x by power fault\n", __func__, temp_register);
1519 rc = POWER_FAILURE;
1520 func->status = 0;
1521 } else {
1522
1523 ctrl->pci_bus->number = func->bus;
1524 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(func->device, func->function), PCI_VENDOR_ID, &temp_register);
1525 dbg("%s: pci_read_config_dword returns %d\n", __func__, rc);
1526 dbg("%s: temp_register is %x\n", __func__, temp_register);
1527
1528 if (rc != 0) {
1529
1530 temp_register = 0xFFFFFFFF;
1531 dbg("%s: temp register set to %x by error\n", __func__, temp_register);
1532 }
1533
1534 rc = NO_ADAPTER_PRESENT;
1535 }
1536
1537
1538 if (temp_register != 0xFFFFFFFF) {
1539 res_lists.io_head = ctrl->io_head;
1540 res_lists.mem_head = ctrl->mem_head;
1541 res_lists.p_mem_head = ctrl->p_mem_head;
1542 res_lists.bus_head = ctrl->bus_head;
1543 res_lists.irqs = NULL;
1544
1545 rc = configure_new_device(ctrl, func, 0, &res_lists);
1546
1547 dbg("%s: back from configure_new_device\n", __func__);
1548 ctrl->io_head = res_lists.io_head;
1549 ctrl->mem_head = res_lists.mem_head;
1550 ctrl->p_mem_head = res_lists.p_mem_head;
1551 ctrl->bus_head = res_lists.bus_head;
1552
1553 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1554 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1555 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1556 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1557
1558 if (rc) {
1559 mutex_lock(&ctrl->crit_sect);
1560
1561 amber_LED_on (ctrl, hp_slot);
1562 green_LED_off (ctrl, hp_slot);
1563 slot_disable (ctrl, hp_slot);
1564
1565 set_SOGO(ctrl);
1566
1567
1568 wait_for_ctrl_irq (ctrl);
1569
1570 mutex_unlock(&ctrl->crit_sect);
1571 return rc;
1572 } else {
1573 cpqhp_save_slot_config(ctrl, func);
1574 }
1575
1576
1577 func->status = 0;
1578 func->switch_save = 0x10;
1579 func->is_a_board = 0x01;
1580
1581
1582
1583 dbg("%s: configure linux pci_dev structure\n", __func__);
1584 index = 0;
1585 do {
1586 new_slot = cpqhp_slot_find(ctrl->bus, func->device, index++);
1587 if (new_slot && !new_slot->pci_dev)
1588 cpqhp_configure_device(ctrl, new_slot);
1589 } while (new_slot);
1590
1591 mutex_lock(&ctrl->crit_sect);
1592
1593 green_LED_on (ctrl, hp_slot);
1594
1595 set_SOGO(ctrl);
1596
1597
1598 wait_for_ctrl_irq (ctrl);
1599
1600 mutex_unlock(&ctrl->crit_sect);
1601 } else {
1602 mutex_lock(&ctrl->crit_sect);
1603
1604 amber_LED_on (ctrl, hp_slot);
1605 green_LED_off (ctrl, hp_slot);
1606 slot_disable (ctrl, hp_slot);
1607
1608 set_SOGO(ctrl);
1609
1610
1611 wait_for_ctrl_irq (ctrl);
1612
1613 mutex_unlock(&ctrl->crit_sect);
1614
1615 return rc;
1616 }
1617 return 0;
1618}
1619
1620
1621
1622
1623
1624
1625
1626
1627static u32 remove_board(struct pci_func * func, u32 replace_flag, struct controller * ctrl)
1628{
1629 int index;
1630 u8 skip = 0;
1631 u8 device;
1632 u8 hp_slot;
1633 u8 temp_byte;
1634 u32 rc;
1635 struct resource_lists res_lists;
1636 struct pci_func *temp_func;
1637
1638 if (cpqhp_unconfigure_device(func))
1639 return 1;
1640
1641 device = func->device;
1642
1643 hp_slot = func->device - ctrl->slot_device_offset;
1644 dbg("In %s, hp_slot = %d\n", __func__, hp_slot);
1645
1646
1647
1648 if (replace_flag || !ctrl->add_support)
1649 rc = cpqhp_save_base_addr_length(ctrl, func);
1650 else if (!func->bus_head && !func->mem_head &&
1651 !func->p_mem_head && !func->io_head) {
1652
1653
1654
1655 index = 0;
1656 temp_func = cpqhp_slot_find(func->bus, func->device, index++);
1657 while (temp_func) {
1658 if (temp_func->bus_head || temp_func->mem_head
1659 || temp_func->p_mem_head || temp_func->io_head) {
1660 skip = 1;
1661 break;
1662 }
1663 temp_func = cpqhp_slot_find(temp_func->bus, temp_func->device, index++);
1664 }
1665
1666 if (!skip)
1667 rc = cpqhp_save_used_resources(ctrl, func);
1668 }
1669
1670 if (func->is_a_board)
1671 func->status = 0x01;
1672 func->configured = 0;
1673
1674 mutex_lock(&ctrl->crit_sect);
1675
1676 green_LED_off (ctrl, hp_slot);
1677 slot_disable (ctrl, hp_slot);
1678
1679 set_SOGO(ctrl);
1680
1681
1682 temp_byte = readb(ctrl->hpc_reg + SLOT_SERR);
1683 temp_byte &= ~(0x01 << hp_slot);
1684 writeb(temp_byte, ctrl->hpc_reg + SLOT_SERR);
1685
1686
1687 wait_for_ctrl_irq (ctrl);
1688
1689 mutex_unlock(&ctrl->crit_sect);
1690
1691 if (!replace_flag && ctrl->add_support) {
1692 while (func) {
1693 res_lists.io_head = ctrl->io_head;
1694 res_lists.mem_head = ctrl->mem_head;
1695 res_lists.p_mem_head = ctrl->p_mem_head;
1696 res_lists.bus_head = ctrl->bus_head;
1697
1698 cpqhp_return_board_resources(func, &res_lists);
1699
1700 ctrl->io_head = res_lists.io_head;
1701 ctrl->mem_head = res_lists.mem_head;
1702 ctrl->p_mem_head = res_lists.p_mem_head;
1703 ctrl->bus_head = res_lists.bus_head;
1704
1705 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1706 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1707 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1708 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1709
1710 if (is_bridge(func)) {
1711 bridge_slot_remove(func);
1712 } else
1713 slot_remove(func);
1714
1715 func = cpqhp_slot_find(ctrl->bus, device, 0);
1716 }
1717
1718
1719 func = cpqhp_slot_create(ctrl->bus);
1720
1721 if (func == NULL)
1722 return 1;
1723
1724 func->bus = ctrl->bus;
1725 func->device = device;
1726 func->function = 0;
1727 func->configured = 0;
1728 func->switch_save = 0x10;
1729 func->is_a_board = 0;
1730 func->p_task_event = NULL;
1731 }
1732
1733 return 0;
1734}
1735
1736static void pushbutton_helper_thread(unsigned long data)
1737{
1738 pushbutton_pending = data;
1739 wake_up_process(cpqhp_event_thread);
1740}
1741
1742
1743
1744static int event_thread(void* data)
1745{
1746 struct controller *ctrl;
1747
1748 while (1) {
1749 dbg("!!!!event_thread sleeping\n");
1750 set_current_state(TASK_INTERRUPTIBLE);
1751 schedule();
1752
1753 if (kthread_should_stop())
1754 break;
1755
1756 if (pushbutton_pending)
1757 cpqhp_pushbutton_thread(pushbutton_pending);
1758 else
1759 for (ctrl = cpqhp_ctrl_list; ctrl; ctrl=ctrl->next)
1760 interrupt_event_handler(ctrl);
1761 }
1762 dbg("event_thread signals exit\n");
1763 return 0;
1764}
1765
1766int cpqhp_event_start_thread(void)
1767{
1768 cpqhp_event_thread = kthread_run(event_thread, NULL, "phpd_event");
1769 if (IS_ERR(cpqhp_event_thread)) {
1770 err ("Can't start up our event thread\n");
1771 return PTR_ERR(cpqhp_event_thread);
1772 }
1773
1774 return 0;
1775}
1776
1777
1778void cpqhp_event_stop_thread(void)
1779{
1780 kthread_stop(cpqhp_event_thread);
1781}
1782
1783
1784static int update_slot_info(struct controller *ctrl, struct slot *slot)
1785{
1786 struct hotplug_slot_info *info;
1787 int result;
1788
1789 info = kmalloc(sizeof(*info), GFP_KERNEL);
1790 if (!info)
1791 return -ENOMEM;
1792
1793 info->power_status = get_slot_enabled(ctrl, slot);
1794 info->attention_status = cpq_get_attention_status(ctrl, slot);
1795 info->latch_status = cpq_get_latch_status(ctrl, slot);
1796 info->adapter_status = get_presence_status(ctrl, slot);
1797 result = pci_hp_change_slot_info(slot->hotplug_slot, info);
1798 kfree (info);
1799 return result;
1800}
1801
1802static void interrupt_event_handler(struct controller *ctrl)
1803{
1804 int loop = 0;
1805 int change = 1;
1806 struct pci_func *func;
1807 u8 hp_slot;
1808 struct slot *p_slot;
1809
1810 while (change) {
1811 change = 0;
1812
1813 for (loop = 0; loop < 10; loop++) {
1814
1815 if (ctrl->event_queue[loop].event_type != 0) {
1816 hp_slot = ctrl->event_queue[loop].hp_slot;
1817
1818 func = cpqhp_slot_find(ctrl->bus, (hp_slot + ctrl->slot_device_offset), 0);
1819 if (!func)
1820 return;
1821
1822 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1823 if (!p_slot)
1824 return;
1825
1826 dbg("hp_slot %d, func %p, p_slot %p\n",
1827 hp_slot, func, p_slot);
1828
1829 if (ctrl->event_queue[loop].event_type == INT_BUTTON_PRESS) {
1830 dbg("button pressed\n");
1831 } else if (ctrl->event_queue[loop].event_type ==
1832 INT_BUTTON_CANCEL) {
1833 dbg("button cancel\n");
1834 del_timer(&p_slot->task_event);
1835
1836 mutex_lock(&ctrl->crit_sect);
1837
1838 if (p_slot->state == BLINKINGOFF_STATE) {
1839
1840 dbg("turn on green LED\n");
1841 green_LED_on (ctrl, hp_slot);
1842 } else if (p_slot->state == BLINKINGON_STATE) {
1843
1844 dbg("turn off green LED\n");
1845 green_LED_off (ctrl, hp_slot);
1846 }
1847
1848 info(msg_button_cancel, p_slot->number);
1849
1850 p_slot->state = STATIC_STATE;
1851
1852 amber_LED_off (ctrl, hp_slot);
1853
1854 set_SOGO(ctrl);
1855
1856
1857 wait_for_ctrl_irq (ctrl);
1858
1859 mutex_unlock(&ctrl->crit_sect);
1860 }
1861
1862 else if (ctrl->event_queue[loop].event_type == INT_BUTTON_RELEASE) {
1863 dbg("button release\n");
1864
1865 if (is_slot_enabled (ctrl, hp_slot)) {
1866 dbg("slot is on\n");
1867 p_slot->state = BLINKINGOFF_STATE;
1868 info(msg_button_off, p_slot->number);
1869 } else {
1870 dbg("slot is off\n");
1871 p_slot->state = BLINKINGON_STATE;
1872 info(msg_button_on, p_slot->number);
1873 }
1874 mutex_lock(&ctrl->crit_sect);
1875
1876 dbg("blink green LED and turn off amber\n");
1877
1878 amber_LED_off (ctrl, hp_slot);
1879 green_LED_blink (ctrl, hp_slot);
1880
1881 set_SOGO(ctrl);
1882
1883
1884 wait_for_ctrl_irq (ctrl);
1885
1886 mutex_unlock(&ctrl->crit_sect);
1887 init_timer(&p_slot->task_event);
1888 p_slot->hp_slot = hp_slot;
1889 p_slot->ctrl = ctrl;
1890
1891 p_slot->task_event.expires = jiffies + 5 * HZ;
1892 p_slot->task_event.function = pushbutton_helper_thread;
1893 p_slot->task_event.data = (u32) p_slot;
1894
1895 dbg("add_timer p_slot = %p\n", p_slot);
1896 add_timer(&p_slot->task_event);
1897 }
1898
1899 else if (ctrl->event_queue[loop].event_type == INT_POWER_FAULT) {
1900 dbg("power fault\n");
1901 } else {
1902
1903 update_slot_info(ctrl, p_slot);
1904 }
1905
1906 ctrl->event_queue[loop].event_type = 0;
1907
1908 change = 1;
1909 }
1910 }
1911 }
1912
1913 return;
1914}
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924void cpqhp_pushbutton_thread(unsigned long slot)
1925{
1926 u8 hp_slot;
1927 u8 device;
1928 struct pci_func *func;
1929 struct slot *p_slot = (struct slot *) slot;
1930 struct controller *ctrl = (struct controller *) p_slot->ctrl;
1931
1932 pushbutton_pending = 0;
1933 hp_slot = p_slot->hp_slot;
1934
1935 device = p_slot->device;
1936
1937 if (is_slot_enabled(ctrl, hp_slot)) {
1938 p_slot->state = POWEROFF_STATE;
1939
1940 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1941 dbg("In power_down_board, func = %p, ctrl = %p\n", func, ctrl);
1942 if (!func) {
1943 dbg("Error! func NULL in %s\n", __func__);
1944 return ;
1945 }
1946
1947 if (cpqhp_process_SS(ctrl, func) != 0) {
1948 amber_LED_on(ctrl, hp_slot);
1949 green_LED_on(ctrl, hp_slot);
1950
1951 set_SOGO(ctrl);
1952
1953
1954 wait_for_ctrl_irq(ctrl);
1955 }
1956
1957 p_slot->state = STATIC_STATE;
1958 } else {
1959 p_slot->state = POWERON_STATE;
1960
1961
1962 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1963 dbg("In add_board, func = %p, ctrl = %p\n", func, ctrl);
1964 if (!func) {
1965 dbg("Error! func NULL in %s\n", __func__);
1966 return ;
1967 }
1968
1969 if (ctrl != NULL) {
1970 if (cpqhp_process_SI(ctrl, func) != 0) {
1971 amber_LED_on(ctrl, hp_slot);
1972 green_LED_off(ctrl, hp_slot);
1973
1974 set_SOGO(ctrl);
1975
1976
1977 wait_for_ctrl_irq (ctrl);
1978 }
1979 }
1980
1981 p_slot->state = STATIC_STATE;
1982 }
1983
1984 return;
1985}
1986
1987
1988int cpqhp_process_SI(struct controller *ctrl, struct pci_func *func)
1989{
1990 u8 device, hp_slot;
1991 u16 temp_word;
1992 u32 tempdword;
1993 int rc;
1994 struct slot* p_slot;
1995 int physical_slot = 0;
1996
1997 tempdword = 0;
1998
1999 device = func->device;
2000 hp_slot = device - ctrl->slot_device_offset;
2001 p_slot = cpqhp_find_slot(ctrl, device);
2002 if (p_slot)
2003 physical_slot = p_slot->number;
2004
2005
2006 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
2007
2008 if (tempdword & (0x01 << hp_slot)) {
2009 return 1;
2010 }
2011
2012 if (func->is_a_board) {
2013 rc = board_replaced(func, ctrl);
2014 } else {
2015
2016 slot_remove(func);
2017
2018 func = cpqhp_slot_create(ctrl->bus);
2019 if (func == NULL)
2020 return 1;
2021
2022 func->bus = ctrl->bus;
2023 func->device = device;
2024 func->function = 0;
2025 func->configured = 0;
2026 func->is_a_board = 1;
2027
2028
2029 temp_word = ctrl->ctrl_int_comp >> 16;
2030 func->presence_save = (temp_word >> hp_slot) & 0x01;
2031 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
2032
2033 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
2034 func->switch_save = 0;
2035 } else {
2036 func->switch_save = 0x10;
2037 }
2038
2039 rc = board_added(func, ctrl);
2040 if (rc) {
2041 if (is_bridge(func)) {
2042 bridge_slot_remove(func);
2043 } else
2044 slot_remove(func);
2045
2046
2047 func = cpqhp_slot_create(ctrl->bus);
2048
2049 if (func == NULL)
2050 return 1;
2051
2052 func->bus = ctrl->bus;
2053 func->device = device;
2054 func->function = 0;
2055 func->configured = 0;
2056 func->is_a_board = 0;
2057
2058
2059 temp_word = ctrl->ctrl_int_comp >> 16;
2060 func->presence_save = (temp_word >> hp_slot) & 0x01;
2061 func->presence_save |=
2062 (temp_word >> (hp_slot + 7)) & 0x02;
2063
2064 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
2065 func->switch_save = 0;
2066 } else {
2067 func->switch_save = 0x10;
2068 }
2069 }
2070 }
2071
2072 if (rc) {
2073 dbg("%s: rc = %d\n", __func__, rc);
2074 }
2075
2076 if (p_slot)
2077 update_slot_info(ctrl, p_slot);
2078
2079 return rc;
2080}
2081
2082
2083int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func)
2084{
2085 u8 device, class_code, header_type, BCR;
2086 u8 index = 0;
2087 u8 replace_flag;
2088 u32 rc = 0;
2089 unsigned int devfn;
2090 struct slot* p_slot;
2091 struct pci_bus *pci_bus = ctrl->pci_bus;
2092 int physical_slot=0;
2093
2094 device = func->device;
2095 func = cpqhp_slot_find(ctrl->bus, device, index++);
2096 p_slot = cpqhp_find_slot(ctrl, device);
2097 if (p_slot) {
2098 physical_slot = p_slot->number;
2099 }
2100
2101
2102 while (func && !rc) {
2103 pci_bus->number = func->bus;
2104 devfn = PCI_DEVFN(func->device, func->function);
2105
2106
2107 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2108 if (rc)
2109 return rc;
2110
2111 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2112
2113 rc = REMOVE_NOT_SUPPORTED;
2114 } else {
2115
2116 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
2117 if (rc)
2118 return rc;
2119
2120
2121 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2122 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
2123 if (rc)
2124 return rc;
2125
2126
2127
2128 if (BCR & PCI_BRIDGE_CTL_VGA)
2129 rc = REMOVE_NOT_SUPPORTED;
2130 }
2131 }
2132
2133 func = cpqhp_slot_find(ctrl->bus, device, index++);
2134 }
2135
2136 func = cpqhp_slot_find(ctrl->bus, device, 0);
2137 if ((func != NULL) && !rc) {
2138
2139 replace_flag = !(ctrl->add_support);
2140 rc = remove_board(func, replace_flag, ctrl);
2141 } else if (!rc) {
2142 rc = 1;
2143 }
2144
2145 if (p_slot)
2146 update_slot_info(ctrl, p_slot);
2147
2148 return rc;
2149}
2150
2151
2152
2153
2154
2155
2156
2157
2158static void switch_leds(struct controller *ctrl, const int num_of_slots,
2159 u32 *work_LED, const int direction)
2160{
2161 int loop;
2162
2163 for (loop = 0; loop < num_of_slots; loop++) {
2164 if (direction)
2165 *work_LED = *work_LED >> 1;
2166 else
2167 *work_LED = *work_LED << 1;
2168 writel(*work_LED, ctrl->hpc_reg + LED_CONTROL);
2169
2170 set_SOGO(ctrl);
2171
2172
2173 wait_for_ctrl_irq(ctrl);
2174
2175
2176 long_delay((2*HZ)/10);
2177 }
2178}
2179
2180
2181
2182
2183
2184
2185
2186
2187int cpqhp_hardware_test(struct controller *ctrl, int test_num)
2188{
2189 u32 save_LED;
2190 u32 work_LED;
2191 int loop;
2192 int num_of_slots;
2193
2194 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0f;
2195
2196 switch (test_num) {
2197 case 1:
2198
2199
2200
2201
2202 save_LED = readl(ctrl->hpc_reg + LED_CONTROL);
2203 work_LED = 0x01010101;
2204 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2205 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2206 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2207 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2208
2209 work_LED = 0x01010000;
2210 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2211 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2212 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2213 work_LED = 0x00000101;
2214 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2215 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2216 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2217
2218 work_LED = 0x01010000;
2219 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2220 for (loop = 0; loop < num_of_slots; loop++) {
2221 set_SOGO(ctrl);
2222
2223
2224 wait_for_ctrl_irq (ctrl);
2225
2226
2227 long_delay((3*HZ)/10);
2228 work_LED = work_LED >> 16;
2229 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2230
2231 set_SOGO(ctrl);
2232
2233
2234 wait_for_ctrl_irq (ctrl);
2235
2236
2237 long_delay((3*HZ)/10);
2238 work_LED = work_LED << 16;
2239 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2240 work_LED = work_LED << 1;
2241 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2242 }
2243
2244
2245 writel(save_LED, ctrl->hpc_reg + LED_CONTROL);
2246
2247 set_SOGO(ctrl);
2248
2249
2250 wait_for_ctrl_irq (ctrl);
2251 break;
2252 case 2:
2253
2254 break;
2255 case 3:
2256
2257 break;
2258 }
2259 return 0;
2260}
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272static u32 configure_new_device(struct controller * ctrl, struct pci_func * func,
2273 u8 behind_bridge, struct resource_lists * resources)
2274{
2275 u8 temp_byte, function, max_functions, stop_it;
2276 int rc;
2277 u32 ID;
2278 struct pci_func *new_slot;
2279 int index;
2280
2281 new_slot = func;
2282
2283 dbg("%s\n", __func__);
2284
2285 ctrl->pci_bus->number = func->bus;
2286 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
2287 if (rc) {
2288 dbg("%s: rc = %d\n", __func__, rc);
2289 return rc;
2290 }
2291
2292 if (temp_byte & 0x80)
2293 max_functions = 8;
2294 else
2295 max_functions = 1;
2296
2297 function = 0;
2298
2299 do {
2300 rc = configure_new_function(ctrl, new_slot, behind_bridge, resources);
2301
2302 if (rc) {
2303 dbg("configure_new_function failed %d\n",rc);
2304 index = 0;
2305
2306 while (new_slot) {
2307 new_slot = cpqhp_slot_find(new_slot->bus, new_slot->device, index++);
2308
2309 if (new_slot)
2310 cpqhp_return_board_resources(new_slot, resources);
2311 }
2312
2313 return rc;
2314 }
2315
2316 function++;
2317
2318 stop_it = 0;
2319
2320
2321
2322
2323 while ((function < max_functions) && (!stop_it)) {
2324 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
2325
2326 if (ID == 0xFFFFFFFF) {
2327 function++;
2328 } else {
2329
2330 new_slot = cpqhp_slot_create(func->bus);
2331
2332 if (new_slot == NULL)
2333 return 1;
2334
2335 new_slot->bus = func->bus;
2336 new_slot->device = func->device;
2337 new_slot->function = function;
2338 new_slot->is_a_board = 1;
2339 new_slot->status = 0;
2340
2341 stop_it++;
2342 }
2343 }
2344
2345 } while (function < max_functions);
2346 dbg("returning from configure_new_device\n");
2347
2348 return 0;
2349}
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368static int configure_new_function(struct controller *ctrl, struct pci_func *func,
2369 u8 behind_bridge,
2370 struct resource_lists *resources)
2371{
2372 int cloop;
2373 u8 IRQ = 0;
2374 u8 temp_byte;
2375 u8 device;
2376 u8 class_code;
2377 u16 command;
2378 u16 temp_word;
2379 u32 temp_dword;
2380 u32 rc;
2381 u32 temp_register;
2382 u32 base;
2383 u32 ID;
2384 unsigned int devfn;
2385 struct pci_resource *mem_node;
2386 struct pci_resource *p_mem_node;
2387 struct pci_resource *io_node;
2388 struct pci_resource *bus_node;
2389 struct pci_resource *hold_mem_node;
2390 struct pci_resource *hold_p_mem_node;
2391 struct pci_resource *hold_IO_node;
2392 struct pci_resource *hold_bus_node;
2393 struct irq_mapping irqs;
2394 struct pci_func *new_slot;
2395 struct pci_bus *pci_bus;
2396 struct resource_lists temp_resources;
2397
2398 pci_bus = ctrl->pci_bus;
2399 pci_bus->number = func->bus;
2400 devfn = PCI_DEVFN(func->device, func->function);
2401
2402
2403 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2404 if (rc)
2405 return rc;
2406
2407 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2408
2409 dbg("set Primary bus = %d\n", func->bus);
2410 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
2411 if (rc)
2412 return rc;
2413
2414
2415 dbg("find ranges of buses to use\n");
2416 bus_node = get_max_resource(&(resources->bus_head), 1);
2417
2418
2419 if (!bus_node)
2420 return -ENOMEM;
2421
2422
2423 temp_byte = bus_node->base;
2424 dbg("set Secondary bus = %d\n", bus_node->base);
2425 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2426 if (rc)
2427 return rc;
2428
2429
2430 temp_byte = bus_node->base + bus_node->length - 1;
2431 dbg("set subordinate bus = %d\n", bus_node->base + bus_node->length - 1);
2432 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2433 if (rc)
2434 return rc;
2435
2436
2437 temp_byte = 0x40;
2438 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
2439 if (rc)
2440 return rc;
2441 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
2442 if (rc)
2443 return rc;
2444
2445
2446 temp_byte = 0x08;
2447 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
2448 if (rc)
2449 return rc;
2450
2451
2452 io_node = get_max_resource(&(resources->io_head), 0x1000);
2453 if (!io_node)
2454 return -ENOMEM;
2455 mem_node = get_max_resource(&(resources->mem_head), 0x100000);
2456 if (!mem_node)
2457 return -ENOMEM;
2458 p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000);
2459 if (!p_mem_node)
2460 return -ENOMEM;
2461 dbg("Setup the IO, memory, and prefetchable windows\n");
2462 dbg("io_node\n");
2463 dbg("(base, len, next) (%x, %x, %p)\n", io_node->base,
2464 io_node->length, io_node->next);
2465 dbg("mem_node\n");
2466 dbg("(base, len, next) (%x, %x, %p)\n", mem_node->base,
2467 mem_node->length, mem_node->next);
2468 dbg("p_mem_node\n");
2469 dbg("(base, len, next) (%x, %x, %p)\n", p_mem_node->base,
2470 p_mem_node->length, p_mem_node->next);
2471
2472
2473 if (!resources->irqs) {
2474 irqs.barber_pole = 0;
2475 irqs.interrupt[0] = 0;
2476 irqs.interrupt[1] = 0;
2477 irqs.interrupt[2] = 0;
2478 irqs.interrupt[3] = 0;
2479 irqs.valid_INT = 0;
2480 } else {
2481 irqs.barber_pole = resources->irqs->barber_pole;
2482 irqs.interrupt[0] = resources->irqs->interrupt[0];
2483 irqs.interrupt[1] = resources->irqs->interrupt[1];
2484 irqs.interrupt[2] = resources->irqs->interrupt[2];
2485 irqs.interrupt[3] = resources->irqs->interrupt[3];
2486 irqs.valid_INT = resources->irqs->valid_INT;
2487 }
2488
2489
2490
2491 temp_resources.bus_head = bus_node;
2492 temp_resources.io_head = io_node;
2493 temp_resources.mem_head = mem_node;
2494 temp_resources.p_mem_head = p_mem_node;
2495 temp_resources.irqs = &irqs;
2496
2497
2498
2499
2500 hold_bus_node = kmalloc(sizeof(*hold_bus_node), GFP_KERNEL);
2501 hold_IO_node = kmalloc(sizeof(*hold_IO_node), GFP_KERNEL);
2502 hold_mem_node = kmalloc(sizeof(*hold_mem_node), GFP_KERNEL);
2503 hold_p_mem_node = kmalloc(sizeof(*hold_p_mem_node), GFP_KERNEL);
2504
2505 if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2506 kfree(hold_bus_node);
2507 kfree(hold_IO_node);
2508 kfree(hold_mem_node);
2509 kfree(hold_p_mem_node);
2510
2511 return 1;
2512 }
2513
2514 memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2515
2516 bus_node->base += 1;
2517 bus_node->length -= 1;
2518 bus_node->next = NULL;
2519
2520
2521
2522 memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2523 io_node->next = NULL;
2524
2525
2526 temp_byte = io_node->base >> 8;
2527 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2528
2529 temp_byte = (io_node->base + io_node->length - 1) >> 8;
2530 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2531
2532
2533
2534
2535 memcpy(hold_mem_node, mem_node, sizeof(struct pci_resource));
2536 mem_node->next = NULL;
2537
2538
2539 temp_word = mem_node->base >> 16;
2540 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2541
2542 temp_word = (mem_node->base + mem_node->length - 1) >> 16;
2543 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2544
2545 memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource));
2546 p_mem_node->next = NULL;
2547
2548
2549 temp_word = p_mem_node->base >> 16;
2550 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2551
2552 temp_word = (p_mem_node->base + p_mem_node->length - 1) >> 16;
2553 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2554
2555
2556
2557 irqs.barber_pole--;
2558
2559 rc = 0;
2560
2561
2562 for (device = 0; (device <= 0x1F) && !rc; device++) {
2563 irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2564
2565 ID = 0xFFFFFFFF;
2566 pci_bus->number = hold_bus_node->base;
2567 pci_bus_read_config_dword (pci_bus, PCI_DEVFN(device, 0), 0x00, &ID);
2568 pci_bus->number = func->bus;
2569
2570 if (ID != 0xFFFFFFFF) {
2571
2572 new_slot = cpqhp_slot_create(hold_bus_node->base);
2573
2574 if (new_slot == NULL) {
2575 rc = -ENOMEM;
2576 continue;
2577 }
2578
2579 new_slot->bus = hold_bus_node->base;
2580 new_slot->device = device;
2581 new_slot->function = 0;
2582 new_slot->is_a_board = 1;
2583 new_slot->status = 0;
2584
2585 rc = configure_new_device(ctrl, new_slot, 1, &temp_resources);
2586 dbg("configure_new_device rc=0x%x\n",rc);
2587 }
2588 }
2589
2590 if (rc)
2591 goto free_and_out;
2592
2593 if (resources->irqs) {
2594 resources->irqs->interrupt[0] = irqs.interrupt[0];
2595 resources->irqs->interrupt[1] = irqs.interrupt[1];
2596 resources->irqs->interrupt[2] = irqs.interrupt[2];
2597 resources->irqs->interrupt[3] = irqs.interrupt[3];
2598 resources->irqs->valid_INT = irqs.valid_INT;
2599 } else if (!behind_bridge) {
2600
2601 for (cloop = 0; cloop < 4; cloop++) {
2602 if (irqs.valid_INT & (0x01 << cloop)) {
2603 rc = cpqhp_set_irq(func->bus, func->device,
2604 cloop + 1, irqs.interrupt[cloop]);
2605 if (rc)
2606 goto free_and_out;
2607 }
2608 }
2609 }
2610
2611
2612
2613 if (bus_node && temp_resources.bus_head) {
2614 hold_bus_node->length = bus_node->base - hold_bus_node->base;
2615
2616 hold_bus_node->next = func->bus_head;
2617 func->bus_head = hold_bus_node;
2618
2619 temp_byte = temp_resources.bus_head->base - 1;
2620
2621
2622 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2623
2624 if (temp_resources.bus_head->length == 0) {
2625 kfree(temp_resources.bus_head);
2626 temp_resources.bus_head = NULL;
2627 } else {
2628 return_resource(&(resources->bus_head), temp_resources.bus_head);
2629 }
2630 }
2631
2632
2633
2634 if (hold_IO_node && temp_resources.io_head) {
2635 io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2636 &hold_IO_node, 0x1000);
2637
2638
2639 if (io_node) {
2640 hold_IO_node->base = io_node->base + io_node->length;
2641
2642 temp_byte = (hold_IO_node->base) >> 8;
2643 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_IO_BASE, temp_byte);
2644
2645 return_resource(&(resources->io_head), io_node);
2646 }
2647
2648 io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2649
2650
2651 if (io_node) {
2652
2653
2654 hold_IO_node->length = io_node->base - hold_IO_node->base;
2655
2656
2657 if (hold_IO_node->length) {
2658 hold_IO_node->next = func->io_head;
2659 func->io_head = hold_IO_node;
2660
2661 temp_byte = (io_node->base - 1) >> 8;
2662 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2663
2664 return_resource(&(resources->io_head), io_node);
2665 } else {
2666
2667 temp_word = 0x0000;
2668 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_IO_LIMIT, temp_word);
2669
2670 return_resource(&(resources->io_head), io_node);
2671 kfree(hold_IO_node);
2672 }
2673 } else {
2674
2675 hold_IO_node->next = func->io_head;
2676 func->io_head = hold_IO_node;
2677 }
2678 } else if (hold_IO_node) {
2679
2680 hold_IO_node->next = func->io_head;
2681 func->io_head = hold_IO_node;
2682 }
2683
2684
2685 if (hold_mem_node && temp_resources.mem_head) {
2686 mem_node = do_pre_bridge_resource_split(&(temp_resources. mem_head),
2687 &hold_mem_node, 0x100000);
2688
2689
2690 if (mem_node) {
2691 hold_mem_node->base = mem_node->base + mem_node->length;
2692
2693 temp_word = (hold_mem_node->base) >> 16;
2694 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2695
2696 return_resource(&(resources->mem_head), mem_node);
2697 }
2698
2699 mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000);
2700
2701
2702 if (mem_node) {
2703
2704
2705 hold_mem_node->length = mem_node->base - hold_mem_node->base;
2706
2707 if (hold_mem_node->length) {
2708 hold_mem_node->next = func->mem_head;
2709 func->mem_head = hold_mem_node;
2710
2711
2712 temp_word = (mem_node->base - 1) >> 16;
2713 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2714
2715
2716 return_resource(&(resources->mem_head), mem_node);
2717 } else {
2718
2719 temp_word = 0x0000;
2720 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2721
2722 return_resource(&(resources->mem_head), mem_node);
2723 kfree(hold_mem_node);
2724 }
2725 } else {
2726
2727 hold_mem_node->next = func->mem_head;
2728 func->mem_head = hold_mem_node;
2729 }
2730 } else if (hold_mem_node) {
2731
2732 hold_mem_node->next = func->mem_head;
2733 func->mem_head = hold_mem_node;
2734 }
2735
2736
2737 if (temp_resources.p_mem_head) {
2738 p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2739 &hold_p_mem_node, 0x100000);
2740
2741
2742 if (p_mem_node) {
2743 hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2744
2745 temp_word = (hold_p_mem_node->base) >> 16;
2746 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2747
2748 return_resource(&(resources->p_mem_head), p_mem_node);
2749 }
2750
2751 p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000);
2752
2753
2754 if (p_mem_node) {
2755
2756
2757 hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2758
2759
2760 if (hold_p_mem_node->length) {
2761 hold_p_mem_node->next = func->p_mem_head;
2762 func->p_mem_head = hold_p_mem_node;
2763
2764 temp_word = (p_mem_node->base - 1) >> 16;
2765 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2766
2767 return_resource(&(resources->p_mem_head), p_mem_node);
2768 } else {
2769
2770 temp_word = 0x0000;
2771 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2772
2773 return_resource(&(resources->p_mem_head), p_mem_node);
2774 kfree(hold_p_mem_node);
2775 }
2776 } else {
2777
2778 hold_p_mem_node->next = func->p_mem_head;
2779 func->p_mem_head = hold_p_mem_node;
2780 }
2781 } else if (hold_p_mem_node) {
2782
2783 hold_p_mem_node->next = func->p_mem_head;
2784 func->p_mem_head = hold_p_mem_node;
2785 }
2786
2787
2788
2789
2790
2791 command = 0x0157;
2792
2793
2794
2795
2796
2797 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_COMMAND, command);
2798
2799
2800 command = 0x07;
2801
2802
2803 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
2804 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2805
2806 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2807
2808 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2809
2810 return DEVICE_TYPE_NOT_SUPPORTED;
2811 }
2812
2813 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
2814 temp_register = 0xFFFFFFFF;
2815
2816 dbg("CND: bus=%d, devfn=%d, offset=%d\n", pci_bus->number, devfn, cloop);
2817 rc = pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
2818
2819 rc = pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp_register);
2820 dbg("CND: base = 0x%x\n", temp_register);
2821
2822 if (temp_register) {
2823 if ((temp_register & 0x03L) == 0x01) {
2824
2825
2826
2827 base = temp_register & 0xFFFFFFFC;
2828 base = ~base + 1;
2829
2830 dbg("CND: length = 0x%x\n", base);
2831 io_node = get_io_resource(&(resources->io_head), base);
2832 dbg("Got io_node start = %8.8x, length = %8.8x next (%p)\n",
2833 io_node->base, io_node->length, io_node->next);
2834 dbg("func (%p) io_head (%p)\n", func, func->io_head);
2835
2836
2837 if (io_node) {
2838 base = io_node->base;
2839
2840 io_node->next = func->io_head;
2841 func->io_head = io_node;
2842 } else
2843 return -ENOMEM;
2844 } else if ((temp_register & 0x0BL) == 0x08) {
2845
2846 base = temp_register & 0xFFFFFFF0;
2847 base = ~base + 1;
2848
2849 dbg("CND: length = 0x%x\n", base);
2850 p_mem_node = get_resource(&(resources->p_mem_head), base);
2851
2852
2853 if (p_mem_node) {
2854 base = p_mem_node->base;
2855
2856 p_mem_node->next = func->p_mem_head;
2857 func->p_mem_head = p_mem_node;
2858 } else
2859 return -ENOMEM;
2860 } else if ((temp_register & 0x0BL) == 0x00) {
2861
2862 base = temp_register & 0xFFFFFFF0;
2863 base = ~base + 1;
2864
2865 dbg("CND: length = 0x%x\n", base);
2866 mem_node = get_resource(&(resources->mem_head), base);
2867
2868
2869 if (mem_node) {
2870 base = mem_node->base;
2871
2872 mem_node->next = func->mem_head;
2873 func->mem_head = mem_node;
2874 } else
2875 return -ENOMEM;
2876 } else {
2877
2878 return NOT_ENOUGH_RESOURCES;
2879 }
2880
2881 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2882
2883
2884 if ((temp_register & 0x07L) == 0x04) {
2885 cloop += 4;
2886
2887
2888
2889
2890
2891 base = 0;
2892 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2893 }
2894 }
2895 }
2896 if (cpqhp_legacy_mode) {
2897
2898 rc = pci_bus_read_config_byte (pci_bus, devfn,
2899 PCI_INTERRUPT_PIN, &temp_byte);
2900
2901
2902
2903
2904 if (temp_byte && resources->irqs &&
2905 (resources->irqs->valid_INT &
2906 (0x01 << ((temp_byte + resources->irqs->barber_pole - 1) & 0x03)))) {
2907
2908 IRQ = resources->irqs->interrupt[(temp_byte +
2909 resources->irqs->barber_pole - 1) & 0x03];
2910 } else {
2911
2912 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2913
2914 if (class_code == PCI_BASE_CLASS_STORAGE)
2915 IRQ = cpqhp_disk_irq;
2916 else
2917 IRQ = cpqhp_nic_irq;
2918 }
2919
2920
2921 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_INTERRUPT_LINE, IRQ);
2922 }
2923
2924 if (!behind_bridge) {
2925 rc = cpqhp_set_irq(func->bus, func->device, temp_byte, IRQ);
2926 if (rc)
2927 return 1;
2928 } else {
2929
2930
2931 resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03] = IRQ;
2932 resources->irqs->valid_INT |= 0x01 << (temp_byte + resources->irqs->barber_pole - 1) & 0x03;
2933 }
2934
2935
2936 temp_byte = 0x40;
2937 rc = pci_bus_write_config_byte(pci_bus, devfn,
2938 PCI_LATENCY_TIMER, temp_byte);
2939
2940
2941 temp_byte = 0x08;
2942 rc = pci_bus_write_config_byte(pci_bus, devfn,
2943 PCI_CACHE_LINE_SIZE, temp_byte);
2944
2945
2946 temp_dword = 0x00L;
2947 rc = pci_bus_write_config_word(pci_bus, devfn,
2948 PCI_ROM_ADDRESS, temp_dword);
2949
2950
2951 temp_word = 0x0157;
2952
2953
2954
2955
2956
2957 rc = pci_bus_write_config_word (pci_bus, devfn,
2958 PCI_COMMAND, temp_word);
2959 } else {
2960
2961 return DEVICE_TYPE_NOT_SUPPORTED;
2962 }
2963
2964 func->configured = 1;
2965
2966 return 0;
2967free_and_out:
2968 cpqhp_destroy_resource_list (&temp_resources);
2969
2970 return_resource(&(resources-> bus_head), hold_bus_node);
2971 return_resource(&(resources-> io_head), hold_IO_node);
2972 return_resource(&(resources-> mem_head), hold_mem_node);
2973 return_resource(&(resources-> p_mem_head), hold_p_mem_node);
2974 return rc;
2975}
2976