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12#ifndef __DRM_IPU_H__
13#define __DRM_IPU_H__
14
15#include <linux/types.h>
16#include <linux/videodev2.h>
17#include <linux/bitmap.h>
18#include <linux/fb.h>
19
20struct ipu_soc;
21
22enum ipuv3_type {
23 IPUV3EX,
24 IPUV3M,
25 IPUV3H,
26};
27
28
29
30
31struct ipu_di_signal_cfg {
32 unsigned datamask_en:1;
33 unsigned interlaced:1;
34 unsigned odd_field_first:1;
35 unsigned clksel_en:1;
36 unsigned clkidle_en:1;
37 unsigned data_pol:1;
38 unsigned clk_pol:1;
39 unsigned enable_pol:1;
40 unsigned Hsync_pol:1;
41 unsigned Vsync_pol:1;
42
43 u16 width;
44 u16 height;
45 u32 pixel_fmt;
46 u16 h_start_width;
47 u16 h_sync_width;
48 u16 h_end_width;
49 u16 v_start_width;
50 u16 v_sync_width;
51 u16 v_end_width;
52 u32 v_to_h_sync;
53 unsigned long pixelclock;
54#define IPU_DI_CLKMODE_SYNC (1 << 0)
55#define IPU_DI_CLKMODE_EXT (1 << 1)
56 unsigned long clkflags;
57
58 u8 hsync_pin;
59 u8 vsync_pin;
60};
61
62enum ipu_color_space {
63 IPUV3_COLORSPACE_RGB,
64 IPUV3_COLORSPACE_YUV,
65 IPUV3_COLORSPACE_UNKNOWN,
66};
67
68struct ipuv3_channel;
69
70enum ipu_channel_irq {
71 IPU_IRQ_EOF = 0,
72 IPU_IRQ_NFACK = 64,
73 IPU_IRQ_NFB4EOF = 128,
74 IPU_IRQ_EOS = 192,
75};
76
77int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel,
78 enum ipu_channel_irq irq);
79
80#define IPU_IRQ_DP_SF_START (448 + 2)
81#define IPU_IRQ_DP_SF_END (448 + 3)
82#define IPU_IRQ_BG_SF_END IPU_IRQ_DP_SF_END,
83#define IPU_IRQ_DC_FC_0 (448 + 8)
84#define IPU_IRQ_DC_FC_1 (448 + 9)
85#define IPU_IRQ_DC_FC_2 (448 + 10)
86#define IPU_IRQ_DC_FC_3 (448 + 11)
87#define IPU_IRQ_DC_FC_4 (448 + 12)
88#define IPU_IRQ_DC_FC_6 (448 + 13)
89#define IPU_IRQ_VSYNC_PRE_0 (448 + 14)
90#define IPU_IRQ_VSYNC_PRE_1 (448 + 15)
91
92
93
94
95struct ipuv3_channel *ipu_idmac_get(struct ipu_soc *ipu, unsigned channel);
96void ipu_idmac_put(struct ipuv3_channel *);
97
98int ipu_idmac_enable_channel(struct ipuv3_channel *channel);
99int ipu_idmac_disable_channel(struct ipuv3_channel *channel);
100
101void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel,
102 bool doublebuffer);
103void ipu_idmac_select_buffer(struct ipuv3_channel *channel, u32 buf_num);
104
105
106
107
108struct ipu_dc;
109struct ipu_di;
110struct ipu_dc *ipu_dc_get(struct ipu_soc *ipu, int channel);
111void ipu_dc_put(struct ipu_dc *dc);
112int ipu_dc_init_sync(struct ipu_dc *dc, struct ipu_di *di, bool interlaced,
113 u32 pixel_fmt, u32 width);
114void ipu_dc_enable_channel(struct ipu_dc *dc);
115void ipu_dc_disable_channel(struct ipu_dc *dc);
116
117
118
119
120struct ipu_di *ipu_di_get(struct ipu_soc *ipu, int disp);
121void ipu_di_put(struct ipu_di *);
122int ipu_di_disable(struct ipu_di *);
123int ipu_di_enable(struct ipu_di *);
124int ipu_di_get_num(struct ipu_di *);
125int ipu_di_init_sync_panel(struct ipu_di *, struct ipu_di_signal_cfg *sig);
126
127
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129
130struct dmfc_channel;
131int ipu_dmfc_enable_channel(struct dmfc_channel *dmfc);
132void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc);
133int ipu_dmfc_alloc_bandwidth(struct dmfc_channel *dmfc,
134 unsigned long bandwidth_mbs, int burstsize);
135void ipu_dmfc_free_bandwidth(struct dmfc_channel *dmfc);
136int ipu_dmfc_init_channel(struct dmfc_channel *dmfc, int width);
137struct dmfc_channel *ipu_dmfc_get(struct ipu_soc *ipu, int ipuv3_channel);
138void ipu_dmfc_put(struct dmfc_channel *dmfc);
139
140
141
142
143#define IPU_DP_FLOW_SYNC_BG 0
144#define IPU_DP_FLOW_SYNC_FG 1
145#define IPU_DP_FLOW_ASYNC0_BG 2
146#define IPU_DP_FLOW_ASYNC0_FG 3
147#define IPU_DP_FLOW_ASYNC1_BG 4
148#define IPU_DP_FLOW_ASYNC1_FG 5
149
150struct ipu_dp *ipu_dp_get(struct ipu_soc *ipu, unsigned int flow);
151void ipu_dp_put(struct ipu_dp *);
152int ipu_dp_enable_channel(struct ipu_dp *dp);
153void ipu_dp_disable_channel(struct ipu_dp *dp);
154int ipu_dp_setup_channel(struct ipu_dp *dp,
155 enum ipu_color_space in, enum ipu_color_space out);
156int ipu_dp_set_window_pos(struct ipu_dp *, u16 x_pos, u16 y_pos);
157int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable, u8 alpha,
158 bool bg_chan);
159
160#define IPU_CPMEM_WORD(word, ofs, size) ((((word) * 160 + (ofs)) << 8) | (size))
161
162#define IPU_FIELD_UBO IPU_CPMEM_WORD(0, 46, 22)
163#define IPU_FIELD_VBO IPU_CPMEM_WORD(0, 68, 22)
164#define IPU_FIELD_IOX IPU_CPMEM_WORD(0, 90, 4)
165#define IPU_FIELD_RDRW IPU_CPMEM_WORD(0, 94, 1)
166#define IPU_FIELD_SO IPU_CPMEM_WORD(0, 113, 1)
167#define IPU_FIELD_SLY IPU_CPMEM_WORD(1, 102, 14)
168#define IPU_FIELD_SLUV IPU_CPMEM_WORD(1, 128, 14)
169
170#define IPU_FIELD_XV IPU_CPMEM_WORD(0, 0, 10)
171#define IPU_FIELD_YV IPU_CPMEM_WORD(0, 10, 9)
172#define IPU_FIELD_XB IPU_CPMEM_WORD(0, 19, 13)
173#define IPU_FIELD_YB IPU_CPMEM_WORD(0, 32, 12)
174#define IPU_FIELD_NSB_B IPU_CPMEM_WORD(0, 44, 1)
175#define IPU_FIELD_CF IPU_CPMEM_WORD(0, 45, 1)
176#define IPU_FIELD_SX IPU_CPMEM_WORD(0, 46, 12)
177#define IPU_FIELD_SY IPU_CPMEM_WORD(0, 58, 11)
178#define IPU_FIELD_NS IPU_CPMEM_WORD(0, 69, 10)
179#define IPU_FIELD_SDX IPU_CPMEM_WORD(0, 79, 7)
180#define IPU_FIELD_SM IPU_CPMEM_WORD(0, 86, 10)
181#define IPU_FIELD_SCC IPU_CPMEM_WORD(0, 96, 1)
182#define IPU_FIELD_SCE IPU_CPMEM_WORD(0, 97, 1)
183#define IPU_FIELD_SDY IPU_CPMEM_WORD(0, 98, 7)
184#define IPU_FIELD_SDRX IPU_CPMEM_WORD(0, 105, 1)
185#define IPU_FIELD_SDRY IPU_CPMEM_WORD(0, 106, 1)
186#define IPU_FIELD_BPP IPU_CPMEM_WORD(0, 107, 3)
187#define IPU_FIELD_DEC_SEL IPU_CPMEM_WORD(0, 110, 2)
188#define IPU_FIELD_DIM IPU_CPMEM_WORD(0, 112, 1)
189#define IPU_FIELD_BNDM IPU_CPMEM_WORD(0, 114, 3)
190#define IPU_FIELD_BM IPU_CPMEM_WORD(0, 117, 2)
191#define IPU_FIELD_ROT IPU_CPMEM_WORD(0, 119, 1)
192#define IPU_FIELD_HF IPU_CPMEM_WORD(0, 120, 1)
193#define IPU_FIELD_VF IPU_CPMEM_WORD(0, 121, 1)
194#define IPU_FIELD_THE IPU_CPMEM_WORD(0, 122, 1)
195#define IPU_FIELD_CAP IPU_CPMEM_WORD(0, 123, 1)
196#define IPU_FIELD_CAE IPU_CPMEM_WORD(0, 124, 1)
197#define IPU_FIELD_FW IPU_CPMEM_WORD(0, 125, 13)
198#define IPU_FIELD_FH IPU_CPMEM_WORD(0, 138, 12)
199#define IPU_FIELD_EBA0 IPU_CPMEM_WORD(1, 0, 29)
200#define IPU_FIELD_EBA1 IPU_CPMEM_WORD(1, 29, 29)
201#define IPU_FIELD_ILO IPU_CPMEM_WORD(1, 58, 20)
202#define IPU_FIELD_NPB IPU_CPMEM_WORD(1, 78, 7)
203#define IPU_FIELD_PFS IPU_CPMEM_WORD(1, 85, 4)
204#define IPU_FIELD_ALU IPU_CPMEM_WORD(1, 89, 1)
205#define IPU_FIELD_ALBM IPU_CPMEM_WORD(1, 90, 3)
206#define IPU_FIELD_ID IPU_CPMEM_WORD(1, 93, 2)
207#define IPU_FIELD_TH IPU_CPMEM_WORD(1, 95, 7)
208#define IPU_FIELD_SL IPU_CPMEM_WORD(1, 102, 14)
209#define IPU_FIELD_WID0 IPU_CPMEM_WORD(1, 116, 3)
210#define IPU_FIELD_WID1 IPU_CPMEM_WORD(1, 119, 3)
211#define IPU_FIELD_WID2 IPU_CPMEM_WORD(1, 122, 3)
212#define IPU_FIELD_WID3 IPU_CPMEM_WORD(1, 125, 3)
213#define IPU_FIELD_OFS0 IPU_CPMEM_WORD(1, 128, 5)
214#define IPU_FIELD_OFS1 IPU_CPMEM_WORD(1, 133, 5)
215#define IPU_FIELD_OFS2 IPU_CPMEM_WORD(1, 138, 5)
216#define IPU_FIELD_OFS3 IPU_CPMEM_WORD(1, 143, 5)
217#define IPU_FIELD_SXYS IPU_CPMEM_WORD(1, 148, 1)
218#define IPU_FIELD_CRE IPU_CPMEM_WORD(1, 149, 1)
219#define IPU_FIELD_DEC_SEL2 IPU_CPMEM_WORD(1, 150, 1)
220
221struct ipu_cpmem_word {
222 u32 data[5];
223 u32 res[3];
224};
225
226struct ipu_ch_param {
227 struct ipu_cpmem_word word[2];
228};
229
230void ipu_ch_param_write_field(struct ipu_ch_param __iomem *base, u32 wbs, u32 v);
231u32 ipu_ch_param_read_field(struct ipu_ch_param __iomem *base, u32 wbs);
232struct ipu_ch_param __iomem *ipu_get_cpmem(struct ipuv3_channel *channel);
233void ipu_ch_param_dump(struct ipu_ch_param __iomem *p);
234
235static inline void ipu_ch_param_zero(struct ipu_ch_param __iomem *p)
236{
237 int i;
238 void __iomem *base = p;
239
240 for (i = 0; i < sizeof(*p) / sizeof(u32); i++)
241 writel(0, base + i * sizeof(u32));
242}
243
244static inline void ipu_cpmem_set_buffer(struct ipu_ch_param __iomem *p,
245 int bufnum, dma_addr_t buf)
246{
247 if (bufnum)
248 ipu_ch_param_write_field(p, IPU_FIELD_EBA1, buf >> 3);
249 else
250 ipu_ch_param_write_field(p, IPU_FIELD_EBA0, buf >> 3);
251}
252
253static inline void ipu_cpmem_set_resolution(struct ipu_ch_param __iomem *p,
254 int xres, int yres)
255{
256 ipu_ch_param_write_field(p, IPU_FIELD_FW, xres - 1);
257 ipu_ch_param_write_field(p, IPU_FIELD_FH, yres - 1);
258}
259
260static inline void ipu_cpmem_set_stride(struct ipu_ch_param __iomem *p,
261 int stride)
262{
263 ipu_ch_param_write_field(p, IPU_FIELD_SLY, stride - 1);
264}
265
266void ipu_cpmem_set_high_priority(struct ipuv3_channel *channel);
267
268struct ipu_rgb {
269 struct fb_bitfield red;
270 struct fb_bitfield green;
271 struct fb_bitfield blue;
272 struct fb_bitfield transp;
273 int bits_per_pixel;
274};
275
276struct ipu_image {
277 struct v4l2_pix_format pix;
278 struct v4l2_rect rect;
279 dma_addr_t phys;
280};
281
282int ipu_cpmem_set_format_passthrough(struct ipu_ch_param __iomem *p,
283 int width);
284
285int ipu_cpmem_set_format_rgb(struct ipu_ch_param __iomem *,
286 struct ipu_rgb *rgb);
287
288static inline void ipu_cpmem_interlaced_scan(struct ipu_ch_param *p,
289 int stride)
290{
291 ipu_ch_param_write_field(p, IPU_FIELD_SO, 1);
292 ipu_ch_param_write_field(p, IPU_FIELD_ILO, stride / 8);
293 ipu_ch_param_write_field(p, IPU_FIELD_SLY, (stride * 2) - 1);
294};
295
296void ipu_cpmem_set_yuv_planar(struct ipu_ch_param __iomem *p, u32 pixel_format,
297 int stride, int height);
298void ipu_cpmem_set_yuv_interleaved(struct ipu_ch_param __iomem *p,
299 u32 pixel_format);
300void ipu_cpmem_set_yuv_planar_full(struct ipu_ch_param __iomem *p,
301 u32 pixel_format, int stride, int u_offset, int v_offset);
302int ipu_cpmem_set_fmt(struct ipu_ch_param __iomem *cpmem, u32 pixelformat);
303int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
304 struct ipu_image *image);
305
306enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat);
307
308static inline void ipu_cpmem_set_burstsize(struct ipu_ch_param __iomem *p,
309 int burstsize)
310{
311 ipu_ch_param_write_field(p, IPU_FIELD_NPB, burstsize - 1);
312};
313
314struct ipu_client_platformdata {
315 int di;
316 int dc;
317 int dp;
318 int dmfc;
319 int dma[2];
320};
321
322#endif
323
