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25#include <linux/slab.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/moduleparam.h>
29#include <linux/init.h>
30#include <linux/i2c.h>
31#include <linux/wait.h>
32#include <linux/delay.h>
33#include <linux/mutex.h>
34#include <linux/io.h>
35
36#include "cxd2099.h"
37
38#define MAX_BUFFER_SIZE 248
39
40struct cxd {
41 struct dvb_ca_en50221 en;
42
43 struct i2c_adapter *i2c;
44 struct cxd2099_cfg cfg;
45
46 u8 regs[0x23];
47 u8 lastaddress;
48 u8 clk_reg_f;
49 u8 clk_reg_b;
50 int mode;
51 int ready;
52 int dr;
53 int slot_stat;
54
55 u8 amem[1024];
56 int amem_read;
57
58 int cammode;
59 struct mutex lock;
60};
61
62static int i2c_write_reg(struct i2c_adapter *adapter, u8 adr,
63 u8 reg, u8 data)
64{
65 u8 m[2] = {reg, data};
66 struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m, .len = 2};
67
68 if (i2c_transfer(adapter, &msg, 1) != 1) {
69 dev_err(&adapter->dev,
70 "Failed to write to I2C register %02x@%02x!\n",
71 reg, adr);
72 return -1;
73 }
74 return 0;
75}
76
77static int i2c_write(struct i2c_adapter *adapter, u8 adr,
78 u8 *data, u8 len)
79{
80 struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = data, .len = len};
81
82 if (i2c_transfer(adapter, &msg, 1) != 1) {
83 dev_err(&adapter->dev, "Failed to write to I2C!\n");
84 return -1;
85 }
86 return 0;
87}
88
89static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr,
90 u8 reg, u8 *val)
91{
92 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
93 .buf = ®, .len = 1},
94 {.addr = adr, .flags = I2C_M_RD,
95 .buf = val, .len = 1} };
96
97 if (i2c_transfer(adapter, msgs, 2) != 2) {
98 dev_err(&adapter->dev, "error in i2c_read_reg\n");
99 return -1;
100 }
101 return 0;
102}
103
104static int i2c_read(struct i2c_adapter *adapter, u8 adr,
105 u8 reg, u8 *data, u8 n)
106{
107 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
108 .buf = ®, .len = 1},
109 {.addr = adr, .flags = I2C_M_RD,
110 .buf = data, .len = n} };
111
112 if (i2c_transfer(adapter, msgs, 2) != 2) {
113 dev_err(&adapter->dev, "error in i2c_read\n");
114 return -1;
115 }
116 return 0;
117}
118
119static int read_block(struct cxd *ci, u8 adr, u8 *data, u8 n)
120{
121 int status;
122
123 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
124 if (!status) {
125 ci->lastaddress = adr;
126 status = i2c_read(ci->i2c, ci->cfg.adr, 1, data, n);
127 }
128 return status;
129}
130
131static int read_reg(struct cxd *ci, u8 reg, u8 *val)
132{
133 return read_block(ci, reg, val, 1);
134}
135
136
137static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
138{
139 int status;
140 u8 addr[3] = {2, address & 0xff, address >> 8};
141
142 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
143 if (!status)
144 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n);
145 return status;
146}
147
148static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
149{
150 int status;
151 u8 addr[3] = {2, address & 0xff, address >> 8};
152
153 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
154 if (!status) {
155 u8 buf[256] = {3};
156 memcpy(buf+1, data, n);
157 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n+1);
158 }
159 return status;
160}
161
162static int read_io(struct cxd *ci, u16 address, u8 *val)
163{
164 int status;
165 u8 addr[3] = {2, address & 0xff, address >> 8};
166
167 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
168 if (!status)
169 status = i2c_read(ci->i2c, ci->cfg.adr, 3, val, 1);
170 return status;
171}
172
173static int write_io(struct cxd *ci, u16 address, u8 val)
174{
175 int status;
176 u8 addr[3] = {2, address & 0xff, address >> 8};
177 u8 buf[2] = {3, val};
178
179 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
180 if (!status)
181 status = i2c_write(ci->i2c, ci->cfg.adr, buf, 2);
182 return status;
183}
184
185#if 0
186static int read_io_data(struct cxd *ci, u8 *data, u8 n)
187{
188 int status;
189 u8 addr[3] = { 2, 0, 0 };
190
191 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
192 if (!status)
193 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n);
194 return 0;
195}
196
197static int write_io_data(struct cxd *ci, u8 *data, u8 n)
198{
199 int status;
200 u8 addr[3] = {2, 0, 0};
201
202 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
203 if (!status) {
204 u8 buf[256] = {3};
205 memcpy(buf+1, data, n);
206 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
207 }
208 return 0;
209}
210#endif
211
212static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask)
213{
214 int status;
215
216 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, reg);
217 if (!status && reg >= 6 && reg <= 8 && mask != 0xff)
218 status = i2c_read_reg(ci->i2c, ci->cfg.adr, 1, &ci->regs[reg]);
219 ci->regs[reg] = (ci->regs[reg] & (~mask)) | val;
220 if (!status) {
221 ci->lastaddress = reg;
222 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 1, ci->regs[reg]);
223 }
224 if (reg == 0x20)
225 ci->regs[reg] &= 0x7f;
226 return status;
227}
228
229static int write_reg(struct cxd *ci, u8 reg, u8 val)
230{
231 return write_regm(ci, reg, val, 0xff);
232}
233
234#ifdef BUFFER_MODE
235static int write_block(struct cxd *ci, u8 adr, u8 *data, int n)
236{
237 int status;
238 u8 buf[256] = {1};
239
240 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
241 if (!status) {
242 ci->lastaddress = adr;
243 memcpy(buf + 1, data, n);
244 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
245 }
246 return status;
247}
248#endif
249
250static void set_mode(struct cxd *ci, int mode)
251{
252 if (mode == ci->mode)
253 return;
254
255 switch (mode) {
256 case 0x00:
257 write_regm(ci, 0x06, 0x00, 0x07);
258 break;
259 case 0x01:
260 write_regm(ci, 0x06, 0x02, 0x07);
261 break;
262 default:
263 break;
264 }
265 ci->mode = mode;
266}
267
268static void cam_mode(struct cxd *ci, int mode)
269{
270 if (mode == ci->cammode)
271 return;
272
273 switch (mode) {
274 case 0x00:
275 write_regm(ci, 0x20, 0x80, 0x80);
276 break;
277 case 0x01:
278#ifdef BUFFER_MODE
279 if (!ci->en.read_data)
280 return;
281 dev_info(&ci->i2c->dev, "enable cam buffer mode\n");
282
283
284 write_regm(ci, 0x08, 0x40, 0x40);
285
286 write_regm(ci, 0x08, 0x80, 0x80);
287#endif
288 break;
289 default:
290 break;
291 }
292 ci->cammode = mode;
293}
294
295
296
297static int init(struct cxd *ci)
298{
299 int status;
300
301 mutex_lock(&ci->lock);
302 ci->mode = -1;
303 do {
304 status = write_reg(ci, 0x00, 0x00);
305 if (status < 0)
306 break;
307 status = write_reg(ci, 0x01, 0x00);
308 if (status < 0)
309 break;
310 status = write_reg(ci, 0x02, 0x10);
311 if (status < 0)
312 break;
313 status = write_reg(ci, 0x03, 0x00);
314 if (status < 0)
315 break;
316 status = write_reg(ci, 0x05, 0xFF);
317 if (status < 0)
318 break;
319 status = write_reg(ci, 0x06, 0x1F);
320 if (status < 0)
321 break;
322 status = write_reg(ci, 0x07, 0x1F);
323 if (status < 0)
324 break;
325 status = write_reg(ci, 0x08, 0x28);
326 if (status < 0)
327 break;
328 status = write_reg(ci, 0x14, 0x20);
329 if (status < 0)
330 break;
331
332#if 0
333 status = write_reg(ci, 0x09, 0x4D);
334 if (status < 0)
335 break;
336#endif
337 status = write_reg(ci, 0x0A, 0xA7);
338 if (status < 0)
339 break;
340
341 status = write_reg(ci, 0x0B, 0x33);
342 if (status < 0)
343 break;
344 status = write_reg(ci, 0x0C, 0x33);
345 if (status < 0)
346 break;
347
348 status = write_regm(ci, 0x14, 0x00, 0x0F);
349 if (status < 0)
350 break;
351 status = write_reg(ci, 0x15, ci->clk_reg_b);
352 if (status < 0)
353 break;
354 status = write_regm(ci, 0x16, 0x00, 0x0F);
355 if (status < 0)
356 break;
357 status = write_reg(ci, 0x17, ci->clk_reg_f);
358 if (status < 0)
359 break;
360
361 if (ci->cfg.clock_mode) {
362 if (ci->cfg.polarity) {
363 status = write_reg(ci, 0x09, 0x6f);
364 if (status < 0)
365 break;
366 } else {
367 status = write_reg(ci, 0x09, 0x6d);
368 if (status < 0)
369 break;
370 }
371 status = write_reg(ci, 0x20, 0x68);
372 if (status < 0)
373 break;
374 status = write_reg(ci, 0x21, 0x00);
375 if (status < 0)
376 break;
377 status = write_reg(ci, 0x22, 0x02);
378 if (status < 0)
379 break;
380 } else {
381 if (ci->cfg.polarity) {
382 status = write_reg(ci, 0x09, 0x4f);
383 if (status < 0)
384 break;
385 } else {
386 status = write_reg(ci, 0x09, 0x4d);
387 if (status < 0)
388 break;
389 }
390
391 status = write_reg(ci, 0x20, 0x28);
392 if (status < 0)
393 break;
394 status = write_reg(ci, 0x21, 0x00);
395 if (status < 0)
396 break;
397 status = write_reg(ci, 0x22, 0x07);
398 if (status < 0)
399 break;
400 }
401
402 status = write_regm(ci, 0x20, 0x80, 0x80);
403 if (status < 0)
404 break;
405 status = write_regm(ci, 0x03, 0x02, 0x02);
406 if (status < 0)
407 break;
408 status = write_reg(ci, 0x01, 0x04);
409 if (status < 0)
410 break;
411 status = write_reg(ci, 0x00, 0x31);
412 if (status < 0)
413 break;
414
415
416 status = write_regm(ci, 0x09, 0x08, 0x08);
417 if (status < 0)
418 break;
419 ci->cammode = -1;
420 cam_mode(ci, 0);
421 } while (0);
422 mutex_unlock(&ci->lock);
423
424 return 0;
425}
426
427static int read_attribute_mem(struct dvb_ca_en50221 *ca,
428 int slot, int address)
429{
430 struct cxd *ci = ca->data;
431#if 0
432 if (ci->amem_read) {
433 if (address <= 0 || address > 1024)
434 return -EIO;
435 return ci->amem[address];
436 }
437
438 mutex_lock(&ci->lock);
439 write_regm(ci, 0x06, 0x00, 0x05);
440 read_pccard(ci, 0, &ci->amem[0], 128);
441 read_pccard(ci, 128, &ci->amem[0], 128);
442 read_pccard(ci, 256, &ci->amem[0], 128);
443 read_pccard(ci, 384, &ci->amem[0], 128);
444 write_regm(ci, 0x06, 0x05, 0x05);
445 mutex_unlock(&ci->lock);
446 return ci->amem[address];
447#else
448 u8 val;
449 mutex_lock(&ci->lock);
450 set_mode(ci, 1);
451 read_pccard(ci, address, &val, 1);
452 mutex_unlock(&ci->lock);
453
454 return val;
455#endif
456}
457
458static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
459 int address, u8 value)
460{
461 struct cxd *ci = ca->data;
462
463 mutex_lock(&ci->lock);
464 set_mode(ci, 1);
465 write_pccard(ci, address, &value, 1);
466 mutex_unlock(&ci->lock);
467 return 0;
468}
469
470static int read_cam_control(struct dvb_ca_en50221 *ca,
471 int slot, u8 address)
472{
473 struct cxd *ci = ca->data;
474 u8 val;
475
476 mutex_lock(&ci->lock);
477 set_mode(ci, 0);
478 read_io(ci, address, &val);
479 mutex_unlock(&ci->lock);
480 return val;
481}
482
483static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
484 u8 address, u8 value)
485{
486 struct cxd *ci = ca->data;
487
488 mutex_lock(&ci->lock);
489 set_mode(ci, 0);
490 write_io(ci, address, value);
491 mutex_unlock(&ci->lock);
492 return 0;
493}
494
495static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
496{
497 struct cxd *ci = ca->data;
498
499 mutex_lock(&ci->lock);
500#if 0
501 write_reg(ci, 0x00, 0x21);
502 write_reg(ci, 0x06, 0x1F);
503 write_reg(ci, 0x00, 0x31);
504#else
505#if 0
506 write_reg(ci, 0x06, 0x1F);
507 write_reg(ci, 0x06, 0x2F);
508#else
509 cam_mode(ci, 0);
510 write_reg(ci, 0x00, 0x21);
511 write_reg(ci, 0x06, 0x1F);
512 write_reg(ci, 0x00, 0x31);
513 write_regm(ci, 0x20, 0x80, 0x80);
514 write_reg(ci, 0x03, 0x02);
515 ci->ready = 0;
516#endif
517#endif
518 ci->mode = -1;
519 {
520 int i;
521#if 0
522 u8 val;
523#endif
524 for (i = 0; i < 100; i++) {
525 msleep(10);
526#if 0
527 read_reg(ci, 0x06, &val);
528 dev_info(&ci->i2c->dev, "%d:%02x\n", i, val);
529 if (!(val&0x10))
530 break;
531#else
532 if (ci->ready)
533 break;
534#endif
535 }
536 }
537 mutex_unlock(&ci->lock);
538
539 return 0;
540}
541
542static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
543{
544 struct cxd *ci = ca->data;
545
546 dev_info(&ci->i2c->dev, "slot_shutdown\n");
547 mutex_lock(&ci->lock);
548 write_regm(ci, 0x09, 0x08, 0x08);
549 write_regm(ci, 0x20, 0x80, 0x80);
550 write_regm(ci, 0x06, 0x07, 0x07);
551 ci->mode = -1;
552 mutex_unlock(&ci->lock);
553 return 0;
554}
555
556static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
557{
558 struct cxd *ci = ca->data;
559
560 mutex_lock(&ci->lock);
561 write_regm(ci, 0x09, 0x00, 0x08);
562 set_mode(ci, 0);
563#ifdef BUFFER_MODE
564 cam_mode(ci, 1);
565#endif
566 mutex_unlock(&ci->lock);
567 return 0;
568}
569
570
571static int campoll(struct cxd *ci)
572{
573 u8 istat;
574
575 read_reg(ci, 0x04, &istat);
576 if (!istat)
577 return 0;
578 write_reg(ci, 0x05, istat);
579
580 if (istat&0x40) {
581 ci->dr = 1;
582 dev_info(&ci->i2c->dev, "DR\n");
583 }
584 if (istat&0x20)
585 dev_info(&ci->i2c->dev, "WC\n");
586
587 if (istat&2) {
588 u8 slotstat;
589
590 read_reg(ci, 0x01, &slotstat);
591 if (!(2&slotstat)) {
592 if (!ci->slot_stat) {
593 ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
594 write_regm(ci, 0x03, 0x08, 0x08);
595 }
596
597 } else {
598 if (ci->slot_stat) {
599 ci->slot_stat = 0;
600 write_regm(ci, 0x03, 0x00, 0x08);
601 dev_info(&ci->i2c->dev, "NO CAM\n");
602 ci->ready = 0;
603 }
604 }
605 if (istat&8 && ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT) {
606 ci->ready = 1;
607 ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY;
608 }
609 }
610 return 0;
611}
612
613
614static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
615{
616 struct cxd *ci = ca->data;
617 u8 slotstat;
618
619 mutex_lock(&ci->lock);
620 campoll(ci);
621 read_reg(ci, 0x01, &slotstat);
622 mutex_unlock(&ci->lock);
623
624 return ci->slot_stat;
625}
626
627#ifdef BUFFER_MODE
628static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
629{
630 struct cxd *ci = ca->data;
631 u8 msb, lsb;
632 u16 len;
633
634 mutex_lock(&ci->lock);
635 campoll(ci);
636 mutex_unlock(&ci->lock);
637
638 dev_info(&ci->i2c->dev, "read_data\n");
639 if (!ci->dr)
640 return 0;
641
642 mutex_lock(&ci->lock);
643 read_reg(ci, 0x0f, &msb);
644 read_reg(ci, 0x10, &lsb);
645 len = (msb<<8)|lsb;
646 read_block(ci, 0x12, ebuf, len);
647 ci->dr = 0;
648 mutex_unlock(&ci->lock);
649
650 return len;
651}
652
653static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
654{
655 struct cxd *ci = ca->data;
656
657 mutex_lock(&ci->lock);
658 printk(kern_INFO "write_data %d\n", ecount);
659 write_reg(ci, 0x0d, ecount>>8);
660 write_reg(ci, 0x0e, ecount&0xff);
661 write_block(ci, 0x11, ebuf, ecount);
662 mutex_unlock(&ci->lock);
663 return ecount;
664}
665#endif
666
667static struct dvb_ca_en50221 en_templ = {
668 .read_attribute_mem = read_attribute_mem,
669 .write_attribute_mem = write_attribute_mem,
670 .read_cam_control = read_cam_control,
671 .write_cam_control = write_cam_control,
672 .slot_reset = slot_reset,
673 .slot_shutdown = slot_shutdown,
674 .slot_ts_enable = slot_ts_enable,
675 .poll_slot_status = poll_slot_status,
676#ifdef BUFFER_MODE
677 .read_data = read_data,
678 .write_data = write_data,
679#endif
680
681};
682
683struct dvb_ca_en50221 *cxd2099_attach(struct cxd2099_cfg *cfg,
684 void *priv,
685 struct i2c_adapter *i2c)
686{
687 struct cxd *ci;
688 u8 val;
689
690 if (i2c_read_reg(i2c, cfg->adr, 0, &val) < 0) {
691 dev_info(&i2c->dev, "No CXD2099 detected at %02x\n", cfg->adr);
692 return NULL;
693 }
694
695 ci = kzalloc(sizeof(struct cxd), GFP_KERNEL);
696 if (!ci)
697 return NULL;
698
699 mutex_init(&ci->lock);
700 ci->cfg = *cfg;
701 ci->i2c = i2c;
702 ci->lastaddress = 0xff;
703 ci->clk_reg_b = 0x4a;
704 ci->clk_reg_f = 0x1b;
705
706 ci->en = en_templ;
707 ci->en.data = ci;
708 init(ci);
709 dev_info(&i2c->dev, "Attached CXD2099AR at %02x\n", ci->cfg.adr);
710 return &ci->en;
711}
712EXPORT_SYMBOL(cxd2099_attach);
713
714MODULE_DESCRIPTION("cxd2099");
715MODULE_AUTHOR("Ralph Metzler");
716MODULE_LICENSE("GPL");
717
