linux/drivers/staging/rtl8187se/r8180_core.c
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   1/*
   2   This is part of rtl818x pci OpenSource driver - v 0.1
   3   Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
   4   Released under the terms of GPL (General Public License)
   5
   6   Parts of this driver are based on the GPL part of the official
   7   Realtek driver.
   8
   9   Parts of this driver are based on the rtl8180 driver skeleton
  10   from Patric Schenke & Andres Salomon.
  11
  12   Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  13
  14   Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
  15
  16   RSSI calc function from 'The Deuce'
  17
  18   Some ideas borrowed from the 8139too.c driver included in linux kernel.
  19
  20   We (I?) want to thanks the Authors of those projecs and also the
  21   Ndiswrapper's project Authors.
  22
  23   A big big thanks goes also to Realtek corp. for their help in my attempt to
  24   add RTL8185 and RTL8225 support, and to David Young also.
  25
  26   Power management interface routines.
  27   Written by Mariusz Matuszek.
  28*/
  29
  30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32#undef RX_DONT_PASS_UL
  33#undef DUMMY_RX
  34
  35#include <linux/slab.h>
  36#include <linux/syscalls.h>
  37#include <linux/eeprom_93cx6.h>
  38#include <linux/interrupt.h>
  39#include <linux/proc_fs.h>
  40#include <linux/seq_file.h>
  41
  42#include "r8180_hw.h"
  43#include "r8180.h"
  44#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  45#include "r8180_93cx6.h"   /* Card EEPROM */
  46#include "r8180_wx.h"
  47#include "r8180_dm.h"
  48
  49#include "ieee80211/dot11d.h"
  50
  51static struct pci_device_id rtl8180_pci_id_tbl[] = {
  52        {
  53                .vendor = PCI_VENDOR_ID_REALTEK,
  54                .device = 0x8199,
  55                .subvendor = PCI_ANY_ID,
  56                .subdevice = PCI_ANY_ID,
  57                .driver_data = 0,
  58        },
  59        {
  60                .vendor = 0,
  61                .device = 0,
  62                .subvendor = 0,
  63                .subdevice = 0,
  64                .driver_data = 0,
  65        }
  66};
  67
  68static char ifname[IFNAMSIZ] = "wlan%d";
  69static int hwwep;
  70
  71MODULE_LICENSE("GPL");
  72MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
  73MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  74MODULE_DESCRIPTION("Linux driver for Realtek RTL8187SE WiFi cards");
  75
  76module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
  77module_param(hwwep, int, S_IRUGO|S_IWUSR);
  78
  79MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
  80
  81static int rtl8180_pci_probe(struct pci_dev *pdev,
  82                                       const struct pci_device_id *id);
  83
  84static void rtl8180_pci_remove(struct pci_dev *pdev);
  85
  86static void rtl8180_shutdown(struct pci_dev *pdev)
  87{
  88        struct net_device *dev = pci_get_drvdata(pdev);
  89        if (dev->netdev_ops->ndo_stop)
  90                dev->netdev_ops->ndo_stop(dev);
  91        pci_disable_device(pdev);
  92}
  93
  94static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
  95{
  96        struct net_device *dev = pci_get_drvdata(pdev);
  97
  98        if (!netif_running(dev))
  99                goto out_pci_suspend;
 100
 101        if (dev->netdev_ops->ndo_stop)
 102                dev->netdev_ops->ndo_stop(dev);
 103
 104        netif_device_detach(dev);
 105
 106out_pci_suspend:
 107        pci_save_state(pdev);
 108        pci_disable_device(pdev);
 109        pci_set_power_state(pdev, pci_choose_state(pdev, state));
 110        return 0;
 111}
 112
 113static int rtl8180_resume(struct pci_dev *pdev)
 114{
 115        struct net_device *dev = pci_get_drvdata(pdev);
 116        int err;
 117        u32 val;
 118
 119        pci_set_power_state(pdev, PCI_D0);
 120
 121        err = pci_enable_device(pdev);
 122        if (err) {
 123                dev_err(&pdev->dev, "pci_enable_device failed on resume\n");
 124
 125                return err;
 126        }
 127
 128        pci_restore_state(pdev);
 129
 130        /*
 131         * Suspend/Resume resets the PCI configuration space, so we have to
 132         * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
 133         * from interfering with C3 CPU state. pci_restore_state won't help
 134         * here since it only restores the first 64 bytes pci config header.
 135         */
 136        pci_read_config_dword(pdev, 0x40, &val);
 137        if ((val & 0x0000ff00) != 0)
 138                pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
 139
 140        if (!netif_running(dev))
 141                goto out;
 142
 143        if (dev->netdev_ops->ndo_open)
 144                dev->netdev_ops->ndo_open(dev);
 145
 146        netif_device_attach(dev);
 147out:
 148        return 0;
 149}
 150
 151static struct pci_driver rtl8180_pci_driver = {
 152        .name           = RTL8180_MODULE_NAME,
 153        .id_table       = rtl8180_pci_id_tbl,
 154        .probe          = rtl8180_pci_probe,
 155        .remove         = rtl8180_pci_remove,
 156        .suspend        = rtl8180_suspend,
 157        .resume         = rtl8180_resume,
 158        .shutdown       = rtl8180_shutdown,
 159};
 160
 161u8 read_nic_byte(struct net_device *dev, int x)
 162{
 163        return 0xff&readb((u8 *)dev->mem_start + x);
 164}
 165
 166u32 read_nic_dword(struct net_device *dev, int x)
 167{
 168        return readl((u8 *)dev->mem_start + x);
 169}
 170
 171u16 read_nic_word(struct net_device *dev, int x)
 172{
 173        return readw((u8 *)dev->mem_start + x);
 174}
 175
 176void write_nic_byte(struct net_device *dev, int x, u8 y)
 177{
 178        writeb(y, (u8 *)dev->mem_start + x);
 179        udelay(20);
 180}
 181
 182void write_nic_dword(struct net_device *dev, int x, u32 y)
 183{
 184        writel(y, (u8 *)dev->mem_start + x);
 185        udelay(20);
 186}
 187
 188void write_nic_word(struct net_device *dev, int x, u16 y)
 189{
 190        writew(y, (u8 *)dev->mem_start + x);
 191        udelay(20);
 192}
 193
 194inline void force_pci_posting(struct net_device *dev)
 195{
 196        read_nic_byte(dev, EPROM_CMD);
 197        mb();
 198}
 199
 200irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
 201void set_nic_rxring(struct net_device *dev);
 202void set_nic_txring(struct net_device *dev);
 203static struct net_device_stats *rtl8180_stats(struct net_device *dev);
 204void rtl8180_commit(struct net_device *dev);
 205void rtl8180_start_tx_beacon(struct net_device *dev);
 206
 207static struct proc_dir_entry *rtl8180_proc;
 208
 209static int proc_get_registers(struct seq_file *m, void *v)
 210{
 211        struct net_device *dev = m->private;
 212        int i, n, max = 0xff;
 213
 214        /* This dump the current register page */
 215        for (n = 0; n <= max;) {
 216                seq_printf(m, "\nD:  %2x > ", n);
 217
 218                for (i = 0; i < 16 && n <= max; i++, n++)
 219                        seq_printf(m, "%2x ", read_nic_byte(dev, n));
 220        }
 221        seq_putc(m, '\n');
 222        return 0;
 223}
 224
 225int get_curr_tx_free_desc(struct net_device *dev, int priority);
 226
 227static int proc_get_stats_hw(struct seq_file *m, void *v)
 228{
 229        return 0;
 230}
 231
 232static int proc_get_stats_rx(struct seq_file *m, void *v)
 233{
 234        struct net_device *dev = m->private;
 235        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 236
 237        seq_printf(m,
 238                "RX OK: %lu\n"
 239                "RX Retry: %lu\n"
 240                "RX CRC Error(0-500): %lu\n"
 241                "RX CRC Error(500-1000): %lu\n"
 242                "RX CRC Error(>1000): %lu\n"
 243                "RX ICV Error: %lu\n",
 244                priv->stats.rxint,
 245                priv->stats.rxerr,
 246                priv->stats.rxcrcerrmin,
 247                priv->stats.rxcrcerrmid,
 248                priv->stats.rxcrcerrmax,
 249                priv->stats.rxicverr
 250                );
 251
 252        return 0;
 253}
 254
 255static int proc_get_stats_tx(struct seq_file *m, void *v)
 256{
 257        struct net_device *dev = m->private;
 258        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 259        unsigned long totalOK;
 260
 261        totalOK = priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
 262        seq_printf(m,
 263                "TX OK: %lu\n"
 264                "TX Error: %lu\n"
 265                "TX Retry: %lu\n"
 266                "TX beacon OK: %lu\n"
 267                "TX beacon error: %lu\n",
 268                totalOK,
 269                priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
 270                priv->stats.txretry,
 271                priv->stats.txbeacon,
 272                priv->stats.txbeaconerr
 273        );
 274
 275        return 0;
 276}
 277
 278void rtl8180_proc_module_init(void)
 279{
 280        DMESG("Initializing proc filesystem");
 281        rtl8180_proc = proc_mkdir(RTL8180_MODULE_NAME, init_net.proc_net);
 282}
 283
 284void rtl8180_proc_module_remove(void)
 285{
 286        remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
 287}
 288
 289void rtl8180_proc_remove_one(struct net_device *dev)
 290{
 291        remove_proc_subtree(dev->name, rtl8180_proc);
 292}
 293
 294/*
 295 * seq_file wrappers for procfile show routines.
 296 */
 297static int rtl8180_proc_open(struct inode *inode, struct file *file)
 298{
 299        struct net_device *dev = proc_get_parent_data(inode);
 300        int (*show)(struct seq_file *, void *) = PDE_DATA(inode);
 301
 302        return single_open(file, show, dev);
 303}
 304
 305static const struct file_operations rtl8180_proc_fops = {
 306        .open           = rtl8180_proc_open,
 307        .read           = seq_read,
 308        .llseek         = seq_lseek,
 309        .release        = single_release,
 310};
 311
 312/*
 313 * Table of proc files we need to create.
 314 */
 315struct rtl8180_proc_file {
 316        char name[12];
 317        int (*show)(struct seq_file *, void *);
 318};
 319
 320static const struct rtl8180_proc_file rtl8180_proc_files[] = {
 321        { "stats-hw",   &proc_get_stats_hw },
 322        { "stats-rx",   &proc_get_stats_rx },
 323        { "stats-tx",   &proc_get_stats_tx },
 324        { "registers",  &proc_get_registers },
 325        { "" }
 326};
 327
 328void rtl8180_proc_init_one(struct net_device *dev)
 329{
 330        const struct rtl8180_proc_file *f;
 331        struct proc_dir_entry *dir;
 332
 333        dir = proc_mkdir_data(dev->name, 0, rtl8180_proc, dev);
 334        if (!dir) {
 335                DMESGE("Unable to initialize /proc/net/r8180/%s\n", dev->name);
 336                return;
 337        }
 338
 339        for (f = rtl8180_proc_files; f->name[0]; f++) {
 340                if (!proc_create_data(f->name, S_IFREG | S_IRUGO, dir,
 341                                      &rtl8180_proc_fops, f->show)) {
 342                        DMESGE("Unable to initialize /proc/net/r8180/%s/%s\n",
 343                               dev->name, f->name);
 344                        return;
 345                }
 346        }
 347}
 348
 349/*
 350  FIXME: check if we can use some standard already-existent
 351  data type+functions in kernel
 352*/
 353
 354short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
 355                struct buffer **bufferhead)
 356{
 357        struct buffer *tmp;
 358
 359        if (!*buffer) {
 360
 361                *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 362
 363                if (*buffer == NULL) {
 364                        DMESGE("Failed to kmalloc head of TX/RX struct");
 365                        return -1;
 366                }
 367                (*buffer)->next = *buffer;
 368                (*buffer)->buf = buf;
 369                (*buffer)->dma = dma;
 370                if (bufferhead != NULL)
 371                        (*bufferhead) = (*buffer);
 372                return 0;
 373        }
 374        tmp = *buffer;
 375
 376        while (tmp->next != (*buffer))
 377                tmp = tmp->next;
 378        tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 379        if (tmp->next == NULL) {
 380                DMESGE("Failed to kmalloc TX/RX struct");
 381                return -1;
 382        }
 383        tmp->next->buf = buf;
 384        tmp->next->dma = dma;
 385        tmp->next->next = *buffer;
 386
 387        return 0;
 388}
 389
 390void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short consistent)
 391{
 392
 393        struct buffer *tmp, *next;
 394        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 395        struct pci_dev *pdev = priv->pdev;
 396
 397        if (!*buffer)
 398                return;
 399
 400        tmp = *buffer;
 401
 402        do {
 403                next = tmp->next;
 404                if (consistent) {
 405                        pci_free_consistent(pdev, len,
 406                                    tmp->buf, tmp->dma);
 407                } else {
 408                        pci_unmap_single(pdev, tmp->dma,
 409                        len, PCI_DMA_FROMDEVICE);
 410                        kfree(tmp->buf);
 411                }
 412                kfree(tmp);
 413                tmp = next;
 414        } while (next != *buffer);
 415
 416        *buffer = NULL;
 417}
 418
 419int get_curr_tx_free_desc(struct net_device *dev, int priority)
 420{
 421        struct r8180_priv *priv = ieee80211_priv(dev);
 422        u32 *tail;
 423        u32 *head;
 424        int ret;
 425
 426        switch (priority) {
 427        case MANAGE_PRIORITY:
 428                head = priv->txmapringhead;
 429                tail = priv->txmapringtail;
 430                break;
 431        case BK_PRIORITY:
 432                head = priv->txbkpringhead;
 433                tail = priv->txbkpringtail;
 434                break;
 435        case BE_PRIORITY:
 436                head = priv->txbepringhead;
 437                tail = priv->txbepringtail;
 438                break;
 439        case VI_PRIORITY:
 440                head = priv->txvipringhead;
 441                tail = priv->txvipringtail;
 442                break;
 443        case VO_PRIORITY:
 444                head = priv->txvopringhead;
 445                tail = priv->txvopringtail;
 446                break;
 447        case HI_PRIORITY:
 448                head = priv->txhpringhead;
 449                tail = priv->txhpringtail;
 450                break;
 451        default:
 452                return -1;
 453        }
 454
 455        if (head <= tail)
 456                ret = priv->txringcount - (tail - head)/8;
 457        else
 458                ret = (head - tail)/8;
 459
 460        if (ret > priv->txringcount)
 461                DMESG("BUG");
 462
 463        return ret;
 464}
 465
 466short check_nic_enought_desc(struct net_device *dev, int priority)
 467{
 468        struct r8180_priv *priv = ieee80211_priv(dev);
 469        struct ieee80211_device *ieee = netdev_priv(dev);
 470        int requiredbyte, required;
 471
 472        requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
 473
 474        if (ieee->current_network.QoS_Enable)
 475                requiredbyte += 2;
 476
 477        required = requiredbyte / (priv->txbuffsize-4);
 478
 479        if (requiredbyte % priv->txbuffsize)
 480                required++;
 481
 482        /* for now we keep two free descriptor as a safety boundary
 483         * between the tail and the head
 484         */
 485
 486        return (required+2 < get_curr_tx_free_desc(dev, priority));
 487}
 488
 489void fix_tx_fifo(struct net_device *dev)
 490{
 491        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 492        u32 *tmp;
 493        int i;
 494
 495        for (tmp = priv->txmapring, i = 0;
 496             i < priv->txringcount;
 497             tmp += 8, i++) {
 498                *tmp = *tmp & ~(1<<31);
 499        }
 500
 501        for (tmp = priv->txbkpring, i = 0;
 502             i < priv->txringcount;
 503             tmp += 8, i++) {
 504                *tmp = *tmp & ~(1<<31);
 505        }
 506
 507        for (tmp = priv->txbepring, i = 0;
 508             i < priv->txringcount;
 509             tmp += 8, i++) {
 510                *tmp = *tmp & ~(1<<31);
 511        }
 512        for (tmp = priv->txvipring, i = 0;
 513             i < priv->txringcount;
 514             tmp += 8, i++) {
 515                *tmp = *tmp & ~(1<<31);
 516        }
 517
 518        for (tmp = priv->txvopring, i = 0;
 519             i < priv->txringcount;
 520             tmp += 8, i++) {
 521                *tmp = *tmp & ~(1<<31);
 522        }
 523
 524        for (tmp = priv->txhpring, i = 0;
 525             i < priv->txringcount;
 526             tmp += 8, i++) {
 527                *tmp = *tmp & ~(1<<31);
 528        }
 529
 530        for (tmp = priv->txbeaconring, i = 0;
 531             i < priv->txbeaconcount;
 532             tmp += 8, i++) {
 533                *tmp = *tmp & ~(1<<31);
 534        }
 535
 536        priv->txmapringtail = priv->txmapring;
 537        priv->txmapringhead = priv->txmapring;
 538        priv->txmapbufstail = priv->txmapbufs;
 539
 540        priv->txbkpringtail = priv->txbkpring;
 541        priv->txbkpringhead = priv->txbkpring;
 542        priv->txbkpbufstail = priv->txbkpbufs;
 543
 544        priv->txbepringtail = priv->txbepring;
 545        priv->txbepringhead = priv->txbepring;
 546        priv->txbepbufstail = priv->txbepbufs;
 547
 548        priv->txvipringtail = priv->txvipring;
 549        priv->txvipringhead = priv->txvipring;
 550        priv->txvipbufstail = priv->txvipbufs;
 551
 552        priv->txvopringtail = priv->txvopring;
 553        priv->txvopringhead = priv->txvopring;
 554        priv->txvopbufstail = priv->txvopbufs;
 555
 556        priv->txhpringtail = priv->txhpring;
 557        priv->txhpringhead = priv->txhpring;
 558        priv->txhpbufstail = priv->txhpbufs;
 559
 560        priv->txbeaconringtail = priv->txbeaconring;
 561        priv->txbeaconbufstail = priv->txbeaconbufs;
 562        set_nic_txring(dev);
 563
 564        ieee80211_reset_queue(priv->ieee80211);
 565        priv->ack_tx_to_ieee = 0;
 566}
 567
 568void fix_rx_fifo(struct net_device *dev)
 569{
 570        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 571        u32 *tmp;
 572        struct buffer *rxbuf;
 573        u8 rx_desc_size;
 574
 575        rx_desc_size = 8; /* 4*8 = 32 bytes */
 576
 577        for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
 578             (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
 579             tmp += rx_desc_size, rxbuf = rxbuf->next) {
 580                *(tmp+2) = rxbuf->dma;
 581                *tmp = *tmp & ~0xfff;
 582                *tmp = *tmp | priv->rxbuffersize;
 583                *tmp |= (1<<31);
 584        }
 585
 586        priv->rxringtail = priv->rxring;
 587        priv->rxbuffer = priv->rxbufferhead;
 588        priv->rx_skb_complete = 1;
 589        set_nic_rxring(dev);
 590}
 591
 592void rtl8180_irq_disable(struct net_device *dev)
 593{
 594        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 595
 596        write_nic_dword(dev, IMR, 0);
 597        force_pci_posting(dev);
 598        priv->irq_enabled = 0;
 599}
 600
 601void rtl8180_set_mode(struct net_device *dev, int mode)
 602{
 603        u8 ecmd;
 604
 605        ecmd = read_nic_byte(dev, EPROM_CMD);
 606        ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
 607        ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
 608        ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
 609        ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
 610        write_nic_byte(dev, EPROM_CMD, ecmd);
 611}
 612
 613void rtl8180_beacon_tx_enable(struct net_device *dev);
 614
 615void rtl8180_update_msr(struct net_device *dev)
 616{
 617        struct r8180_priv *priv = ieee80211_priv(dev);
 618        u8 msr;
 619        u32 rxconf;
 620
 621        msr  = read_nic_byte(dev, MSR);
 622        msr &= ~MSR_LINK_MASK;
 623
 624        rxconf = read_nic_dword(dev, RX_CONF);
 625
 626        if (priv->ieee80211->state == IEEE80211_LINKED) {
 627                if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
 628                        msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
 629                else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
 630                        msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
 631                else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
 632                        msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
 633                else
 634                        msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 635                rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
 636
 637        } else {
 638                msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 639                rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
 640        }
 641
 642        write_nic_byte(dev, MSR, msr);
 643        write_nic_dword(dev, RX_CONF, rxconf);
 644}
 645
 646void rtl8180_set_chan(struct net_device *dev, short ch)
 647{
 648        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 649
 650        if ((ch > 14) || (ch < 1)) {
 651                printk("In %s: Invalid chnanel %d\n", __func__, ch);
 652                return;
 653        }
 654
 655        priv->chan = ch;
 656        priv->rf_set_chan(dev, priv->chan);
 657}
 658
 659void set_nic_txring(struct net_device *dev)
 660{
 661        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 662
 663        write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
 664        write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
 665        write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
 666        write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
 667        write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
 668        write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
 669        write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
 670}
 671
 672void rtl8180_beacon_tx_enable(struct net_device *dev)
 673{
 674        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 675
 676        rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 677        priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
 678        write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
 679        rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 680}
 681
 682void rtl8180_beacon_tx_disable(struct net_device *dev)
 683{
 684        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 685
 686        rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 687        priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
 688        write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
 689        rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 690
 691}
 692
 693void rtl8180_rtx_disable(struct net_device *dev)
 694{
 695        u8 cmd;
 696        struct r8180_priv *priv = ieee80211_priv(dev);
 697
 698        cmd = read_nic_byte(dev, CMD);
 699        write_nic_byte(dev, CMD, cmd &
 700                       ~((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
 701        force_pci_posting(dev);
 702        mdelay(10);
 703
 704        if (!priv->rx_skb_complete)
 705                dev_kfree_skb_any(priv->rx_skb);
 706}
 707
 708short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
 709                         int addr)
 710{
 711        int i;
 712        u32 *desc;
 713        u32 *tmp;
 714        dma_addr_t dma_desc, dma_tmp;
 715        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 716        struct pci_dev *pdev = priv->pdev;
 717        void *buf;
 718
 719        if ((bufsize & 0xfff) != bufsize) {
 720                DMESGE("TX buffer allocation too large");
 721                return 0;
 722        }
 723        desc = (u32 *)pci_alloc_consistent(pdev,
 724                                          sizeof(u32)*8*count+256, &dma_desc);
 725        if (desc == NULL)
 726                return -1;
 727
 728        if (dma_desc & 0xff)
 729                /*
 730                 * descriptor's buffer must be 256 byte aligned
 731                 * we shouldn't be here, since we set DMA mask !
 732                 */
 733                WARN(1, "DMA buffer is not aligned\n");
 734
 735        tmp = desc;
 736
 737        for (i = 0; i < count; i++) {
 738                buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
 739                if (buf == NULL)
 740                        return -ENOMEM;
 741
 742                switch (addr) {
 743                case TX_MANAGEPRIORITY_RING_ADDR:
 744                        if (-1 == buffer_add(&(priv->txmapbufs), buf, dma_tmp, NULL)) {
 745                                DMESGE("Unable to allocate mem for buffer NP");
 746                                return -ENOMEM;
 747                        }
 748                        break;
 749                case TX_BKPRIORITY_RING_ADDR:
 750                        if (-1 == buffer_add(&(priv->txbkpbufs), buf, dma_tmp, NULL)) {
 751                                DMESGE("Unable to allocate mem for buffer LP");
 752                                return -ENOMEM;
 753                        }
 754                        break;
 755                case TX_BEPRIORITY_RING_ADDR:
 756                        if (-1 == buffer_add(&(priv->txbepbufs), buf, dma_tmp, NULL)) {
 757                                DMESGE("Unable to allocate mem for buffer NP");
 758                                return -ENOMEM;
 759                        }
 760                        break;
 761                case TX_VIPRIORITY_RING_ADDR:
 762                        if (-1 == buffer_add(&(priv->txvipbufs), buf, dma_tmp, NULL)) {
 763                                DMESGE("Unable to allocate mem for buffer LP");
 764                                return -ENOMEM;
 765                        }
 766                        break;
 767                case TX_VOPRIORITY_RING_ADDR:
 768                        if (-1 == buffer_add(&(priv->txvopbufs), buf, dma_tmp, NULL)) {
 769                                DMESGE("Unable to allocate mem for buffer NP");
 770                                return -ENOMEM;
 771                        }
 772                        break;
 773                case TX_HIGHPRIORITY_RING_ADDR:
 774                        if (-1 == buffer_add(&(priv->txhpbufs), buf, dma_tmp, NULL)) {
 775                                DMESGE("Unable to allocate mem for buffer HP");
 776                                return -ENOMEM;
 777                        }
 778                        break;
 779                case TX_BEACON_RING_ADDR:
 780                        if (-1 == buffer_add(&(priv->txbeaconbufs), buf, dma_tmp, NULL)) {
 781                                DMESGE("Unable to allocate mem for buffer BP");
 782                                return -ENOMEM;
 783                        }
 784                        break;
 785                }
 786                *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
 787                *(tmp+2) = (u32)dma_tmp;
 788                *(tmp+3) = bufsize;
 789
 790                if (i+1 < count)
 791                        *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
 792                else
 793                        *(tmp+4) = (u32)dma_desc;
 794
 795                tmp = tmp+8;
 796        }
 797
 798        switch (addr) {
 799        case TX_MANAGEPRIORITY_RING_ADDR:
 800                priv->txmapringdma = dma_desc;
 801                priv->txmapring = desc;
 802                break;
 803        case TX_BKPRIORITY_RING_ADDR:
 804                priv->txbkpringdma = dma_desc;
 805                priv->txbkpring = desc;
 806                break;
 807        case TX_BEPRIORITY_RING_ADDR:
 808                priv->txbepringdma = dma_desc;
 809                priv->txbepring = desc;
 810                break;
 811        case TX_VIPRIORITY_RING_ADDR:
 812                priv->txvipringdma = dma_desc;
 813                priv->txvipring = desc;
 814                break;
 815        case TX_VOPRIORITY_RING_ADDR:
 816                priv->txvopringdma = dma_desc;
 817                priv->txvopring = desc;
 818                break;
 819        case TX_HIGHPRIORITY_RING_ADDR:
 820                priv->txhpringdma = dma_desc;
 821                priv->txhpring = desc;
 822                break;
 823        case TX_BEACON_RING_ADDR:
 824                priv->txbeaconringdma = dma_desc;
 825                priv->txbeaconring = desc;
 826                break;
 827
 828        }
 829
 830        return 0;
 831}
 832
 833void free_tx_desc_rings(struct net_device *dev)
 834{
 835        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 836        struct pci_dev *pdev = priv->pdev;
 837        int count = priv->txringcount;
 838
 839        pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 840                            priv->txmapring, priv->txmapringdma);
 841        buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
 842
 843        pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 844                            priv->txbkpring, priv->txbkpringdma);
 845        buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
 846
 847        pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 848                            priv->txbepring, priv->txbepringdma);
 849        buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
 850
 851        pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 852                            priv->txvipring, priv->txvipringdma);
 853        buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
 854
 855        pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 856                            priv->txvopring, priv->txvopringdma);
 857        buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
 858
 859        pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 860                            priv->txhpring, priv->txhpringdma);
 861        buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
 862
 863        count = priv->txbeaconcount;
 864        pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 865                            priv->txbeaconring, priv->txbeaconringdma);
 866        buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
 867}
 868
 869void free_rx_desc_ring(struct net_device *dev)
 870{
 871        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 872        struct pci_dev *pdev = priv->pdev;
 873        int count = priv->rxringcount;
 874
 875        pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 876                            priv->rxring, priv->rxringdma);
 877
 878        buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
 879}
 880
 881short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
 882{
 883        int i;
 884        u32 *desc;
 885        u32 *tmp;
 886        dma_addr_t dma_desc, dma_tmp;
 887        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 888        struct pci_dev *pdev = priv->pdev;
 889        void *buf;
 890        u8 rx_desc_size;
 891
 892        rx_desc_size = 8; /* 4*8 = 32 bytes */
 893
 894        if ((bufsize & 0xfff) != bufsize) {
 895                DMESGE("RX buffer allocation too large");
 896                return -1;
 897        }
 898
 899        desc = (u32 *)pci_alloc_consistent(pdev, sizeof(u32)*rx_desc_size*count+256,
 900                                          &dma_desc);
 901
 902        if (dma_desc & 0xff)
 903                /*
 904                 * descriptor's buffer must be 256 byte aligned
 905                 * should never happen since we specify the DMA mask
 906                 */
 907                WARN(1, "DMA buffer is not aligned\n");
 908
 909        priv->rxring = desc;
 910        priv->rxringdma = dma_desc;
 911        tmp = desc;
 912
 913        for (i = 0; i < count; i++) {
 914                buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
 915                if (buf == NULL) {
 916                        DMESGE("Failed to kmalloc RX buffer");
 917                        return -1;
 918                }
 919
 920                dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
 921                                         PCI_DMA_FROMDEVICE);
 922                if (pci_dma_mapping_error(pdev, dma_tmp))
 923                        return -1;
 924                if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
 925                           &(priv->rxbufferhead))) {
 926                        DMESGE("Unable to allocate mem RX buf");
 927                        return -1;
 928                }
 929                *tmp = 0; /* zero pads the header of the descriptor */
 930                *tmp = *tmp | (bufsize&0xfff);
 931                *(tmp+2) = (u32)dma_tmp;
 932                *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
 933
 934                tmp = tmp+rx_desc_size;
 935        }
 936
 937        *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); /* this is the last descriptor */
 938
 939        return 0;
 940}
 941
 942
 943void set_nic_rxring(struct net_device *dev)
 944{
 945        u8 pgreg;
 946        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 947
 948        pgreg = read_nic_byte(dev, PGSELECT);
 949        write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
 950
 951        write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
 952}
 953
 954void rtl8180_reset(struct net_device *dev)
 955{
 956        u8 cr;
 957
 958        rtl8180_irq_disable(dev);
 959
 960        cr = read_nic_byte(dev, CMD);
 961        cr = cr & 2;
 962        cr = cr | (1<<CMD_RST_SHIFT);
 963        write_nic_byte(dev, CMD, cr);
 964
 965        force_pci_posting(dev);
 966
 967        mdelay(200);
 968
 969        if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
 970                DMESGW("Card reset timeout!");
 971        else
 972                DMESG("Card successfully reset");
 973
 974        rtl8180_set_mode(dev, EPROM_CMD_LOAD);
 975        force_pci_posting(dev);
 976        mdelay(200);
 977}
 978
 979inline u16 ieeerate2rtlrate(int rate)
 980{
 981        switch (rate) {
 982        case 10:
 983                return 0;
 984        case 20:
 985                return 1;
 986        case 55:
 987                return 2;
 988        case 110:
 989                return 3;
 990        case 60:
 991                return 4;
 992        case 90:
 993                return 5;
 994        case 120:
 995                return 6;
 996        case 180:
 997                return 7;
 998        case 240:
 999                return 8;
1000        case 360:
1001                return 9;
1002        case 480:
1003                return 10;
1004        case 540:
1005                return 11;
1006        default:
1007                return 3;
1008        }
1009}
1010
1011static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1012
1013inline u16 rtl8180_rate2rate(short rate)
1014{
1015        if (rate > 12)
1016                return 10;
1017        return rtl_rate[rate];
1018}
1019
1020inline u8 rtl8180_IsWirelessBMode(u16 rate)
1021{
1022        if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1023                return 1;
1024        else
1025                return 0;
1026}
1027
1028u16 N_DBPSOfRate(u16 DataRate);
1029
1030u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1031                  u8 bShortPreamble)
1032{
1033        u16     FrameTime;
1034        u16     N_DBPS;
1035        u16     Ceiling;
1036
1037        if (rtl8180_IsWirelessBMode(DataRate)) {
1038                if (bManagementFrame || !bShortPreamble || DataRate == 10)
1039                        /* long preamble */
1040                        FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1041                else
1042                        /* short preamble */
1043                        FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1044
1045                if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1046                        FrameTime++;
1047        } else {        /* 802.11g DSSS-OFDM PLCP length field calculation. */
1048                N_DBPS = N_DBPSOfRate(DataRate);
1049                Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1050                                + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1051                FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1052        }
1053        return FrameTime;
1054}
1055
1056u16 N_DBPSOfRate(u16 DataRate)
1057{
1058         u16 N_DBPS = 24;
1059
1060        switch (DataRate) {
1061        case 60:
1062                N_DBPS = 24;
1063                break;
1064        case 90:
1065                N_DBPS = 36;
1066                break;
1067        case 120:
1068                N_DBPS = 48;
1069                break;
1070        case 180:
1071                N_DBPS = 72;
1072                break;
1073        case 240:
1074                N_DBPS = 96;
1075                break;
1076        case 360:
1077                N_DBPS = 144;
1078                break;
1079        case 480:
1080                N_DBPS = 192;
1081                break;
1082        case 540:
1083                N_DBPS = 216;
1084                break;
1085        default:
1086                break;
1087        }
1088
1089        return N_DBPS;
1090}
1091
1092/*
1093 * For Netgear case, they want good-looking signal strength.
1094 */
1095long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1096{
1097        long RetSS;
1098
1099        /* Step 1. Scale mapping. */
1100        if (CurrSS >= 71 && CurrSS <= 100)
1101                RetSS = 90 + ((CurrSS - 70) / 3);
1102        else if (CurrSS >= 41 && CurrSS <= 70)
1103                RetSS = 78 + ((CurrSS - 40) / 3);
1104        else if (CurrSS >= 31 && CurrSS <= 40)
1105                RetSS = 66 + (CurrSS - 30);
1106        else if (CurrSS >= 21 && CurrSS <= 30)
1107                RetSS = 54 + (CurrSS - 20);
1108        else if (CurrSS >= 5 && CurrSS <= 20)
1109                RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1110        else if (CurrSS == 4)
1111                RetSS = 36;
1112        else if (CurrSS == 3)
1113                RetSS = 27;
1114        else if (CurrSS == 2)
1115                RetSS = 18;
1116        else if (CurrSS == 1)
1117                RetSS = 9;
1118        else
1119                RetSS = CurrSS;
1120
1121        /* Step 2. Smoothing. */
1122        if (LastSS > 0)
1123                RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1124
1125        return RetSS;
1126}
1127
1128/*
1129 * Translate 0-100 signal strength index into dBm.
1130 */
1131long TranslateToDbm8185(u8 SignalStrengthIndex)
1132{
1133        long SignalPower;
1134
1135        /* Translate to dBm (x=0.5y-95). */
1136        SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1137        SignalPower -= 95;
1138
1139        return SignalPower;
1140}
1141
1142/*
1143 * Perform signal smoothing for dynamic mechanism.
1144 * This is different with PerformSignalSmoothing8185 in smoothing formula.
1145 * No dramatic adjustion is apply because dynamic mechanism need some degree
1146 * of correctness. Ported from 8187B.
1147 */
1148void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1149                                           bool bCckRate)
1150{
1151        /* Determin the current packet is CCK rate. */
1152        priv->bCurCCKPkt = bCckRate;
1153
1154        if (priv->UndecoratedSmoothedSS >= 0)
1155                priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) +
1156                                               (priv->SignalStrength * 10)) / 6;
1157        else
1158                priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1159
1160        priv->UndercorateSmoothedRxPower = ((priv->UndercorateSmoothedRxPower * 50) +
1161                                            (priv->RxPower * 11)) / 60;
1162
1163        if (bCckRate)
1164                priv->CurCCKRSSI = priv->RSSI;
1165        else
1166                priv->CurCCKRSSI = 0;
1167}
1168
1169
1170/*
1171 * This is rough RX isr handling routine
1172 */
1173void rtl8180_rx(struct net_device *dev)
1174{
1175        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1176        struct sk_buff *tmp_skb;
1177        short first, last;
1178        u32 len;
1179        int lastlen;
1180        unsigned char quality, signal;
1181        u8 rate;
1182        u32 *tmp, *tmp2;
1183        u8 rx_desc_size;
1184        u8 padding;
1185        char rxpower = 0;
1186        u32 RXAGC = 0;
1187        long RxAGC_dBm = 0;
1188        u8      LNA = 0, BB = 0;
1189        u8      LNA_gain[4] = {02, 17, 29, 39};
1190        u8  Antenna = 0;
1191        struct ieee80211_hdr_4addr *hdr;
1192        u16 fc, type;
1193        u8 bHwError = 0, bCRC = 0, bICV = 0;
1194        bool    bCckRate = false;
1195        u8     RSSI = 0;
1196        long    SignalStrengthIndex = 0;
1197        struct ieee80211_rx_stats stats = {
1198                .signal = 0,
1199                .noise = -98,
1200                .rate = 0,
1201                .freq = IEEE80211_24GHZ_BAND,
1202        };
1203
1204        stats.nic_type = NIC_8185B;
1205        rx_desc_size = 8;
1206
1207        if ((*(priv->rxringtail)) & (1<<31)) {
1208                /* we have got an RX int, but the descriptor
1209                 * we are pointing is empty */
1210
1211                priv->stats.rxnodata++;
1212                priv->ieee80211->stats.rx_errors++;
1213
1214                tmp2 = NULL;
1215                tmp = priv->rxringtail;
1216                do {
1217                        if (tmp == priv->rxring)
1218                                tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1219                        else
1220                                tmp -= rx_desc_size;
1221
1222                        if (!(*tmp & (1<<31)))
1223                                tmp2 = tmp;
1224                } while (tmp != priv->rxring);
1225
1226                if (tmp2)
1227                        priv->rxringtail = tmp2;
1228        }
1229
1230        /* while there are filled descriptors */
1231        while (!(*(priv->rxringtail) & (1<<31))) {
1232                if (*(priv->rxringtail) & (1<<26))
1233                        DMESGW("RX buffer overflow");
1234                if (*(priv->rxringtail) & (1<<12))
1235                        priv->stats.rxicverr++;
1236
1237                if (*(priv->rxringtail) & (1<<27)) {
1238                        priv->stats.rxdmafail++;
1239                        /* DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); */
1240                        goto drop;
1241                }
1242
1243                pci_dma_sync_single_for_cpu(priv->pdev,
1244                                    priv->rxbuffer->dma,
1245                                    priv->rxbuffersize * sizeof(u8),
1246                                    PCI_DMA_FROMDEVICE);
1247
1248                first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1249                if (first)
1250                        priv->rx_prevlen = 0;
1251
1252                last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1253                if (last) {
1254                        lastlen = ((*priv->rxringtail) & 0xfff);
1255
1256                        /* if the last descriptor (that should
1257                         * tell us the total packet len) tell
1258                         * us something less than the descriptors
1259                         * len we had until now, then there is some
1260                         * problem..
1261                         * workaround to prevent kernel panic
1262                         */
1263                        if (lastlen < priv->rx_prevlen)
1264                                len = 0;
1265                        else
1266                                len = lastlen-priv->rx_prevlen;
1267
1268                        if (*(priv->rxringtail) & (1<<13)) {
1269                                if ((*(priv->rxringtail) & 0xfff) < 500)
1270                                        priv->stats.rxcrcerrmin++;
1271                                else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1272                                        priv->stats.rxcrcerrmax++;
1273                                else
1274                                        priv->stats.rxcrcerrmid++;
1275
1276                        }
1277
1278                } else {
1279                        len = priv->rxbuffersize;
1280                }
1281
1282                if (first && last) {
1283                        padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1284                } else if (first) {
1285                        padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1286                        if (padding)
1287                                len -= 2;
1288                } else {
1289                        padding = 0;
1290                }
1291                padding = 0;
1292                priv->rx_prevlen += len;
1293
1294                if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1295                        /* HW is probably passing several buggy frames
1296                        * without FD or LD flag set.
1297                        * Throw this garbage away to prevent skb
1298                        * memory exhausting
1299                        */
1300                        if (!priv->rx_skb_complete)
1301                                dev_kfree_skb_any(priv->rx_skb);
1302                        priv->rx_skb_complete = 1;
1303                }
1304
1305                signal = (unsigned char)(((*(priv->rxringtail+3)) & (0x00ff0000))>>16);
1306                signal = (signal & 0xfe) >> 1;
1307
1308                quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1309
1310                stats.mac_time[0] = *(priv->rxringtail+1);
1311                stats.mac_time[1] = *(priv->rxringtail+2);
1312                rxpower = ((char)(((*(priv->rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1313                RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1314
1315                rate = ((*(priv->rxringtail)) &
1316                        ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1317
1318                stats.rate = rtl8180_rate2rate(rate);
1319                Antenna = (((*(priv->rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1320                if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1321                        RxAGC_dBm = rxpower+1;  /* bias */
1322                } else { /* CCK rate. */
1323                        RxAGC_dBm = signal; /* bit 0 discard */
1324
1325                        LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
1326                        BB  = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
1327
1328                        RxAGC_dBm = -(LNA_gain[LNA] + (BB*2)); /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
1329
1330                        RxAGC_dBm += 4; /* bias */
1331                }
1332
1333                if (RxAGC_dBm & 0x80) /* absolute value */
1334                        RXAGC = ~(RxAGC_dBm)+1;
1335                bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1336                /* Translate RXAGC into 1-100. */
1337                if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1338                        if (RXAGC > 90)
1339                                RXAGC = 90;
1340                        else if (RXAGC < 25)
1341                                RXAGC = 25;
1342                        RXAGC = (90-RXAGC)*100/65;
1343                } else { /* CCK rate. */
1344                        if (RXAGC > 95)
1345                                RXAGC = 95;
1346                        else if (RXAGC < 30)
1347                                RXAGC = 30;
1348                        RXAGC = (95-RXAGC)*100/65;
1349                }
1350                priv->SignalStrength = (u8)RXAGC;
1351                priv->RecvSignalPower = RxAGC_dBm;
1352                priv->RxPower = rxpower;
1353                priv->RSSI = RSSI;
1354                /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1355                if (quality >= 127)
1356                        quality = 1; /*0; */ /* 0 will cause epc to show signal zero , walk around now; */
1357                else if (quality < 27)
1358                        quality = 100;
1359                else
1360                        quality = 127 - quality;
1361                priv->SignalQuality = quality;
1362
1363                stats.signal = (u8)quality; /*priv->wstats.qual.level = priv->SignalStrength; */
1364                stats.signalstrength = RXAGC;
1365                if (stats.signalstrength > 100)
1366                        stats.signalstrength = 100;
1367                stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1368                /* printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); */
1369                stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1370                stats.noise = priv->wstats.qual.noise = 100 - priv->wstats.qual.qual;
1371                bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) |
1372                           (((*(priv->rxringtail)) & (0x04000000)) != 0) |
1373                           (((*(priv->rxringtail)) & (0x08000000)) != 0) |
1374                           (((~(*(priv->rxringtail))) & (0x10000000)) != 0) |
1375                           (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1376                bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1377                bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1378                hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1379                    fc = le16_to_cpu(hdr->frame_ctl);
1380                type = WLAN_FC_GET_TYPE(fc);
1381
1382                if (IEEE80211_FTYPE_CTL != type &&
1383                    !bHwError && !bCRC && !bICV &&
1384                    eqMacAddr(priv->ieee80211->current_network.bssid,
1385                        fc & IEEE80211_FCTL_TODS ? hdr->addr1 :
1386                        fc & IEEE80211_FCTL_FROMDS ? hdr->addr2 :
1387                        hdr->addr3)) {
1388
1389                        /* Perform signal smoothing for dynamic
1390                         * mechanism on demand. This is different
1391                         * with PerformSignalSmoothing8185 in smoothing
1392                         * fomula. No dramatic adjustion is apply
1393                         * because dynamic mechanism need some degree
1394                         * of correctness. */
1395                        PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1396
1397                        /* For good-looking singal strength. */
1398                        SignalStrengthIndex = NetgearSignalStrengthTranslate(
1399                                                        priv->LastSignalStrengthInPercent,
1400                                                        priv->SignalStrength);
1401
1402                        priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1403                        priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1404                /*
1405                 * We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
1406                 * so we record the correct power here.
1407                 */
1408                        priv->Stats_SignalQuality = (long)(priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1409                        priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower - 1) / 6;
1410
1411                /* Figure out which antenna that received the last packet. */
1412                        priv->LastRxPktAntenna = Antenna ? 1 : 0; /* 0: aux, 1: main. */
1413                        SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1414                }
1415
1416                if (first) {
1417                        if (!priv->rx_skb_complete) {
1418                                /* seems that HW sometimes fails to receive and
1419                                   doesn't provide the last descriptor */
1420                                dev_kfree_skb_any(priv->rx_skb);
1421                                priv->stats.rxnolast++;
1422                        }
1423                        priv->rx_skb = dev_alloc_skb(len+2);
1424                        if (!priv->rx_skb)
1425                                goto drop;
1426
1427                        priv->rx_skb_complete = 0;
1428                        priv->rx_skb->dev = dev;
1429                } else {
1430                        /* if we are here we should have already RXed
1431                        * the first frame.
1432                        * If we get here and the skb is not allocated then
1433                        * we have just throw out garbage (skb not allocated)
1434                        * and we are still rxing garbage....
1435                        */
1436                        if (!priv->rx_skb_complete) {
1437
1438                                tmp_skb = dev_alloc_skb(priv->rx_skb->len+len+2);
1439
1440                                if (!tmp_skb)
1441                                        goto drop;
1442
1443                                tmp_skb->dev = dev;
1444
1445                                memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1446                                        priv->rx_skb->data,
1447                                        priv->rx_skb->len);
1448
1449                                dev_kfree_skb_any(priv->rx_skb);
1450
1451                                priv->rx_skb = tmp_skb;
1452                        }
1453                }
1454
1455                if (!priv->rx_skb_complete) {
1456                        if (padding) {
1457                                memcpy(skb_put(priv->rx_skb, len),
1458                                        (((unsigned char *)priv->rxbuffer->buf) + 2), len);
1459                        } else {
1460                                memcpy(skb_put(priv->rx_skb, len),
1461                                        priv->rxbuffer->buf, len);
1462                        }
1463                }
1464
1465                if (last && !priv->rx_skb_complete) {
1466                        if (priv->rx_skb->len > 4)
1467                                skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1468                        if (!ieee80211_rtl_rx(priv->ieee80211,
1469                                         priv->rx_skb, &stats))
1470                                dev_kfree_skb_any(priv->rx_skb);
1471                        priv->rx_skb_complete = 1;
1472                }
1473
1474                pci_dma_sync_single_for_device(priv->pdev,
1475                                    priv->rxbuffer->dma,
1476                                    priv->rxbuffersize * sizeof(u8),
1477                                    PCI_DMA_FROMDEVICE);
1478
1479drop: /* this is used when we have not enough mem */
1480                /* restore the descriptor */
1481                *(priv->rxringtail+2) = priv->rxbuffer->dma;
1482                *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1483                *(priv->rxringtail) =
1484                        *(priv->rxringtail) | priv->rxbuffersize;
1485
1486                *(priv->rxringtail) =
1487                        *(priv->rxringtail) | (1<<31);
1488
1489                priv->rxringtail += rx_desc_size;
1490                if (priv->rxringtail >=
1491                   (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1492                        priv->rxringtail = priv->rxring;
1493
1494                priv->rxbuffer = (priv->rxbuffer->next);
1495        }
1496}
1497
1498
1499void rtl8180_dma_kick(struct net_device *dev, int priority)
1500{
1501        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1502
1503        rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1504        write_nic_byte(dev, TX_DMA_POLLING,
1505                        (1 << (priority + 1)) | priv->dma_poll_mask);
1506        rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1507
1508        force_pci_posting(dev);
1509}
1510
1511void rtl8180_data_hard_stop(struct net_device *dev)
1512{
1513        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1514
1515        rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1516        priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1517        write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1518        rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1519}
1520
1521void rtl8180_data_hard_resume(struct net_device *dev)
1522{
1523        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1524
1525        rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1526        priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1527        write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1528        rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1529}
1530
1531/*
1532 * This function TX data frames when the ieee80211 stack requires this.
1533 * It checks also if we need to stop the ieee tx queue, eventually do it
1534 */
1535void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int
1536rate) {
1537        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1538        int mode;
1539        struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
1540        short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1541        unsigned long flags;
1542        int priority;
1543
1544        mode = priv->ieee80211->iw_mode;
1545
1546        rate = ieeerate2rtlrate(rate);
1547        /*
1548         * This function doesn't require lock because we make
1549         * sure it's called with the tx_lock already acquired.
1550         * this come from the kernel's hard_xmit callback (through
1551         * the ieee stack, or from the try_wake_queue (again through
1552         * the ieee stack.
1553         */
1554        priority = AC2Q(skb->priority);
1555        spin_lock_irqsave(&priv->tx_lock, flags);
1556
1557        if (priv->ieee80211->bHwRadioOff) {
1558                spin_unlock_irqrestore(&priv->tx_lock, flags);
1559
1560                return;
1561        }
1562
1563        if (!check_nic_enought_desc(dev, priority)) {
1564                DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1565                        get_curr_tx_free_desc(dev, priority));
1566                ieee80211_rtl_stop_queue(priv->ieee80211);
1567        }
1568        rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1569        if (!check_nic_enought_desc(dev, priority))
1570                ieee80211_rtl_stop_queue(priv->ieee80211);
1571
1572        spin_unlock_irqrestore(&priv->tx_lock, flags);
1573}
1574
1575/*
1576 * This is a rough attempt to TX a frame
1577 * This is called by the ieee 80211 stack to TX management frames.
1578 * If the ring is full packets are dropped (for data frame the queue
1579 * is stopped before this can happen). For this reason it is better
1580 * if the descriptors are larger than the largest management frame
1581 * we intend to TX: i'm unsure what the HW does if it will not find
1582 * the last fragment of a frame because it has been dropped...
1583 * Since queues for Management and Data frames are different we
1584 * might use a different lock than tx_lock (for example mgmt_tx_lock)
1585 */
1586/* these function may loop if invoked with 0 descriptors or 0 len buffer */
1587int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1588{
1589        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1590        unsigned long flags;
1591        int priority;
1592
1593        priority = MANAGE_PRIORITY;
1594
1595        spin_lock_irqsave(&priv->tx_lock, flags);
1596
1597        if (priv->ieee80211->bHwRadioOff) {
1598                spin_unlock_irqrestore(&priv->tx_lock, flags);
1599                dev_kfree_skb_any(skb);
1600                return NETDEV_TX_OK;
1601        }
1602
1603        rtl8180_tx(dev, skb->data, skb->len, priority,
1604                0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1605
1606        priv->ieee80211->stats.tx_bytes += skb->len;
1607        priv->ieee80211->stats.tx_packets++;
1608        spin_unlock_irqrestore(&priv->tx_lock, flags);
1609
1610        dev_kfree_skb_any(skb);
1611        return NETDEV_TX_OK;
1612}
1613
1614/* longpre 144+48 shortpre 72+24 */
1615u16 rtl8180_len2duration(u32 len, short rate, short *ext)
1616{
1617        u16 duration;
1618        u16 drift;
1619        *ext = 0;
1620
1621        switch (rate) {
1622        case 0: /* 1mbps */
1623                *ext = 0;
1624                duration = ((len+4)<<4) / 0x2;
1625                drift = ((len+4)<<4) % 0x2;
1626                if (drift == 0)
1627                        break;
1628                duration++;
1629                break;
1630        case 1: /* 2mbps */
1631                *ext = 0;
1632                duration = ((len+4)<<4) / 0x4;
1633                drift = ((len+4)<<4) % 0x4;
1634                if (drift == 0)
1635                        break;
1636                duration++;
1637                break;
1638        case 2: /* 5.5mbps */
1639                *ext = 0;
1640                duration = ((len+4)<<4) / 0xb;
1641                drift = ((len+4)<<4) % 0xb;
1642                if (drift == 0)
1643                        break;
1644                duration++;
1645                break;
1646        default:
1647        case 3: /* 11mbps */
1648                *ext = 0;
1649                duration = ((len+4)<<4) / 0x16;
1650                drift = ((len+4)<<4) % 0x16;
1651                if (drift == 0)
1652                        break;
1653                duration++;
1654                if (drift > 6)
1655                        break;
1656                *ext = 1;
1657                break;
1658        }
1659
1660        return duration;
1661}
1662
1663void rtl8180_prepare_beacon(struct net_device *dev)
1664{
1665        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1666        struct sk_buff *skb;
1667
1668        u16 word  = read_nic_word(dev, BcnItv);
1669        word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
1670        word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval); /* 0x64; */
1671        write_nic_word(dev, BcnItv, word);
1672
1673        skb = ieee80211_get_beacon(priv->ieee80211);
1674        if (skb) {
1675                rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1676                        0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1677                dev_kfree_skb_any(skb);
1678        }
1679}
1680
1681/*
1682 * This function do the real dirty work: it enqueues a TX command
1683 * descriptor in the ring buffer, copyes the frame in a TX buffer
1684 * and kicks the NIC to ensure it does the DMA transfer.
1685 */
1686short rtl8180_tx(struct net_device *dev, u8 *txbuf, int len, int priority,
1687                 short morefrag, short descfrag, int rate)
1688{
1689        struct r8180_priv *priv = ieee80211_priv(dev);
1690        u32 *tail, *temp_tail;
1691        u32 *begin;
1692        u32 *buf;
1693        int i;
1694        int remain;
1695        int buflen;
1696        int count;
1697        struct buffer *buflist;
1698        struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1699        u8 dest[ETH_ALEN];
1700        u8                      bUseShortPreamble = 0;
1701        u8                      bCTSEnable = 0;
1702        u8                      bRTSEnable = 0;
1703        u16                     Duration = 0;
1704        u16                     RtsDur = 0;
1705        u16                     ThisFrameTime = 0;
1706        u16                     TxDescDuration = 0;
1707        u8                      ownbit_flag = false;
1708
1709        switch (priority) {
1710        case MANAGE_PRIORITY:
1711                tail = priv->txmapringtail;
1712                begin = priv->txmapring;
1713                buflist = priv->txmapbufstail;
1714                count = priv->txringcount;
1715                break;
1716        case BK_PRIORITY:
1717                tail = priv->txbkpringtail;
1718                begin = priv->txbkpring;
1719                buflist = priv->txbkpbufstail;
1720                count = priv->txringcount;
1721                break;
1722        case BE_PRIORITY:
1723                tail = priv->txbepringtail;
1724                begin = priv->txbepring;
1725                buflist = priv->txbepbufstail;
1726                count = priv->txringcount;
1727                break;
1728        case VI_PRIORITY:
1729                tail = priv->txvipringtail;
1730                begin = priv->txvipring;
1731                buflist = priv->txvipbufstail;
1732                count = priv->txringcount;
1733                break;
1734        case VO_PRIORITY:
1735                tail = priv->txvopringtail;
1736                begin = priv->txvopring;
1737                buflist = priv->txvopbufstail;
1738                count = priv->txringcount;
1739                break;
1740        case HI_PRIORITY:
1741                tail = priv->txhpringtail;
1742                begin = priv->txhpring;
1743                buflist = priv->txhpbufstail;
1744                count = priv->txringcount;
1745                break;
1746        case BEACON_PRIORITY:
1747                tail = priv->txbeaconringtail;
1748                begin = priv->txbeaconring;
1749                buflist = priv->txbeaconbufstail;
1750                count = priv->txbeaconcount;
1751                break;
1752        default:
1753                return -1;
1754                break;
1755        }
1756
1757                memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
1758                if (is_multicast_ether_addr(dest)) {
1759                        Duration = 0;
1760                        RtsDur = 0;
1761                        bRTSEnable = 0;
1762                        bCTSEnable = 0;
1763
1764                        ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
1765                                                      0, bUseShortPreamble);
1766                        TxDescDuration = ThisFrameTime;
1767                } else { /* Unicast packet */
1768                        u16 AckTime;
1769
1770                        /* YJ,add,080828,for Keep alive */
1771                        priv->NumTxUnicast++;
1772
1773                        /* Figure out ACK rate according to BSS basic rate
1774                         * and Tx rate. */
1775                        AckTime = ComputeTxTime(14, 10, 0, 0);  /* AckCTSLng = 14 use 1M bps send */
1776
1777                        if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
1778                                u16 RtsTime, CtsTime;
1779                                /* u16 CtsRate; */
1780                                bRTSEnable = 1;
1781                                bCTSEnable = 0;
1782
1783                                /* Rate and time required for RTS. */
1784                                RtsTime = ComputeTxTime(sAckCtsLng/8, priv->ieee80211->basic_rate, 0, 0);
1785                                /* Rate and time required for CTS. */
1786                                CtsTime = ComputeTxTime(14, 10, 0, 0);  /* AckCTSLng = 14 use 1M bps send */
1787
1788                                /* Figure out time required to transmit this frame. */
1789                                ThisFrameTime = ComputeTxTime(len + sCrcLng,
1790                                                rtl8180_rate2rate(rate),
1791                                                0,
1792                                                bUseShortPreamble);
1793
1794                                /* RTS-CTS-ThisFrame-ACK. */
1795                                RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
1796
1797                                TxDescDuration = RtsTime + RtsDur;
1798                        } else { /* Normal case. */
1799                                bCTSEnable = 0;
1800                                bRTSEnable = 0;
1801                                RtsDur = 0;
1802
1803                                ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
1804                                                              0, bUseShortPreamble);
1805                                TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
1806                        }
1807
1808                        if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) {
1809                                /* ThisFrame-ACK. */
1810                                Duration = aSifsTime + AckTime;
1811                        } else { /* One or more fragments remained. */
1812                                u16 NextFragTime;
1813                                NextFragTime = ComputeTxTime(len + sCrcLng, /* pretend following packet length equal current packet */
1814                                                rtl8180_rate2rate(rate),
1815                                                0,
1816                                                bUseShortPreamble);
1817
1818                                /* ThisFrag-ACk-NextFrag-ACK. */
1819                                Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
1820                        }
1821
1822                } /* End of Unicast packet */
1823
1824                frag_hdr->duration_id = Duration;
1825
1826        buflen = priv->txbuffsize;
1827        remain = len;
1828        temp_tail = tail;
1829
1830        while (remain != 0) {
1831                mb();
1832                if (!buflist) {
1833                        DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
1834                        return -1;
1835                }
1836                buf = buflist->buf;
1837
1838                if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
1839                        DMESGW("No more TX desc, returning %x of %x",
1840                               remain, len);
1841                        priv->stats.txrdu++;
1842                        return remain;
1843                }
1844
1845                *tail = 0; /* zeroes header */
1846                *(tail+1) = 0;
1847                *(tail+3) = 0;
1848                *(tail+5) = 0;
1849                *(tail+6) = 0;
1850                *(tail+7) = 0;
1851
1852                /* FIXME: this should be triggered by HW encryption parameters.*/
1853                *tail |= (1<<15); /* no encrypt */
1854
1855                if (remain == len && !descfrag) {
1856                        ownbit_flag = false;
1857                        *tail = *tail | (1<<29) ; /* fist segment of the packet */
1858                        *tail = *tail | (len);
1859                } else {
1860                        ownbit_flag = true;
1861                }
1862
1863                for (i = 0; i < buflen && remain > 0; i++, remain--) {
1864                        ((u8 *)buf)[i] = txbuf[i]; /* copy data into descriptor pointed DMAble buffer */
1865                        if (remain == 4 && i+4 >= buflen)
1866                                break;
1867                        /* ensure the last desc has at least 4 bytes payload */
1868
1869                }
1870                txbuf = txbuf + i;
1871                *(tail+3) = *(tail+3) & ~0xfff;
1872                *(tail+3) = *(tail+3) | i; /* buffer length */
1873                /* Use short preamble or not */
1874                if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
1875                        if (priv->plcp_preamble_mode == 1 && rate != 0) /*  short mode now, not long! */
1876                        ; /* *tail |= (1<<16); */                               /* enable short preamble mode. */
1877
1878                if (bCTSEnable)
1879                        *tail |= (1<<18);
1880
1881                if (bRTSEnable) { /* rts enable */
1882                        *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19); /* RTS RATE */
1883                        *tail |= (1<<23); /* rts enable */
1884                        *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
1885                }
1886                *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
1887                /* *(tail+3) |= (0xe6<<16); */
1888                *(tail+5) |= (11<<8); /* (priv->retry_data<<8); */ /* retry lim; */
1889
1890                *tail = *tail | ((rate&0xf) << 24);
1891
1892                if (morefrag)
1893                        *tail = (*tail) | (1<<17); /* more fragment */
1894                if (!remain)
1895                        *tail = (*tail) | (1<<28); /* last segment of frame */
1896
1897                *(tail+5) = *(tail+5)|(2<<27);
1898                *(tail+7) = *(tail+7)|(1<<4);
1899
1900                wmb();
1901                if (ownbit_flag)
1902                        *tail = *tail | (1<<31); /* descriptor ready to be txed */
1903
1904                if ((tail - begin)/8 == count-1)
1905                        tail = begin;
1906                else
1907                        tail = tail+8;
1908
1909                buflist = buflist->next;
1910
1911                mb();
1912
1913                switch (priority) {
1914                case MANAGE_PRIORITY:
1915                        priv->txmapringtail = tail;
1916                        priv->txmapbufstail = buflist;
1917                        break;
1918                case BK_PRIORITY:
1919                        priv->txbkpringtail = tail;
1920                        priv->txbkpbufstail = buflist;
1921                        break;
1922                case BE_PRIORITY:
1923                        priv->txbepringtail = tail;
1924                        priv->txbepbufstail = buflist;
1925                        break;
1926                case VI_PRIORITY:
1927                        priv->txvipringtail = tail;
1928                        priv->txvipbufstail = buflist;
1929                        break;
1930                case VO_PRIORITY:
1931                        priv->txvopringtail = tail;
1932                        priv->txvopbufstail = buflist;
1933                        break;
1934                case HI_PRIORITY:
1935                        priv->txhpringtail = tail;
1936                        priv->txhpbufstail = buflist;
1937                        break;
1938                case BEACON_PRIORITY:
1939                        /*
1940                         * The HW seems to be happy with the 1st
1941                         * descriptor filled and the 2nd empty...
1942                         * So always update descriptor 1 and never
1943                         * touch 2nd
1944                         */
1945                        break;
1946                }
1947        }
1948        *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
1949        rtl8180_dma_kick(dev, priority);
1950
1951        return 0;
1952}
1953
1954void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
1955
1956void rtl8180_link_change(struct net_device *dev)
1957{
1958        struct r8180_priv *priv = ieee80211_priv(dev);
1959        u16 beacon_interval;
1960        struct ieee80211_network *net = &priv->ieee80211->current_network;
1961
1962        rtl8180_update_msr(dev);
1963
1964        rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1965
1966        write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
1967        write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
1968
1969        beacon_interval  = read_nic_word(dev, BEACON_INTERVAL);
1970        beacon_interval &= ~BEACON_INTERVAL_MASK;
1971        beacon_interval |= net->beacon_interval;
1972        write_nic_word(dev, BEACON_INTERVAL, beacon_interval);
1973
1974        rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1975
1976        rtl8180_set_chan(dev, priv->chan);
1977}
1978
1979void rtl8180_rq_tx_ack(struct net_device *dev)
1980{
1981
1982        struct r8180_priv *priv = ieee80211_priv(dev);
1983
1984        write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
1985        priv->ack_tx_to_ieee = 1;
1986}
1987
1988short rtl8180_is_tx_queue_empty(struct net_device *dev)
1989{
1990
1991        struct r8180_priv *priv = ieee80211_priv(dev);
1992        u32 *d;
1993
1994        for (d = priv->txmapring;
1995                d < priv->txmapring + priv->txringcount; d += 8)
1996                        if (*d & (1<<31))
1997                                return 0;
1998
1999        for (d = priv->txbkpring;
2000                d < priv->txbkpring + priv->txringcount; d += 8)
2001                        if (*d & (1<<31))
2002                                return 0;
2003
2004        for (d = priv->txbepring;
2005                d < priv->txbepring + priv->txringcount; d += 8)
2006                        if (*d & (1<<31))
2007                                return 0;
2008
2009        for (d = priv->txvipring;
2010                d < priv->txvipring + priv->txringcount; d += 8)
2011                        if (*d & (1<<31))
2012                                return 0;
2013
2014        for (d = priv->txvopring;
2015                d < priv->txvopring + priv->txringcount; d += 8)
2016                        if (*d & (1<<31))
2017                                return 0;
2018
2019        for (d = priv->txhpring;
2020                d < priv->txhpring + priv->txringcount; d += 8)
2021                        if (*d & (1<<31))
2022                                return 0;
2023        return 1;
2024}
2025
2026void rtl8180_hw_wakeup(struct net_device *dev)
2027{
2028        unsigned long flags;
2029        struct r8180_priv *priv = ieee80211_priv(dev);
2030
2031        spin_lock_irqsave(&priv->ps_lock, flags);
2032        write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2033        if (priv->rf_wakeup)
2034                priv->rf_wakeup(dev);
2035        spin_unlock_irqrestore(&priv->ps_lock, flags);
2036}
2037
2038void rtl8180_hw_sleep_down(struct net_device *dev)
2039{
2040        unsigned long flags;
2041        struct r8180_priv *priv = ieee80211_priv(dev);
2042
2043        spin_lock_irqsave(&priv->ps_lock, flags);
2044        if (priv->rf_sleep)
2045                priv->rf_sleep(dev);
2046        spin_unlock_irqrestore(&priv->ps_lock, flags);
2047}
2048
2049void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2050{
2051        struct r8180_priv *priv = ieee80211_priv(dev);
2052        u32 rb = jiffies;
2053        unsigned long flags;
2054
2055        spin_lock_irqsave(&priv->ps_lock, flags);
2056
2057        /*
2058         * Writing HW register with 0 equals to disable
2059         * the timer, that is not really what we want
2060         */
2061        tl -= MSECS(4+16+7);
2062
2063        /*
2064         * If the interval in witch we are requested to sleep is too
2065         * short then give up and remain awake
2066         */
2067        if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2068                || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2069                spin_unlock_irqrestore(&priv->ps_lock, flags);
2070                printk("too short to sleep\n");
2071                return;
2072        }
2073
2074        {
2075                u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2076
2077                priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2078                /* as tl may be less than rb */
2079                queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp);
2080        }
2081        /*
2082         * If we suspect the TimerInt is gone beyond tl
2083         * while setting it, then give up
2084         */
2085
2086        if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2087                ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2088                spin_unlock_irqrestore(&priv->ps_lock, flags);
2089                return;
2090        }
2091
2092        queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2093        spin_unlock_irqrestore(&priv->ps_lock, flags);
2094}
2095
2096void rtl8180_wmm_param_update(struct work_struct *work)
2097{
2098        struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wmm_param_update_wq);
2099        struct net_device *dev = ieee->dev;
2100        u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2101        u8 mode = ieee->current_network.mode;
2102        AC_CODING       eACI;
2103        AC_PARAM        AcParam;
2104        PAC_PARAM       pAcParam;
2105        u8 i;
2106
2107        if (!ieee->current_network.QoS_Enable) {
2108                /* legacy ac_xx_param update */
2109                AcParam.longData = 0;
2110                AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
2111                AcParam.f.AciAifsn.f.ACM = 0;
2112                AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
2113                AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
2114                AcParam.f.TXOPLimit = 0;
2115                for (eACI = 0; eACI < AC_MAX; eACI++) {
2116                        AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2117                        {
2118                                u8              u1bAIFS;
2119                                u32             u4bAcParam;
2120                                pAcParam = (PAC_PARAM)(&AcParam);
2121                                /* Retrieve parameters to update. */
2122                                u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2123                                u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2124                                              (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2125                                              (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2126                                               (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2127                                switch (eACI) {
2128                                case AC1_BK:
2129                                        write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2130                                        break;
2131                                case AC0_BE:
2132                                        write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2133                                        break;
2134                                case AC2_VI:
2135                                        write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2136                                        break;
2137                                case AC3_VO:
2138                                        write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2139                                        break;
2140                                default:
2141                                        pr_warn("SetHwReg8185():invalid ACI: %d!\n",
2142                                                eACI);
2143                                        break;
2144                                }
2145                        }
2146                }
2147                return;
2148        }
2149
2150        for (i = 0; i < AC_MAX; i++) {
2151                /* AcParam.longData = 0; */
2152                pAcParam = (AC_PARAM *)ac_param;
2153                {
2154                        AC_CODING       eACI;
2155                        u8              u1bAIFS;
2156                        u32             u4bAcParam;
2157
2158                        /* Retrieve parameters to update. */
2159                        eACI = pAcParam->f.AciAifsn.f.ACI;
2160                        /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
2161                        u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2162                        u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)    |
2163                                        (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
2164                                        (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
2165                                        (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2166
2167                        switch (eACI) {
2168                        case AC1_BK:
2169                                write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2170                                break;
2171                        case AC0_BE:
2172                                write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2173                                break;
2174                        case AC2_VI:
2175                                write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2176                                break;
2177                        case AC3_VO:
2178                                write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2179                                break;
2180                        default:
2181                                pr_warn("SetHwReg8185(): invalid ACI: %d !\n",
2182                                        eACI);
2183                                break;
2184                        }
2185                }
2186                ac_param += (sizeof(AC_PARAM));
2187        }
2188}
2189
2190void rtl8180_restart_wq(struct work_struct *work);
2191/* void rtl8180_rq_tx_ack(struct work_struct *work); */
2192void rtl8180_watch_dog_wq(struct work_struct *work);
2193void rtl8180_hw_wakeup_wq(struct work_struct *work);
2194void rtl8180_hw_sleep_wq(struct work_struct *work);
2195void rtl8180_sw_antenna_wq(struct work_struct *work);
2196void rtl8180_watch_dog(struct net_device *dev);
2197
2198void watch_dog_adaptive(unsigned long data)
2199{
2200        struct r8180_priv *priv = ieee80211_priv((struct net_device *)data);
2201
2202        if (!priv->up) {
2203                DMESG("<----watch_dog_adaptive():driver is not up!\n");
2204                return;
2205        }
2206
2207        /* Tx High Power Mechanism. */
2208        if (CheckHighPower((struct net_device *)data))
2209                queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2210
2211        /* Tx Power Tracking on 87SE. */
2212        if (CheckTxPwrTracking((struct net_device *)data))
2213                TxPwrTracking87SE((struct net_device *)data);
2214
2215        /* Perform DIG immediately. */
2216        if (CheckDig((struct net_device *)data) == true)
2217                queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2218        rtl8180_watch_dog((struct net_device *)data);
2219
2220        queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2221
2222        priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2223        add_timer(&priv->watch_dog_timer);
2224}
2225
2226static CHANNEL_LIST ChannelPlan[] = {
2227        {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},         /* FCC */
2228        {{1,2,3,4,5,6,7,8,9,10,11},11},                                 /* IC */
2229        {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* ETSI */
2230        {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* Spain. Change to ETSI. */
2231        {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* France. Change to ETSI. */
2232        {{14,36,40,44,48,52,56,60,64},9},                               /* MKK */
2233        {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},/* MKK1 */
2234        {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* Israel. */
2235        {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},               /* For 11a , TELEC */
2236        {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  /* For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 */
2237        {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} /* world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 */
2238};
2239
2240static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2241{
2242        int i;
2243
2244        /* lzm add 080826 */
2245        ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2246        ieee->IbssStartChnl = 0;
2247
2248        switch (channel_plan) {
2249        case COUNTRY_CODE_FCC:
2250        case COUNTRY_CODE_IC:
2251        case COUNTRY_CODE_ETSI:
2252        case COUNTRY_CODE_SPAIN:
2253        case COUNTRY_CODE_FRANCE:
2254        case COUNTRY_CODE_MKK:
2255        case COUNTRY_CODE_MKK1:
2256        case COUNTRY_CODE_ISRAEL:
2257        case COUNTRY_CODE_TELEC:
2258                {
2259                        Dot11d_Init(ieee);
2260                        ieee->bGlobalDomain = false;
2261                        if (ChannelPlan[channel_plan].Len != 0) {
2262                                /* Clear old channel map */
2263                                memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2264                                /* Set new channel map */
2265                                for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
2266                                        if (ChannelPlan[channel_plan].Channel[i] <= 14)
2267                                                GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2268                                }
2269                        }
2270                        break;
2271                }
2272        case COUNTRY_CODE_GLOBAL_DOMAIN:
2273                {
2274                        GET_DOT11D_INFO(ieee)->bEnabled = 0;
2275                        Dot11d_Reset(ieee);
2276                        ieee->bGlobalDomain = true;
2277                        break;
2278                }
2279        case COUNTRY_CODE_WORLD_WIDE_13_INDEX:/* lzm add 080826 */
2280                {
2281                        ieee->MinPassiveChnlNum = 12;
2282                        ieee->IbssStartChnl = 10;
2283                        break;
2284                }
2285        default:
2286                {
2287                        Dot11d_Init(ieee);
2288                        ieee->bGlobalDomain = false;
2289                        memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2290                        for (i = 1; i <= 14; i++)
2291                                GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2292                        break;
2293                }
2294        }
2295}
2296
2297void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2298
2299/* YJ,add,080828 */
2300static void rtl8180_statistics_init(struct Stats *pstats)
2301{
2302        memset(pstats, 0, sizeof(struct Stats));
2303}
2304
2305static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2306{
2307        memset(plink_detect, 0, sizeof(link_detect_t));
2308        plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2309}
2310
2311/* YJ,add,080828,end */
2312static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2313{
2314        struct net_device *dev = eeprom->data;
2315        u8 reg = read_nic_byte(dev, EPROM_CMD);
2316
2317        eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2318        eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2319        eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2320        eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2321}
2322
2323static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2324{
2325        struct net_device *dev = eeprom->data;
2326        u8 reg = 2 << 6;
2327
2328        if (eeprom->reg_data_in)
2329                reg |= RTL818X_EEPROM_CMD_WRITE;
2330        if (eeprom->reg_data_out)
2331                reg |= RTL818X_EEPROM_CMD_READ;
2332        if (eeprom->reg_data_clock)
2333                reg |= RTL818X_EEPROM_CMD_CK;
2334        if (eeprom->reg_chip_select)
2335                reg |= RTL818X_EEPROM_CMD_CS;
2336
2337        write_nic_byte(dev, EPROM_CMD, reg);
2338        read_nic_byte(dev, EPROM_CMD);
2339        udelay(10);
2340}
2341
2342short rtl8180_init(struct net_device *dev)
2343{
2344        struct r8180_priv *priv = ieee80211_priv(dev);
2345        u16 word;
2346        u16 usValue;
2347        u16 tmpu16;
2348        int i, j;
2349        struct eeprom_93cx6 eeprom;
2350        u16 eeprom_val;
2351
2352        eeprom.data = dev;
2353        eeprom.register_read = rtl8187se_eeprom_register_read;
2354        eeprom.register_write = rtl8187se_eeprom_register_write;
2355        eeprom.width = PCI_EEPROM_WIDTH_93C46;
2356
2357        eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2358        priv->channel_plan = eeprom_val & 0xFF;
2359        if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2360                printk("rtl8180_init:Error channel plan! Set to default.\n");
2361                priv->channel_plan = 0;
2362        }
2363
2364        DMESG("Channel plan is %d\n", priv->channel_plan);
2365        rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2366
2367        /* FIXME: these constants are placed in a bad pleace. */
2368        priv->txbuffsize = 2048;        /* 1024; */
2369        priv->txringcount = 32;         /* 32; */
2370        priv->rxbuffersize = 2048;      /* 1024; */
2371        priv->rxringcount = 64;         /* 32; */
2372        priv->txbeaconcount = 2;
2373        priv->rx_skb_complete = 1;
2374
2375        priv->RFChangeInProgress = false;
2376        priv->SetRFPowerStateInProgress = false;
2377        priv->RFProgType = 0;
2378
2379        priv->irq_enabled = 0;
2380
2381        rtl8180_statistics_init(&priv->stats);
2382        rtl8180_link_detect_init(&priv->link_detect);
2383
2384        priv->ack_tx_to_ieee = 0;
2385        priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2386        priv->ieee80211->iw_mode = IW_MODE_INFRA;
2387        priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
2388                IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2389                IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2390        priv->ieee80211->active_scan = 1;
2391        priv->ieee80211->rate = 110; /* 11 mbps */
2392        priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2393        priv->ieee80211->host_encrypt = 1;
2394        priv->ieee80211->host_decrypt = 1;
2395        priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2396        priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2397        priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2398        priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2399
2400        priv->hw_wep = hwwep;
2401        priv->dev = dev;
2402        priv->retry_rts = DEFAULT_RETRY_RTS;
2403        priv->retry_data = DEFAULT_RETRY_DATA;
2404        priv->RFChangeInProgress = false;
2405        priv->SetRFPowerStateInProgress = false;
2406        priv->RFProgType = 0;
2407        priv->bInactivePs = true; /* false; */
2408        priv->ieee80211->bInactivePs = priv->bInactivePs;
2409        priv->bSwRfProcessing = false;
2410        priv->eRFPowerState = eRfOff;
2411        priv->RfOffReason = 0;
2412        priv->LedStrategy = SW_LED_MODE0;
2413        priv->TxPollingTimes = 0; /* lzm add 080826 */
2414        priv->bLeisurePs = true;
2415        priv->dot11PowerSaveMode = eActive;
2416        priv->AdMinCheckPeriod = 5;
2417        priv->AdMaxCheckPeriod = 10;
2418        priv->AdMaxRxSsThreshold = 30;  /* 60->30 */
2419        priv->AdRxSsThreshold = 20;     /* 50->20 */
2420        priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2421        priv->AdTickCount = 0;
2422        priv->AdRxSignalStrength = -1;
2423        priv->RegSwAntennaDiversityMechanism = 0;
2424        priv->RegDefaultAntenna = 0;
2425        priv->SignalStrength = 0;
2426        priv->AdRxOkCnt = 0;
2427        priv->CurrAntennaIndex = 0;
2428        priv->AdRxSsBeforeSwitched = 0;
2429        init_timer(&priv->SwAntennaDiversityTimer);
2430        priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2431        priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2432        priv->bDigMechanism = 1;
2433        priv->InitialGain = 6;
2434        priv->bXtalCalibration = false;
2435        priv->XtalCal_Xin = 0;
2436        priv->XtalCal_Xout = 0;
2437        priv->bTxPowerTrack = false;
2438        priv->ThermalMeter = 0;
2439        priv->FalseAlarmRegValue = 0;
2440        priv->RegDigOfdmFaUpTh = 0xc; /* Upper threshold of OFDM false alarm, which is used in DIG. */
2441        priv->DIG_NumberFallbackVote = 0;
2442        priv->DIG_NumberUpgradeVote = 0;
2443        priv->LastSignalStrengthInPercent = 0;
2444        priv->Stats_SignalStrength = 0;
2445        priv->LastRxPktAntenna = 0;
2446        priv->SignalQuality = 0; /* in 0-100 index. */
2447        priv->Stats_SignalQuality = 0;
2448        priv->RecvSignalPower = 0; /* in dBm. */
2449        priv->Stats_RecvSignalPower = 0;
2450        priv->AdMainAntennaRxOkCnt = 0;
2451        priv->AdAuxAntennaRxOkCnt = 0;
2452        priv->bHWAdSwitched = false;
2453        priv->bRegHighPowerMechanism = true;
2454        priv->RegHiPwrUpperTh = 77;
2455        priv->RegHiPwrLowerTh = 75;
2456        priv->RegRSSIHiPwrUpperTh = 70;
2457        priv->RegRSSIHiPwrLowerTh = 20;
2458        priv->bCurCCKPkt = false;
2459        priv->UndecoratedSmoothedSS = -1;
2460        priv->bToUpdateTxPwr = false;
2461        priv->CurCCKRSSI = 0;
2462        priv->RxPower = 0;
2463        priv->RSSI = 0;
2464        priv->NumTxOkTotal = 0;
2465        priv->NumTxUnicast = 0;
2466        priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2467        priv->CurrRetryCnt = 0;
2468        priv->LastRetryCnt = 0;
2469        priv->LastTxokCnt = 0;
2470        priv->LastRxokCnt = 0;
2471        priv->LastRetryRate = 0;
2472        priv->bTryuping = 0;
2473        priv->CurrTxRate = 0;
2474        priv->CurrRetryRate = 0;
2475        priv->TryupingCount = 0;
2476        priv->TryupingCountNoData = 0;
2477        priv->TryDownCountLowData = 0;
2478        priv->LastTxOKBytes = 0;
2479        priv->LastFailTxRate = 0;
2480        priv->LastFailTxRateSS = 0;
2481        priv->FailTxRateCount = 0;
2482        priv->LastTxThroughput = 0;
2483        priv->NumTxOkBytesTotal = 0;
2484        priv->ForcedDataRate = 0;
2485        priv->RegBModeGainStage = 1;
2486
2487        priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2488        spin_lock_init(&priv->irq_th_lock);
2489        spin_lock_init(&priv->tx_lock);
2490        spin_lock_init(&priv->ps_lock);
2491        spin_lock_init(&priv->rf_ps_lock);
2492        sema_init(&priv->wx_sem, 1);
2493        INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2494        INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2495                          (void *)rtl8180_hw_wakeup_wq);
2496        INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2497                          (void *)rtl8180_hw_sleep_wq);
2498        INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2499                  (void *)rtl8180_wmm_param_update);
2500        INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2501                          (void *)rtl8180_rate_adapter);
2502        INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2503                         (void *)rtl8180_hw_dig_wq);
2504        INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2505                         (void *)rtl8180_tx_pw_wq);
2506        INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2507                         (void *) GPIOChangeRFWorkItemCallBack);
2508        tasklet_init(&priv->irq_rx_tasklet,
2509                     (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2510                     (unsigned long)priv);
2511
2512        init_timer(&priv->watch_dog_timer);
2513        priv->watch_dog_timer.data = (unsigned long)dev;
2514        priv->watch_dog_timer.function = watch_dog_adaptive;
2515
2516        init_timer(&priv->rateadapter_timer);
2517        priv->rateadapter_timer.data = (unsigned long)dev;
2518        priv->rateadapter_timer.function = timer_rate_adaptive;
2519        priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2520        priv->bEnhanceTxPwr = false;
2521
2522        priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2523        priv->ieee80211->set_chan = rtl8180_set_chan;
2524        priv->ieee80211->link_change = rtl8180_link_change;
2525        priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2526        priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2527        priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2528
2529        priv->ieee80211->init_wmmparam_flag = 0;
2530
2531        priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2532        priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2533        priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2534
2535        priv->ShortRetryLimit = 7;
2536        priv->LongRetryLimit = 7;
2537        priv->EarlyRxThreshold = 7;
2538
2539        priv->TransmitConfig =  (1<<TCR_DurProcMode_OFFSET) |
2540                                (7<<TCR_MXDMA_OFFSET) |
2541                                (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2542                                (priv->LongRetryLimit<<TCR_LRL_OFFSET);
2543
2544        priv->ReceiveConfig =   RCR_AMF | RCR_ADF | RCR_ACF |
2545                                RCR_AB | RCR_AM | RCR_APM |
2546                                (7<<RCR_MXDMA_OFFSET) |
2547                                (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2548                                (priv->EarlyRxThreshold == 7 ?
2549                                         RCR_ONLYERLPKT : 0);
2550
2551        priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2552                                  IMR_THPDER | IMR_THPDOK |
2553                                  IMR_TVODER | IMR_TVODOK |
2554                                  IMR_TVIDER | IMR_TVIDOK |
2555                                  IMR_TBEDER | IMR_TBEDOK |
2556                                  IMR_TBKDER | IMR_TBKDOK |
2557                                  IMR_RDU |
2558                                  IMR_RER | IMR_ROK |
2559                                  IMR_RQoSOK;
2560
2561        priv->InitialGain = 6;
2562
2563        DMESG("MAC controller is a RTL8187SE b/g");
2564
2565        priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2566        priv->ieee80211->short_slot = 1;
2567
2568        eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &usValue);
2569        DMESG("usValue is %#hx\n", usValue);
2570        /* 3Read AntennaDiversity */
2571
2572        /* SW Antenna Diversity. */
2573        priv->EEPROMSwAntennaDiversity = (usValue & EEPROM_SW_AD_MASK) ==
2574                EEPROM_SW_AD_ENABLE;
2575
2576        /* Default Antenna to use. */
2577        priv->EEPROMDefaultAntenna1 = (usValue & EEPROM_DEF_ANT_MASK) ==
2578                EEPROM_DEF_ANT_1;
2579
2580        if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2581                /* 0: default from EEPROM. */
2582                priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2583        else
2584                /* 1:disable antenna diversity, 2: enable antenna diversity. */
2585                priv->bSwAntennaDiverity = priv->RegSwAntennaDiversityMechanism == 2;
2586
2587        if (priv->RegDefaultAntenna == 0)
2588                /* 0: default from EEPROM. */
2589                priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2590        else
2591                /* 1: main, 2: aux. */
2592                priv->bDefaultAntenna1 = priv->RegDefaultAntenna == 2;
2593
2594        priv->plcp_preamble_mode = 2;
2595        /* the eeprom type is stored in RCR register bit #6 */
2596        if (RCR_9356SEL & read_nic_dword(dev, RCR))
2597                priv->epromtype = EPROM_93c56;
2598        else
2599                priv->epromtype = EPROM_93c46;
2600
2601        eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2602                               dev->dev_addr, 3);
2603
2604        for (i = 1, j = 0; i < 14; i += 2, j++) {
2605                eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2606                priv->chtxpwr[i] = word & 0xff;
2607                priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2608        }
2609        for (i = 1, j = 0; i < 14; i += 2, j++) {
2610                eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2611                priv->chtxpwr_ofdm[i] = word & 0xff;
2612                priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2613        }
2614
2615        /* 3Read crystal calibration and thermal meter indication on 87SE. */
2616        eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2617
2618        /* Crystal calibration for Xin and Xout resp. */
2619        priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2620        priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2621        if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2622                priv->bXtalCalibration = true;
2623
2624        /* Thermal meter reference indication. */
2625        priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2626        if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2627                priv->bTxPowerTrack = true;
2628
2629        priv->rf_sleep = rtl8225z4_rf_sleep;
2630        priv->rf_wakeup = rtl8225z4_rf_wakeup;
2631        DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2632
2633        priv->rf_close = rtl8225z2_rf_close;
2634        priv->rf_init = rtl8225z2_rf_init;
2635        priv->rf_set_chan = rtl8225z2_rf_set_chan;
2636        priv->rf_set_sens = NULL;
2637
2638        if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2639                return -ENOMEM;
2640
2641        if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2642                                  TX_MANAGEPRIORITY_RING_ADDR))
2643                return -ENOMEM;
2644
2645        if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2646                                 TX_BKPRIORITY_RING_ADDR))
2647                return -ENOMEM;
2648
2649        if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2650                                 TX_BEPRIORITY_RING_ADDR))
2651                return -ENOMEM;
2652
2653        if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2654                                  TX_VIPRIORITY_RING_ADDR))
2655                return -ENOMEM;
2656
2657        if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2658                                  TX_VOPRIORITY_RING_ADDR))
2659                return -ENOMEM;
2660
2661        if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2662                                  TX_HIGHPRIORITY_RING_ADDR))
2663                return -ENOMEM;
2664
2665        if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2666                                  TX_BEACON_RING_ADDR))
2667                return -ENOMEM;
2668
2669        if (request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)) {
2670                DMESGE("Error allocating IRQ %d", dev->irq);
2671                return -1;
2672        } else {
2673                priv->irq = dev->irq;
2674                DMESG("IRQ %d", dev->irq);
2675        }
2676
2677        return 0;
2678}
2679
2680void rtl8180_no_hw_wep(struct net_device *dev)
2681{
2682}
2683
2684void rtl8180_set_hw_wep(struct net_device *dev)
2685{
2686        struct r8180_priv *priv = ieee80211_priv(dev);
2687        u8 pgreg;
2688        u8 security;
2689        u32 key0_word4;
2690
2691        pgreg = read_nic_byte(dev, PGSELECT);
2692        write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2693
2694        key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2695        key0_word4 &= ~0xff;
2696        key0_word4 |= priv->key0[3] & 0xff;
2697        write_nic_dword(dev, KEY0, (priv->key0[0]));
2698        write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2699        write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2700        write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2701
2702        security  = read_nic_byte(dev, SECURITY);
2703        security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2704        security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
2705        security &= ~SECURITY_ENCRYP_MASK;
2706        security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
2707
2708        write_nic_byte(dev, SECURITY, security);
2709
2710        DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
2711              read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
2712              read_nic_dword(dev, KEY0));
2713}
2714
2715
2716void rtl8185_rf_pins_enable(struct net_device *dev)
2717{
2718        /* u16 tmp; */
2719        /* tmp = read_nic_word(dev, RFPinsEnable); */
2720        write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
2721}
2722
2723void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
2724{
2725        u8 conf3;
2726
2727        rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2728
2729        conf3 = read_nic_byte(dev, CONFIG3);
2730        write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2731        write_nic_dword(dev, ANAPARAM2, a);
2732
2733        conf3 = read_nic_byte(dev, CONFIG3);
2734        write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2735        rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2736}
2737
2738void rtl8180_set_anaparam(struct net_device *dev, u32 a)
2739{
2740        u8 conf3;
2741
2742        rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2743
2744        conf3 = read_nic_byte(dev, CONFIG3);
2745        write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2746        write_nic_dword(dev, ANAPARAM, a);
2747
2748        conf3 = read_nic_byte(dev, CONFIG3);
2749        write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2750        rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2751}
2752
2753void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
2754{
2755        write_nic_byte(dev, TX_ANTENNA, ant);
2756        force_pci_posting(dev);
2757        mdelay(1);
2758}
2759
2760void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
2761{
2762        u32 phyw;
2763
2764        adr |= 0x80;
2765
2766        phyw = ((data<<8) | adr);
2767
2768        /* Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. */
2769        write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
2770        write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
2771        write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
2772        write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
2773
2774        /* this is ok to fail when we write AGC table. check for AGC table might be
2775         * done by masking with 0x7f instead of 0xff
2776         */
2777        /* if (phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr); */
2778}
2779
2780inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
2781{
2782        data = data & 0xff;
2783        rtl8185_write_phy(dev, adr, data);
2784}
2785
2786void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
2787{
2788        data = data & 0xff;
2789        rtl8185_write_phy(dev, adr, data | 0x10000);
2790}
2791
2792/*
2793 * This configures registers for beacon tx and enables it via
2794 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
2795 * be used to stop beacon transmission
2796 */
2797void rtl8180_start_tx_beacon(struct net_device *dev)
2798{
2799        u16 word;
2800
2801        DMESG("Enabling beacon TX");
2802        rtl8180_prepare_beacon(dev);
2803        rtl8180_irq_disable(dev);
2804        rtl8180_beacon_tx_enable(dev);
2805
2806        word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
2807        write_nic_word(dev, AtimWnd, word); /* word |= */
2808
2809        word  = read_nic_word(dev, BintrItv);
2810        word &= ~BintrItv_BintrItv;
2811        word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
2812                ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
2813        // FIXME: check if correct ^^ worked with 0x3e8;
2814        */
2815        write_nic_word(dev, BintrItv, word);
2816
2817        rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2818
2819        rtl8185b_irq_enable(dev);
2820}
2821
2822static struct net_device_stats *rtl8180_stats(struct net_device *dev)
2823{
2824        struct r8180_priv *priv = ieee80211_priv(dev);
2825
2826        return &priv->ieee80211->stats;
2827}
2828
2829/*
2830 * Change current and default preamble mode.
2831 */
2832bool
2833MgntActSet_802_11_PowerSaveMode(
2834        struct r8180_priv *priv,
2835        RT_PS_MODE              rtPsMode
2836)
2837{
2838        /* Currently, we do not change power save mode on IBSS mode. */
2839        if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
2840                return false;
2841
2842        priv->ieee80211->ps = rtPsMode;
2843
2844        return true;
2845}
2846
2847void LeisurePSEnter(struct r8180_priv *priv)
2848{
2849        if (priv->bLeisurePs) {
2850                if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
2851                        /* IEEE80211_PS_ENABLE */
2852                        MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
2853        }
2854}
2855
2856void LeisurePSLeave(struct r8180_priv *priv)
2857{
2858        if (priv->bLeisurePs) {
2859                if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
2860                        MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
2861        }
2862}
2863
2864void rtl8180_hw_wakeup_wq(struct work_struct *work)
2865{
2866        struct delayed_work *dwork = to_delayed_work(work);
2867        struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_wakeup_wq);
2868        struct net_device *dev = ieee->dev;
2869
2870        rtl8180_hw_wakeup(dev);
2871}
2872
2873void rtl8180_hw_sleep_wq(struct work_struct *work)
2874{
2875        struct delayed_work *dwork = to_delayed_work(work);
2876        struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_sleep_wq);
2877        struct net_device *dev = ieee->dev;
2878
2879        rtl8180_hw_sleep_down(dev);
2880}
2881
2882static void MgntLinkKeepAlive(struct r8180_priv *priv)
2883{
2884        if (priv->keepAliveLevel == 0)
2885                return;
2886
2887        if (priv->ieee80211->state == IEEE80211_LINKED) {
2888                /*
2889                 * Keep-Alive.
2890                 */
2891
2892                if ((priv->keepAliveLevel == 2) ||
2893                        (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
2894                        priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast)
2895                        ) {
2896                        priv->link_detect.IdleCount++;
2897
2898                        /*
2899                         * Send a Keep-Alive packet packet to AP if we had been idle for a while.
2900                         */
2901                        if (priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1)) {
2902                                priv->link_detect.IdleCount = 0;
2903                                ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
2904                        }
2905                } else {
2906                        priv->link_detect.IdleCount = 0;
2907                }
2908                priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
2909                priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
2910        }
2911}
2912
2913void rtl8180_watch_dog(struct net_device *dev)
2914{
2915        struct r8180_priv *priv = ieee80211_priv(dev);
2916        bool bEnterPS = false;
2917        bool bBusyTraffic = false;
2918        u32 TotalRxNum = 0;
2919        u16 SlotIndex = 0;
2920        u16 i = 0;
2921        if (priv->ieee80211->actscanning == false) {
2922                if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) &&
2923                    (priv->ieee80211->state == IEEE80211_NOLINK) &&
2924                    (priv->ieee80211->beinretry == false) &&
2925                    (priv->eRFPowerState == eRfOn))
2926                        IPSEnter(dev);
2927        }
2928        /* YJ,add,080828,for link state check */
2929        if ((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
2930                SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
2931                priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
2932                for (i = 0; i < priv->link_detect.SlotNum; i++)
2933                        TotalRxNum += priv->link_detect.RxFrameNum[i];
2934
2935                if (TotalRxNum == 0) {
2936                        priv->ieee80211->state = IEEE80211_ASSOCIATING;
2937                        queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
2938                }
2939        }
2940
2941        /* YJ,add,080828,for KeepAlive */
2942        MgntLinkKeepAlive(priv);
2943
2944        /* YJ,add,080828,for LPS */
2945        LeisurePSLeave(priv);
2946
2947        if (priv->ieee80211->state == IEEE80211_LINKED) {
2948                priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
2949                if (priv->link_detect.NumRxOkInPeriod > 666 ||
2950                        priv->link_detect.NumTxOkInPeriod > 666) {
2951                        bBusyTraffic = true;
2952                }
2953                if (((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
2954                        || (priv->link_detect.NumRxOkInPeriod > 2)) {
2955                        bEnterPS = false;
2956                } else
2957                        bEnterPS = true;
2958
2959                if (bEnterPS)
2960                        LeisurePSEnter(priv);
2961                else
2962                        LeisurePSLeave(priv);
2963        } else
2964                LeisurePSLeave(priv);
2965        priv->link_detect.bBusyTraffic = bBusyTraffic;
2966        priv->link_detect.NumRxOkInPeriod = 0;
2967        priv->link_detect.NumTxOkInPeriod = 0;
2968        priv->ieee80211->NumRxDataInPeriod = 0;
2969        priv->ieee80211->NumRxBcnInPeriod = 0;
2970}
2971
2972int _rtl8180_up(struct net_device *dev)
2973{
2974        struct r8180_priv *priv = ieee80211_priv(dev);
2975
2976        priv->up = 1;
2977
2978        DMESG("Bringing up iface");
2979        rtl8185b_adapter_start(dev);
2980        rtl8185b_rx_enable(dev);
2981        rtl8185b_tx_enable(dev);
2982        if (priv->bInactivePs) {
2983                if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
2984                        IPSLeave(dev);
2985        }
2986        timer_rate_adaptive((unsigned long)dev);
2987        watch_dog_adaptive((unsigned long)dev);
2988        if (priv->bSwAntennaDiverity)
2989                        SwAntennaDiversityTimerCallback(dev);
2990        ieee80211_softmac_start_protocol(priv->ieee80211);
2991        return 0;
2992}
2993
2994int rtl8180_open(struct net_device *dev)
2995{
2996        struct r8180_priv *priv = ieee80211_priv(dev);
2997        int ret;
2998
2999        down(&priv->wx_sem);
3000        ret = rtl8180_up(dev);
3001        up(&priv->wx_sem);
3002        return ret;
3003}
3004
3005int rtl8180_up(struct net_device *dev)
3006{
3007        struct r8180_priv *priv = ieee80211_priv(dev);
3008
3009        if (priv->up == 1)
3010                return -1;
3011
3012        return _rtl8180_up(dev);
3013}
3014
3015int rtl8180_close(struct net_device *dev)
3016{
3017        struct r8180_priv *priv = ieee80211_priv(dev);
3018        int ret;
3019
3020        down(&priv->wx_sem);
3021        ret = rtl8180_down(dev);
3022        up(&priv->wx_sem);
3023
3024        return ret;
3025}
3026
3027int rtl8180_down(struct net_device *dev)
3028{
3029        struct r8180_priv *priv = ieee80211_priv(dev);
3030
3031        if (priv->up == 0)
3032                return -1;
3033
3034        priv->up = 0;
3035
3036        ieee80211_softmac_stop_protocol(priv->ieee80211);
3037        /* FIXME */
3038        if (!netif_queue_stopped(dev))
3039                netif_stop_queue(dev);
3040        rtl8180_rtx_disable(dev);
3041        rtl8180_irq_disable(dev);
3042        del_timer_sync(&priv->watch_dog_timer);
3043        del_timer_sync(&priv->rateadapter_timer);
3044        cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3045        cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3046        cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3047        cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3048        cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3049        del_timer_sync(&priv->SwAntennaDiversityTimer);
3050        SetZebraRFPowerState8185(dev, eRfOff);
3051        memset(&(priv->ieee80211->current_network), 0, sizeof(struct ieee80211_network));
3052        priv->ieee80211->state = IEEE80211_NOLINK;
3053        return 0;
3054}
3055
3056void rtl8180_restart_wq(struct work_struct *work)
3057{
3058        struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
3059        struct net_device *dev = priv->dev;
3060
3061        down(&priv->wx_sem);
3062
3063        rtl8180_commit(dev);
3064
3065        up(&priv->wx_sem);
3066}
3067
3068void rtl8180_restart(struct net_device *dev)
3069{
3070        struct r8180_priv *priv = ieee80211_priv(dev);
3071
3072        schedule_work(&priv->reset_wq);
3073}
3074
3075void rtl8180_commit(struct net_device *dev)
3076{
3077        struct r8180_priv *priv = ieee80211_priv(dev);
3078
3079        if (priv->up == 0)
3080                return ;
3081
3082        del_timer_sync(&priv->watch_dog_timer);
3083        del_timer_sync(&priv->rateadapter_timer);
3084        cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3085        cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3086        cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3087        cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3088        cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3089        del_timer_sync(&priv->SwAntennaDiversityTimer);
3090        ieee80211_softmac_stop_protocol(priv->ieee80211);
3091        rtl8180_irq_disable(dev);
3092        rtl8180_rtx_disable(dev);
3093        _rtl8180_up(dev);
3094}
3095
3096static void r8180_set_multicast(struct net_device *dev)
3097{
3098        struct r8180_priv *priv = ieee80211_priv(dev);
3099        short promisc;
3100
3101        promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3102
3103        if (promisc != priv->promisc)
3104                rtl8180_restart(dev);
3105
3106        priv->promisc = promisc;
3107}
3108
3109int r8180_set_mac_adr(struct net_device *dev, void *mac)
3110{
3111        struct r8180_priv *priv = ieee80211_priv(dev);
3112        struct sockaddr *addr = mac;
3113
3114        down(&priv->wx_sem);
3115
3116        memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3117
3118        if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3119                memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3120
3121        if (priv->up) {
3122                rtl8180_down(dev);
3123                rtl8180_up(dev);
3124        }
3125
3126        up(&priv->wx_sem);
3127
3128        return 0;
3129}
3130
3131/* based on ipw2200 driver */
3132int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3133{
3134        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3135        struct iwreq *wrq = (struct iwreq *) rq;
3136        int ret = -1;
3137
3138        switch (cmd) {
3139        case RTL_IOCTL_WPA_SUPPLICANT:
3140                ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3141                return ret;
3142        default:
3143                return -EOPNOTSUPP;
3144        }
3145
3146        return -EOPNOTSUPP;
3147}
3148
3149static const struct net_device_ops rtl8180_netdev_ops = {
3150        .ndo_open               = rtl8180_open,
3151        .ndo_stop               = rtl8180_close,
3152        .ndo_get_stats          = rtl8180_stats,
3153        .ndo_tx_timeout         = rtl8180_restart,
3154        .ndo_do_ioctl           = rtl8180_ioctl,
3155        .ndo_set_rx_mode        = r8180_set_multicast,
3156        .ndo_set_mac_address    = r8180_set_mac_adr,
3157        .ndo_validate_addr      = eth_validate_addr,
3158        .ndo_change_mtu         = eth_change_mtu,
3159        .ndo_start_xmit         = ieee80211_rtl_xmit,
3160};
3161
3162static int rtl8180_pci_probe(struct pci_dev *pdev,
3163                                       const struct pci_device_id *id)
3164{
3165        unsigned long ioaddr = 0;
3166        struct net_device *dev = NULL;
3167        struct r8180_priv *priv = NULL;
3168        u8 unit = 0;
3169        int ret = -ENODEV;
3170
3171        unsigned long pmem_start, pmem_len, pmem_flags;
3172
3173        DMESG("Configuring chip resources");
3174
3175        if (pci_enable_device(pdev)) {
3176                DMESG("Failed to enable PCI device");
3177                return -EIO;
3178        }
3179
3180        pci_set_master(pdev);
3181        pci_set_dma_mask(pdev, 0xffffff00ULL);
3182        pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3183        dev = alloc_ieee80211(sizeof(struct r8180_priv));
3184        if (!dev) {
3185                ret = -ENOMEM;
3186                goto fail_free;
3187        }
3188        priv = ieee80211_priv(dev);
3189        priv->ieee80211 = netdev_priv(dev);
3190
3191        pci_set_drvdata(pdev, dev);
3192        SET_NETDEV_DEV(dev, &pdev->dev);
3193
3194        priv = ieee80211_priv(dev);
3195        priv->pdev = pdev;
3196
3197        pmem_start = pci_resource_start(pdev, 1);
3198        pmem_len = pci_resource_len(pdev, 1);
3199        pmem_flags = pci_resource_flags(pdev, 1);
3200
3201        if (!(pmem_flags & IORESOURCE_MEM)) {
3202                DMESG("region #1 not a MMIO resource, aborting");
3203                goto fail;
3204        }
3205
3206        if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3207                DMESG("request_mem_region failed!");
3208                goto fail;
3209        }
3210
3211        ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3212        if (ioaddr == (unsigned long)NULL) {
3213                DMESG("ioremap failed!");
3214                goto fail1;
3215        }
3216
3217        dev->mem_start = ioaddr; /* shared mem start */
3218        dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
3219
3220        pci_read_config_byte(pdev, 0x05, &unit);
3221        pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3222
3223        dev->irq = pdev->irq;
3224        priv->irq = 0;
3225
3226        dev->netdev_ops = &rtl8180_netdev_ops;
3227        dev->wireless_handlers = &r8180_wx_handlers_def;
3228
3229        dev->type = ARPHRD_ETHER;
3230        dev->watchdog_timeo = HZ*3;
3231
3232        if (dev_alloc_name(dev, ifname) < 0) {
3233                DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3234                strcpy(ifname, "wlan%d");
3235                dev_alloc_name(dev, ifname);
3236        }
3237
3238        if (rtl8180_init(dev) != 0) {
3239                DMESG("Initialization failed");
3240                goto fail1;
3241        }
3242
3243        netif_carrier_off(dev);
3244
3245        if (register_netdev(dev))
3246                goto fail1;
3247
3248        rtl8180_proc_init_one(dev);
3249
3250        DMESG("Driver probe completed\n");
3251        return 0;
3252fail1:
3253        if (dev->mem_start != (unsigned long)NULL) {
3254                iounmap((void *)dev->mem_start);
3255                release_mem_region(pci_resource_start(pdev, 1),
3256                                   pci_resource_len(pdev, 1));
3257        }
3258fail:
3259        if (dev) {
3260                if (priv->irq) {
3261                        free_irq(dev->irq, dev);
3262                        dev->irq = 0;
3263                }
3264                free_ieee80211(dev);
3265        }
3266
3267fail_free:
3268        pci_disable_device(pdev);
3269
3270        DMESG("wlan driver load failed\n");
3271        pci_set_drvdata(pdev, NULL);
3272        return ret;
3273}
3274
3275static void rtl8180_pci_remove(struct pci_dev *pdev)
3276{
3277        struct r8180_priv *priv;
3278        struct net_device *dev = pci_get_drvdata(pdev);
3279
3280        if (dev) {
3281                unregister_netdev(dev);
3282
3283                priv = ieee80211_priv(dev);
3284
3285                rtl8180_proc_remove_one(dev);
3286                rtl8180_down(dev);
3287                priv->rf_close(dev);
3288                rtl8180_reset(dev);
3289                mdelay(10);
3290
3291                if (priv->irq) {
3292                        DMESG("Freeing irq %d", dev->irq);
3293                        free_irq(dev->irq, dev);
3294                        priv->irq = 0;
3295                }
3296
3297                free_rx_desc_ring(dev);
3298                free_tx_desc_rings(dev);
3299
3300                if (dev->mem_start != (unsigned long)NULL) {
3301                        iounmap((void *)dev->mem_start);
3302                        release_mem_region(pci_resource_start(pdev, 1),
3303                                           pci_resource_len(pdev, 1));
3304                }
3305
3306                free_ieee80211(dev);
3307        }
3308        pci_disable_device(pdev);
3309
3310        DMESG("wlan driver removed\n");
3311}
3312
3313/* fun with the built-in ieee80211 stack... */
3314extern int ieee80211_crypto_init(void);
3315extern void ieee80211_crypto_deinit(void);
3316extern int ieee80211_crypto_tkip_init(void);
3317extern void ieee80211_crypto_tkip_exit(void);
3318extern int ieee80211_crypto_ccmp_init(void);
3319extern void ieee80211_crypto_ccmp_exit(void);
3320extern int ieee80211_crypto_wep_init(void);
3321extern void ieee80211_crypto_wep_exit(void);
3322
3323static int __init rtl8180_pci_module_init(void)
3324{
3325        int ret;
3326
3327        ret = ieee80211_crypto_init();
3328        if (ret) {
3329                pr_err("ieee80211_crypto_init() failed %d\n", ret);
3330                return ret;
3331        }
3332        ret = ieee80211_crypto_tkip_init();
3333        if (ret) {
3334                pr_err("ieee80211_crypto_tkip_init() failed %d\n", ret);
3335                return ret;
3336        }
3337        ret = ieee80211_crypto_ccmp_init();
3338        if (ret) {
3339                pr_err("ieee80211_crypto_ccmp_init() failed %d\n", ret);
3340                return ret;
3341        }
3342        ret = ieee80211_crypto_wep_init();
3343        if (ret) {
3344                pr_err("ieee80211_crypto_wep_init() failed %d\n", ret);
3345                return ret;
3346        }
3347
3348        pr_info("\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3349        pr_info("Copyright (c) 2004-2005, Andrea Merello\n");
3350        DMESG("Initializing module");
3351        DMESG("Wireless extensions version %d", WIRELESS_EXT);
3352        rtl8180_proc_module_init();
3353
3354        if (pci_register_driver(&rtl8180_pci_driver)) {
3355                DMESG("No device found");
3356                return -ENODEV;
3357        }
3358        return 0;
3359}
3360
3361static void __exit rtl8180_pci_module_exit(void)
3362{
3363        pci_unregister_driver(&rtl8180_pci_driver);
3364        rtl8180_proc_module_remove();
3365        ieee80211_crypto_tkip_exit();
3366        ieee80211_crypto_ccmp_exit();
3367        ieee80211_crypto_wep_exit();
3368        ieee80211_crypto_deinit();
3369        DMESG("Exiting");
3370}
3371
3372void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3373{
3374        unsigned long flags;
3375        short enough_desc;
3376        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3377
3378        spin_lock_irqsave(&priv->tx_lock, flags);
3379        enough_desc = check_nic_enought_desc(dev, pri);
3380        spin_unlock_irqrestore(&priv->tx_lock, flags);
3381
3382        if (enough_desc)
3383                ieee80211_rtl_wake_queue(priv->ieee80211);
3384}
3385
3386void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3387{
3388        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3389        u32 *tail; /* tail virtual addr */
3390        u32 *head; /* head virtual addr */
3391        u32 *begin; /* start of ring virtual addr */
3392        u32 *nicv; /* nic pointer virtual addr */
3393        u32 nic; /* nic pointer physical addr */
3394        u32 nicbegin; /* start of ring physical addr */
3395        unsigned long flag;
3396        /* physical addr are ok on 32 bits since we set DMA mask */
3397        int offs;
3398        int j, i;
3399        int hd;
3400        if (error)
3401                priv->stats.txretry++; /* tony 20060601 */
3402        spin_lock_irqsave(&priv->tx_lock, flag);
3403        switch (pri) {
3404        case MANAGE_PRIORITY:
3405                tail = priv->txmapringtail;
3406                begin = priv->txmapring;
3407                head = priv->txmapringhead;
3408                nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3409                nicbegin = priv->txmapringdma;
3410                break;
3411        case BK_PRIORITY:
3412                tail = priv->txbkpringtail;
3413                begin = priv->txbkpring;
3414                head = priv->txbkpringhead;
3415                nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3416                nicbegin = priv->txbkpringdma;
3417                break;
3418        case BE_PRIORITY:
3419                tail = priv->txbepringtail;
3420                begin = priv->txbepring;
3421                head = priv->txbepringhead;
3422                nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3423                nicbegin = priv->txbepringdma;
3424                break;
3425        case VI_PRIORITY:
3426                tail = priv->txvipringtail;
3427                begin = priv->txvipring;
3428                head = priv->txvipringhead;
3429                nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3430                nicbegin = priv->txvipringdma;
3431                break;
3432        case VO_PRIORITY:
3433                tail = priv->txvopringtail;
3434                begin = priv->txvopring;
3435                head = priv->txvopringhead;
3436                nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3437                nicbegin = priv->txvopringdma;
3438                break;
3439        case HI_PRIORITY:
3440                tail = priv->txhpringtail;
3441                begin = priv->txhpring;
3442                head = priv->txhpringhead;
3443                nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3444                nicbegin = priv->txhpringdma;
3445                break;
3446
3447        default:
3448                spin_unlock_irqrestore(&priv->tx_lock, flag);
3449                return ;
3450        }
3451
3452        nicv = (u32 *)((nic - nicbegin) + (u8 *)begin);
3453        if ((head <= tail && (nicv > tail || nicv < head)) ||
3454                (head > tail && (nicv > tail && nicv < head))) {
3455                        DMESGW("nic has lost pointer");
3456                        spin_unlock_irqrestore(&priv->tx_lock, flag);
3457                        rtl8180_restart(dev);
3458                        return;
3459                }
3460
3461        /*
3462         * We check all the descriptors between the head and the nic,
3463         * but not the currently pointed by the nic (the next to be txed)
3464         * and the previous of the pointed (might be in process ??)
3465         */
3466        offs = (nic - nicbegin);
3467        offs = offs / 8 / 4;
3468        hd = (head - begin) / 8;
3469
3470        if (offs >= hd)
3471                j = offs - hd;
3472        else
3473                j = offs + (priv->txringcount-1-hd);
3474
3475        j -= 2;
3476        if (j < 0)
3477                j = 0;
3478
3479        for (i = 0; i < j; i++) {
3480                if ((*head) & (1<<31))
3481                        break;
3482                if (((*head)&(0x10000000)) != 0) {
3483                        priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3484                        if (!error)
3485                                priv->NumTxOkTotal++;
3486                }
3487
3488                if (!error)
3489                        priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3490
3491                *head = *head & ~(1<<31);
3492
3493                if ((head - begin)/8 == priv->txringcount-1)
3494                        head = begin;
3495                else
3496                        head += 8;
3497        }
3498
3499        /*
3500         * The head has been moved to the last certainly TXed
3501         * (or at least processed by the nic) packet.
3502         * The driver take forcefully owning of all these packets
3503         * If the packet previous of the nic pointer has been
3504         * processed this doesn't matter: it will be checked
3505         * here at the next round. Anyway if no more packet are
3506         * TXed no memory leak occur at all.
3507         */
3508
3509        switch (pri) {
3510        case MANAGE_PRIORITY:
3511                priv->txmapringhead = head;
3512
3513                if (priv->ack_tx_to_ieee) {
3514                        if (rtl8180_is_tx_queue_empty(dev)) {
3515                                priv->ack_tx_to_ieee = 0;
3516                                ieee80211_ps_tx_ack(priv->ieee80211, !error);
3517                        }
3518                }
3519                break;
3520        case BK_PRIORITY:
3521                priv->txbkpringhead = head;
3522                break;
3523        case BE_PRIORITY:
3524                priv->txbepringhead = head;
3525                break;
3526        case VI_PRIORITY:
3527                priv->txvipringhead = head;
3528                break;
3529        case VO_PRIORITY:
3530                priv->txvopringhead = head;
3531                break;
3532        case HI_PRIORITY:
3533                priv->txhpringhead = head;
3534                break;
3535        }
3536
3537        spin_unlock_irqrestore(&priv->tx_lock, flag);
3538}
3539
3540irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3541{
3542        struct net_device *dev = (struct net_device *) netdev;
3543        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3544        unsigned long flags;
3545        u32 inta;
3546
3547        /* We should return IRQ_NONE, but for now let me keep this */
3548        if (priv->irq_enabled == 0)
3549                return IRQ_HANDLED;
3550
3551        spin_lock_irqsave(&priv->irq_th_lock, flags);
3552
3553        /* ISR: 4bytes */
3554        inta = read_nic_dword(dev, ISR); /* & priv->IntrMask; */
3555        write_nic_dword(dev, ISR, inta); /* reset int situation */
3556
3557        priv->stats.shints++;
3558
3559        if (!inta) {
3560                spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3561                return IRQ_HANDLED;
3562        /*
3563         * most probably we can safely return IRQ_NONE,
3564         * but for now is better to avoid problems
3565         */
3566        }
3567
3568        if (inta == 0xffff) {
3569                /* HW disappeared */
3570                spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3571                return IRQ_HANDLED;
3572        }
3573
3574        priv->stats.ints++;
3575
3576        if (!netif_running(dev)) {
3577                spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3578                return IRQ_HANDLED;
3579        }
3580
3581        if (inta & ISR_TimeOut)
3582                write_nic_dword(dev, TimerInt, 0);
3583
3584        if (inta & ISR_TBDOK)
3585                priv->stats.txbeacon++;
3586
3587        if (inta & ISR_TBDER)
3588                priv->stats.txbeaconerr++;
3589
3590        if (inta & IMR_TMGDOK)
3591                rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3592
3593        if (inta & ISR_THPDER) {
3594                priv->stats.txhperr++;
3595                rtl8180_tx_isr(dev, HI_PRIORITY, 1);
3596                priv->ieee80211->stats.tx_errors++;
3597        }
3598
3599        if (inta & ISR_THPDOK) { /* High priority tx ok */
3600                priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3601                priv->stats.txhpokint++;
3602                rtl8180_tx_isr(dev, HI_PRIORITY, 0);
3603        }
3604
3605        if (inta & ISR_RER)
3606                priv->stats.rxerr++;
3607
3608        if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
3609                priv->stats.txbkperr++;
3610                priv->ieee80211->stats.tx_errors++;
3611                rtl8180_tx_isr(dev, BK_PRIORITY, 1);
3612                rtl8180_try_wake_queue(dev, BK_PRIORITY);
3613        }
3614
3615        if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
3616                priv->stats.txbeperr++;
3617                priv->ieee80211->stats.tx_errors++;
3618                rtl8180_tx_isr(dev, BE_PRIORITY, 1);
3619                rtl8180_try_wake_queue(dev, BE_PRIORITY);
3620        }
3621        if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
3622                priv->stats.txnperr++;
3623                priv->ieee80211->stats.tx_errors++;
3624                rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
3625                rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3626        }
3627
3628        if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
3629                priv->stats.txlperr++;
3630                priv->ieee80211->stats.tx_errors++;
3631                rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
3632                rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3633        }
3634
3635        if (inta & ISR_ROK) {
3636                priv->stats.rxint++;
3637                tasklet_schedule(&priv->irq_rx_tasklet);
3638        }
3639
3640        if (inta & ISR_RQoSOK) {
3641                priv->stats.rxint++;
3642                tasklet_schedule(&priv->irq_rx_tasklet);
3643        }
3644
3645        if (inta & ISR_BcnInt)
3646                rtl8180_prepare_beacon(dev);
3647
3648        if (inta & ISR_RDU) {
3649                DMESGW("No RX descriptor available");
3650                priv->stats.rxrdu++;
3651                tasklet_schedule(&priv->irq_rx_tasklet);
3652        }
3653
3654        if (inta & ISR_RXFOVW) {
3655                priv->stats.rxoverflow++;
3656                tasklet_schedule(&priv->irq_rx_tasklet);
3657        }
3658
3659        if (inta & ISR_TXFOVW)
3660                priv->stats.txoverflow++;
3661
3662        if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
3663                priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3664                priv->stats.txnpokint++;
3665                rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
3666                rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3667        }
3668
3669        if (inta & ISR_TLPDOK) { /* Low priority tx ok */
3670                priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3671                priv->stats.txlpokint++;
3672                rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
3673                rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3674        }
3675
3676        if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
3677                priv->stats.txbkpokint++;
3678                priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3679                rtl8180_tx_isr(dev, BK_PRIORITY, 0);
3680                rtl8180_try_wake_queue(dev, BE_PRIORITY);
3681        }
3682
3683        if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
3684                priv->stats.txbeperr++;
3685                priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3686                rtl8180_tx_isr(dev, BE_PRIORITY, 0);
3687                rtl8180_try_wake_queue(dev, BE_PRIORITY);
3688        }
3689        force_pci_posting(dev);
3690        spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3691
3692        return IRQ_HANDLED;
3693}
3694
3695void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
3696{
3697        rtl8180_rx(priv->dev);
3698}
3699
3700void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
3701{
3702        struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
3703        struct net_device *dev = ieee->dev;
3704        struct r8180_priv *priv = ieee80211_priv(dev);
3705        u8 btPSR;
3706        u8 btConfig0;
3707        RT_RF_POWER_STATE       eRfPowerStateToSet;
3708        bool bActuallySet = false;
3709
3710        char *argv[3];
3711        static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
3712        static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
3713        static int readf_count;
3714
3715        readf_count = (readf_count+1)%0xffff;
3716        /* We should turn off LED before polling FF51[4]. */
3717
3718        /* Turn off LED. */
3719        btPSR = read_nic_byte(dev, PSR);
3720        write_nic_byte(dev, PSR, (btPSR & ~BIT3));
3721
3722        /* It need to delay 4us suggested by Jong, 2008-01-16 */
3723        udelay(4);
3724
3725        /* HW radio On/Off according to the value of FF51[4](config0) */
3726        btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
3727
3728        eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
3729
3730        /* Turn LED back on when radio enabled */
3731        if (eRfPowerStateToSet == eRfOn)
3732                write_nic_byte(dev, PSR, btPSR | BIT3);
3733
3734        if ((priv->ieee80211->bHwRadioOff == true) &&
3735           (eRfPowerStateToSet == eRfOn)) {
3736                priv->ieee80211->bHwRadioOff = false;
3737                bActuallySet = true;
3738        } else if ((priv->ieee80211->bHwRadioOff == false) &&
3739                  (eRfPowerStateToSet == eRfOff)) {
3740                priv->ieee80211->bHwRadioOff = true;
3741                bActuallySet = true;
3742        }
3743
3744        if (bActuallySet) {
3745                MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
3746
3747                /* To update the UI status for Power status changed */
3748                if (priv->ieee80211->bHwRadioOff == true)
3749                        argv[1] = "RFOFF";
3750                else
3751                        argv[1] = "RFON";
3752                argv[0] = RadioPowerPath;
3753                argv[2] = NULL;
3754
3755                call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
3756        }
3757}
3758
3759module_init(rtl8180_pci_module_init);
3760module_exit(rtl8180_pci_module_exit);
3761