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25#include <linux/module.h>
26#include <linux/tty.h>
27#include <linux/ioport.h>
28#include <linux/slab.h>
29#include <linux/init.h>
30#include <linux/serial.h>
31#include <linux/clk.h>
32#include <linux/console.h>
33#include <linux/sysrq.h>
34#include <linux/tty_flip.h>
35#include <linux/platform_device.h>
36#include <linux/of.h>
37#include <linux/of_device.h>
38#include <linux/dma-mapping.h>
39#include <linux/atmel_pdc.h>
40#include <linux/atmel_serial.h>
41#include <linux/uaccess.h>
42#include <linux/pinctrl/consumer.h>
43#include <linux/platform_data/atmel.h>
44
45#include <asm/io.h>
46#include <asm/ioctls.h>
47
48#ifdef CONFIG_ARM
49#include <mach/cpu.h>
50#include <asm/gpio.h>
51#endif
52
53#define PDC_BUFFER_SIZE 512
54
55#define PDC_RX_TIMEOUT (3 * 10)
56
57#if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
58#define SUPPORT_SYSRQ
59#endif
60
61#include <linux/serial_core.h>
62
63static void atmel_start_rx(struct uart_port *port);
64static void atmel_stop_rx(struct uart_port *port);
65
66#ifdef CONFIG_SERIAL_ATMEL_TTYAT
67
68
69
70
71#define SERIAL_ATMEL_MAJOR 204
72#define MINOR_START 154
73#define ATMEL_DEVICENAME "ttyAT"
74
75#else
76
77
78
79#define SERIAL_ATMEL_MAJOR TTY_MAJOR
80#define MINOR_START 64
81#define ATMEL_DEVICENAME "ttyS"
82
83#endif
84
85#define ATMEL_ISR_PASS_LIMIT 256
86
87
88#define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
89#define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
90#define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
91#define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
92#define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
93#define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
94#define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
95#define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
96#define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
97#define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
98#define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
99#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
100#define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
101
102
103#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
104#define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
105
106#define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
107#define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
108#define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
109#define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
110#define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
111
112#define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
113#define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
114#define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
115
116static int (*atmel_open_hook)(struct uart_port *);
117static void (*atmel_close_hook)(struct uart_port *);
118
119struct atmel_dma_buffer {
120 unsigned char *buf;
121 dma_addr_t dma_addr;
122 unsigned int dma_size;
123 unsigned int ofs;
124};
125
126struct atmel_uart_char {
127 u16 status;
128 u16 ch;
129};
130
131#define ATMEL_SERIAL_RINGSIZE 1024
132
133
134
135
136struct atmel_uart_port {
137 struct uart_port uart;
138 struct clk *clk;
139 int may_wakeup;
140 u32 backup_imr;
141 int break_active;
142
143 short use_dma_rx;
144 short pdc_rx_idx;
145 struct atmel_dma_buffer pdc_rx[2];
146
147 short use_dma_tx;
148 struct atmel_dma_buffer pdc_tx;
149
150 struct tasklet_struct tasklet;
151 unsigned int irq_status;
152 unsigned int irq_status_prev;
153
154 struct circ_buf rx_ring;
155
156 struct serial_rs485 rs485;
157 unsigned int tx_done_mask;
158};
159
160static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
161static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART);
162
163#ifdef SUPPORT_SYSRQ
164static struct console atmel_console;
165#endif
166
167#if defined(CONFIG_OF)
168static const struct of_device_id atmel_serial_dt_ids[] = {
169 { .compatible = "atmel,at91rm9200-usart" },
170 { .compatible = "atmel,at91sam9260-usart" },
171 { }
172};
173
174MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
175#endif
176
177static inline struct atmel_uart_port *
178to_atmel_uart_port(struct uart_port *uart)
179{
180 return container_of(uart, struct atmel_uart_port, uart);
181}
182
183#ifdef CONFIG_SERIAL_ATMEL_PDC
184static bool atmel_use_dma_rx(struct uart_port *port)
185{
186 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
187
188 return atmel_port->use_dma_rx;
189}
190
191static bool atmel_use_dma_tx(struct uart_port *port)
192{
193 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
194
195 return atmel_port->use_dma_tx;
196}
197#else
198static bool atmel_use_dma_rx(struct uart_port *port)
199{
200 return false;
201}
202
203static bool atmel_use_dma_tx(struct uart_port *port)
204{
205 return false;
206}
207#endif
208
209
210void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
211{
212 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
213 unsigned int mode;
214 unsigned long flags;
215
216 spin_lock_irqsave(&port->lock, flags);
217
218
219 UART_PUT_IDR(port, atmel_port->tx_done_mask);
220
221 mode = UART_GET_MR(port);
222
223
224 mode &= ~ATMEL_US_USMODE;
225
226 atmel_port->rs485 = *rs485conf;
227
228 if (rs485conf->flags & SER_RS485_ENABLED) {
229 dev_dbg(port->dev, "Setting UART to RS485\n");
230 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
231 if ((rs485conf->delay_rts_after_send) > 0)
232 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
233 mode |= ATMEL_US_USMODE_RS485;
234 } else {
235 dev_dbg(port->dev, "Setting UART to RS232\n");
236 if (atmel_use_dma_tx(port))
237 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
238 ATMEL_US_TXBUFE;
239 else
240 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
241 }
242 UART_PUT_MR(port, mode);
243
244
245 UART_PUT_IER(port, atmel_port->tx_done_mask);
246
247 spin_unlock_irqrestore(&port->lock, flags);
248
249}
250
251
252
253
254static u_int atmel_tx_empty(struct uart_port *port)
255{
256 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
257}
258
259
260
261
262static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
263{
264 unsigned int control = 0;
265 unsigned int mode;
266 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
267
268#ifdef CONFIG_ARCH_AT91RM9200
269 if (cpu_is_at91rm9200()) {
270
271
272
273
274 if (port->mapbase == AT91RM9200_BASE_US0) {
275 if (mctrl & TIOCM_RTS)
276 at91_set_gpio_value(AT91_PIN_PA21, 0);
277 else
278 at91_set_gpio_value(AT91_PIN_PA21, 1);
279 }
280 }
281#endif
282
283 if (mctrl & TIOCM_RTS)
284 control |= ATMEL_US_RTSEN;
285 else
286 control |= ATMEL_US_RTSDIS;
287
288 if (mctrl & TIOCM_DTR)
289 control |= ATMEL_US_DTREN;
290 else
291 control |= ATMEL_US_DTRDIS;
292
293 UART_PUT_CR(port, control);
294
295
296 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
297 if (mctrl & TIOCM_LOOP)
298 mode |= ATMEL_US_CHMODE_LOC_LOOP;
299 else
300 mode |= ATMEL_US_CHMODE_NORMAL;
301
302
303 mode &= ~ATMEL_US_USMODE;
304
305 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
306 dev_dbg(port->dev, "Setting UART to RS485\n");
307 if ((atmel_port->rs485.delay_rts_after_send) > 0)
308 UART_PUT_TTGR(port,
309 atmel_port->rs485.delay_rts_after_send);
310 mode |= ATMEL_US_USMODE_RS485;
311 } else {
312 dev_dbg(port->dev, "Setting UART to RS232\n");
313 }
314 UART_PUT_MR(port, mode);
315}
316
317
318
319
320static u_int atmel_get_mctrl(struct uart_port *port)
321{
322 unsigned int status, ret = 0;
323
324 status = UART_GET_CSR(port);
325
326
327
328
329 if (!(status & ATMEL_US_DCD))
330 ret |= TIOCM_CD;
331 if (!(status & ATMEL_US_CTS))
332 ret |= TIOCM_CTS;
333 if (!(status & ATMEL_US_DSR))
334 ret |= TIOCM_DSR;
335 if (!(status & ATMEL_US_RI))
336 ret |= TIOCM_RI;
337
338 return ret;
339}
340
341
342
343
344static void atmel_stop_tx(struct uart_port *port)
345{
346 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
347
348 if (atmel_use_dma_tx(port)) {
349
350 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
351 }
352
353 UART_PUT_IDR(port, atmel_port->tx_done_mask);
354
355 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
356 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
357 atmel_start_rx(port);
358}
359
360
361
362
363static void atmel_start_tx(struct uart_port *port)
364{
365 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
366
367 if (atmel_use_dma_tx(port)) {
368 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
369
370
371 return;
372
373 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
374 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
375 atmel_stop_rx(port);
376
377
378 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
379 }
380
381 UART_PUT_IER(port, atmel_port->tx_done_mask);
382}
383
384
385
386
387static void atmel_start_rx(struct uart_port *port)
388{
389 UART_PUT_CR(port, ATMEL_US_RSTSTA);
390
391 UART_PUT_CR(port, ATMEL_US_RXEN);
392
393 if (atmel_use_dma_rx(port)) {
394
395 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
396 port->read_status_mask);
397 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
398 } else {
399 UART_PUT_IER(port, ATMEL_US_RXRDY);
400 }
401}
402
403
404
405
406static void atmel_stop_rx(struct uart_port *port)
407{
408 UART_PUT_CR(port, ATMEL_US_RXDIS);
409
410 if (atmel_use_dma_rx(port)) {
411
412 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
413 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
414 port->read_status_mask);
415 } else {
416 UART_PUT_IDR(port, ATMEL_US_RXRDY);
417 }
418}
419
420
421
422
423static void atmel_enable_ms(struct uart_port *port)
424{
425 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
426 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
427}
428
429
430
431
432static void atmel_break_ctl(struct uart_port *port, int break_state)
433{
434 if (break_state != 0)
435 UART_PUT_CR(port, ATMEL_US_STTBRK);
436 else
437 UART_PUT_CR(port, ATMEL_US_STPBRK);
438}
439
440
441
442
443static void
444atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
445 unsigned int ch)
446{
447 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
448 struct circ_buf *ring = &atmel_port->rx_ring;
449 struct atmel_uart_char *c;
450
451 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
452
453 return;
454
455 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
456 c->status = status;
457 c->ch = ch;
458
459
460 smp_wmb();
461
462 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
463}
464
465
466
467
468static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
469{
470
471 UART_PUT_CR(port, ATMEL_US_RSTSTA);
472
473 if (status & ATMEL_US_RXBRK) {
474
475 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
476 port->icount.brk++;
477 }
478 if (status & ATMEL_US_PARE)
479 port->icount.parity++;
480 if (status & ATMEL_US_FRAME)
481 port->icount.frame++;
482 if (status & ATMEL_US_OVRE)
483 port->icount.overrun++;
484}
485
486
487
488
489static void atmel_rx_chars(struct uart_port *port)
490{
491 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
492 unsigned int status, ch;
493
494 status = UART_GET_CSR(port);
495 while (status & ATMEL_US_RXRDY) {
496 ch = UART_GET_CHAR(port);
497
498
499
500
501
502 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
503 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
504 || atmel_port->break_active)) {
505
506
507 UART_PUT_CR(port, ATMEL_US_RSTSTA);
508
509 if (status & ATMEL_US_RXBRK
510 && !atmel_port->break_active) {
511 atmel_port->break_active = 1;
512 UART_PUT_IER(port, ATMEL_US_RXBRK);
513 } else {
514
515
516
517
518
519
520
521 UART_PUT_IDR(port, ATMEL_US_RXBRK);
522 status &= ~ATMEL_US_RXBRK;
523 atmel_port->break_active = 0;
524 }
525 }
526
527 atmel_buffer_rx_char(port, status, ch);
528 status = UART_GET_CSR(port);
529 }
530
531 tasklet_schedule(&atmel_port->tasklet);
532}
533
534
535
536
537
538static void atmel_tx_chars(struct uart_port *port)
539{
540 struct circ_buf *xmit = &port->state->xmit;
541 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
542
543 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
544 UART_PUT_CHAR(port, port->x_char);
545 port->icount.tx++;
546 port->x_char = 0;
547 }
548 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
549 return;
550
551 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
552 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
553 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
554 port->icount.tx++;
555 if (uart_circ_empty(xmit))
556 break;
557 }
558
559 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
560 uart_write_wakeup(port);
561
562 if (!uart_circ_empty(xmit))
563
564 UART_PUT_IER(port, atmel_port->tx_done_mask);
565}
566
567
568
569
570static void
571atmel_handle_receive(struct uart_port *port, unsigned int pending)
572{
573 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
574
575 if (atmel_use_dma_rx(port)) {
576
577
578
579
580
581
582
583 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
584 UART_PUT_IDR(port, (ATMEL_US_ENDRX
585 | ATMEL_US_TIMEOUT));
586 tasklet_schedule(&atmel_port->tasklet);
587 }
588
589 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
590 ATMEL_US_FRAME | ATMEL_US_PARE))
591 atmel_pdc_rxerr(port, pending);
592 }
593
594
595 if (pending & ATMEL_US_RXRDY)
596 atmel_rx_chars(port);
597 else if (pending & ATMEL_US_RXBRK) {
598
599
600
601
602 UART_PUT_CR(port, ATMEL_US_RSTSTA);
603 UART_PUT_IDR(port, ATMEL_US_RXBRK);
604 atmel_port->break_active = 0;
605 }
606}
607
608
609
610
611static void
612atmel_handle_transmit(struct uart_port *port, unsigned int pending)
613{
614 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
615
616 if (pending & atmel_port->tx_done_mask) {
617
618 UART_PUT_IDR(port, atmel_port->tx_done_mask);
619 tasklet_schedule(&atmel_port->tasklet);
620 }
621}
622
623
624
625
626static void
627atmel_handle_status(struct uart_port *port, unsigned int pending,
628 unsigned int status)
629{
630 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
631
632 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
633 | ATMEL_US_CTSIC)) {
634 atmel_port->irq_status = status;
635 tasklet_schedule(&atmel_port->tasklet);
636 }
637}
638
639
640
641
642static irqreturn_t atmel_interrupt(int irq, void *dev_id)
643{
644 struct uart_port *port = dev_id;
645 unsigned int status, pending, pass_counter = 0;
646
647 do {
648 status = UART_GET_CSR(port);
649 pending = status & UART_GET_IMR(port);
650 if (!pending)
651 break;
652
653 atmel_handle_receive(port, pending);
654 atmel_handle_status(port, pending, status);
655 atmel_handle_transmit(port, pending);
656 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
657
658 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
659}
660
661
662
663
664static void atmel_tx_dma(struct uart_port *port)
665{
666 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
667 struct circ_buf *xmit = &port->state->xmit;
668 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
669 int count;
670
671
672 if (UART_GET_TCR(port))
673 return;
674
675 xmit->tail += pdc->ofs;
676 xmit->tail &= UART_XMIT_SIZE - 1;
677
678 port->icount.tx += pdc->ofs;
679 pdc->ofs = 0;
680
681
682
683
684 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
685
686 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
687 dma_sync_single_for_device(port->dev,
688 pdc->dma_addr,
689 pdc->dma_size,
690 DMA_TO_DEVICE);
691
692 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
693 pdc->ofs = count;
694
695 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
696 UART_PUT_TCR(port, count);
697
698 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
699
700 UART_PUT_IER(port, atmel_port->tx_done_mask);
701 } else {
702 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
703 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
704
705 atmel_start_rx(port);
706 }
707 }
708
709 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
710 uart_write_wakeup(port);
711}
712
713static void atmel_rx_from_ring(struct uart_port *port)
714{
715 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
716 struct circ_buf *ring = &atmel_port->rx_ring;
717 unsigned int flg;
718 unsigned int status;
719
720 while (ring->head != ring->tail) {
721 struct atmel_uart_char c;
722
723
724 smp_rmb();
725
726 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
727
728 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
729
730 port->icount.rx++;
731 status = c.status;
732 flg = TTY_NORMAL;
733
734
735
736
737
738 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
739 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
740 if (status & ATMEL_US_RXBRK) {
741
742 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
743
744 port->icount.brk++;
745 if (uart_handle_break(port))
746 continue;
747 }
748 if (status & ATMEL_US_PARE)
749 port->icount.parity++;
750 if (status & ATMEL_US_FRAME)
751 port->icount.frame++;
752 if (status & ATMEL_US_OVRE)
753 port->icount.overrun++;
754
755 status &= port->read_status_mask;
756
757 if (status & ATMEL_US_RXBRK)
758 flg = TTY_BREAK;
759 else if (status & ATMEL_US_PARE)
760 flg = TTY_PARITY;
761 else if (status & ATMEL_US_FRAME)
762 flg = TTY_FRAME;
763 }
764
765
766 if (uart_handle_sysrq_char(port, c.ch))
767 continue;
768
769 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
770 }
771
772
773
774
775
776 spin_unlock(&port->lock);
777 tty_flip_buffer_push(&port->state->port);
778 spin_lock(&port->lock);
779}
780
781static void atmel_rx_from_dma(struct uart_port *port)
782{
783 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
784 struct tty_port *tport = &port->state->port;
785 struct atmel_dma_buffer *pdc;
786 int rx_idx = atmel_port->pdc_rx_idx;
787 unsigned int head;
788 unsigned int tail;
789 unsigned int count;
790
791 do {
792
793 UART_PUT_CR(port, ATMEL_US_STTTO);
794
795 pdc = &atmel_port->pdc_rx[rx_idx];
796 head = UART_GET_RPR(port) - pdc->dma_addr;
797 tail = pdc->ofs;
798
799
800
801
802
803
804
805
806
807
808
809 head = min(head, pdc->dma_size);
810
811 if (likely(head != tail)) {
812 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
813 pdc->dma_size, DMA_FROM_DEVICE);
814
815
816
817
818
819
820
821 count = head - tail;
822
823 tty_insert_flip_string(tport, pdc->buf + pdc->ofs,
824 count);
825
826 dma_sync_single_for_device(port->dev, pdc->dma_addr,
827 pdc->dma_size, DMA_FROM_DEVICE);
828
829 port->icount.rx += count;
830 pdc->ofs = head;
831 }
832
833
834
835
836
837 if (head >= pdc->dma_size) {
838 pdc->ofs = 0;
839 UART_PUT_RNPR(port, pdc->dma_addr);
840 UART_PUT_RNCR(port, pdc->dma_size);
841
842 rx_idx = !rx_idx;
843 atmel_port->pdc_rx_idx = rx_idx;
844 }
845 } while (head >= pdc->dma_size);
846
847
848
849
850
851 spin_unlock(&port->lock);
852 tty_flip_buffer_push(tport);
853 spin_lock(&port->lock);
854
855 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
856}
857
858
859
860
861static void atmel_tasklet_func(unsigned long data)
862{
863 struct uart_port *port = (struct uart_port *)data;
864 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
865 unsigned int status;
866 unsigned int status_change;
867
868
869 spin_lock(&port->lock);
870
871 if (atmel_use_dma_tx(port))
872 atmel_tx_dma(port);
873 else
874 atmel_tx_chars(port);
875
876 status = atmel_port->irq_status;
877 status_change = status ^ atmel_port->irq_status_prev;
878
879 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
880 | ATMEL_US_DCD | ATMEL_US_CTS)) {
881
882 if (status_change & ATMEL_US_RI)
883 port->icount.rng++;
884 if (status_change & ATMEL_US_DSR)
885 port->icount.dsr++;
886 if (status_change & ATMEL_US_DCD)
887 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
888 if (status_change & ATMEL_US_CTS)
889 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
890
891 wake_up_interruptible(&port->state->port.delta_msr_wait);
892
893 atmel_port->irq_status_prev = status;
894 }
895
896 if (atmel_use_dma_rx(port))
897 atmel_rx_from_dma(port);
898 else
899 atmel_rx_from_ring(port);
900
901 spin_unlock(&port->lock);
902}
903
904
905
906
907static int atmel_startup(struct uart_port *port)
908{
909 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
910 struct tty_struct *tty = port->state->port.tty;
911 int retval;
912
913
914
915
916
917
918 UART_PUT_IDR(port, -1);
919
920
921
922
923 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
924 tty ? tty->name : "atmel_serial", port);
925 if (retval) {
926 printk("atmel_serial: atmel_startup - Can't get irq\n");
927 return retval;
928 }
929
930
931
932
933 if (atmel_use_dma_rx(port)) {
934 int i;
935
936 for (i = 0; i < 2; i++) {
937 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
938
939 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
940 if (pdc->buf == NULL) {
941 if (i != 0) {
942 dma_unmap_single(port->dev,
943 atmel_port->pdc_rx[0].dma_addr,
944 PDC_BUFFER_SIZE,
945 DMA_FROM_DEVICE);
946 kfree(atmel_port->pdc_rx[0].buf);
947 }
948 free_irq(port->irq, port);
949 return -ENOMEM;
950 }
951 pdc->dma_addr = dma_map_single(port->dev,
952 pdc->buf,
953 PDC_BUFFER_SIZE,
954 DMA_FROM_DEVICE);
955 pdc->dma_size = PDC_BUFFER_SIZE;
956 pdc->ofs = 0;
957 }
958
959 atmel_port->pdc_rx_idx = 0;
960
961 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
962 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
963
964 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
965 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
966 }
967 if (atmel_use_dma_tx(port)) {
968 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
969 struct circ_buf *xmit = &port->state->xmit;
970
971 pdc->buf = xmit->buf;
972 pdc->dma_addr = dma_map_single(port->dev,
973 pdc->buf,
974 UART_XMIT_SIZE,
975 DMA_TO_DEVICE);
976 pdc->dma_size = UART_XMIT_SIZE;
977 pdc->ofs = 0;
978 }
979
980
981
982
983
984 if (atmel_open_hook) {
985 retval = atmel_open_hook(port);
986 if (retval) {
987 free_irq(port->irq, port);
988 return retval;
989 }
990 }
991
992
993 atmel_port->irq_status_prev = UART_GET_CSR(port);
994 atmel_port->irq_status = atmel_port->irq_status_prev;
995
996
997
998
999 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1000
1001 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1002
1003 if (atmel_use_dma_rx(port)) {
1004
1005 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1006 UART_PUT_CR(port, ATMEL_US_STTTO);
1007
1008 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1009
1010 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
1011 } else {
1012
1013 UART_PUT_IER(port, ATMEL_US_RXRDY);
1014 }
1015
1016 return 0;
1017}
1018
1019
1020
1021
1022static void atmel_shutdown(struct uart_port *port)
1023{
1024 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1025
1026
1027
1028 atmel_stop_rx(port);
1029 atmel_stop_tx(port);
1030
1031
1032
1033
1034 if (atmel_use_dma_rx(port)) {
1035 int i;
1036
1037 for (i = 0; i < 2; i++) {
1038 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1039
1040 dma_unmap_single(port->dev,
1041 pdc->dma_addr,
1042 pdc->dma_size,
1043 DMA_FROM_DEVICE);
1044 kfree(pdc->buf);
1045 }
1046 }
1047 if (atmel_use_dma_tx(port)) {
1048 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1049
1050 dma_unmap_single(port->dev,
1051 pdc->dma_addr,
1052 pdc->dma_size,
1053 DMA_TO_DEVICE);
1054 }
1055
1056
1057
1058
1059 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1060 UART_PUT_IDR(port, -1);
1061
1062
1063
1064
1065 free_irq(port->irq, port);
1066
1067
1068
1069
1070
1071 if (atmel_close_hook)
1072 atmel_close_hook(port);
1073}
1074
1075
1076
1077
1078
1079static void atmel_flush_buffer(struct uart_port *port)
1080{
1081 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1082
1083 if (atmel_use_dma_tx(port)) {
1084 UART_PUT_TCR(port, 0);
1085 atmel_port->pdc_tx.ofs = 0;
1086 }
1087}
1088
1089
1090
1091
1092static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1093 unsigned int oldstate)
1094{
1095 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1096
1097 switch (state) {
1098 case 0:
1099
1100
1101
1102
1103 clk_prepare_enable(atmel_port->clk);
1104
1105
1106 UART_PUT_IER(port, atmel_port->backup_imr);
1107 break;
1108 case 3:
1109
1110 atmel_port->backup_imr = UART_GET_IMR(port);
1111 UART_PUT_IDR(port, -1);
1112
1113
1114
1115
1116
1117 clk_disable_unprepare(atmel_port->clk);
1118 break;
1119 default:
1120 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
1121 }
1122}
1123
1124
1125
1126
1127static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1128 struct ktermios *old)
1129{
1130 unsigned long flags;
1131 unsigned int mode, imr, quot, baud;
1132 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1133
1134
1135 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1136 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1137 | ATMEL_US_USMODE);
1138
1139 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1140 quot = uart_get_divisor(port, baud);
1141
1142 if (quot > 65535) {
1143 quot /= 8;
1144 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1145 }
1146
1147
1148 switch (termios->c_cflag & CSIZE) {
1149 case CS5:
1150 mode |= ATMEL_US_CHRL_5;
1151 break;
1152 case CS6:
1153 mode |= ATMEL_US_CHRL_6;
1154 break;
1155 case CS7:
1156 mode |= ATMEL_US_CHRL_7;
1157 break;
1158 default:
1159 mode |= ATMEL_US_CHRL_8;
1160 break;
1161 }
1162
1163
1164 if (termios->c_cflag & CSTOPB)
1165 mode |= ATMEL_US_NBSTOP_2;
1166
1167
1168 if (termios->c_cflag & PARENB) {
1169
1170 if (termios->c_cflag & CMSPAR) {
1171 if (termios->c_cflag & PARODD)
1172 mode |= ATMEL_US_PAR_MARK;
1173 else
1174 mode |= ATMEL_US_PAR_SPACE;
1175 } else if (termios->c_cflag & PARODD)
1176 mode |= ATMEL_US_PAR_ODD;
1177 else
1178 mode |= ATMEL_US_PAR_EVEN;
1179 } else
1180 mode |= ATMEL_US_PAR_NONE;
1181
1182
1183 if (termios->c_cflag & CRTSCTS)
1184 mode |= ATMEL_US_USMODE_HWHS;
1185 else
1186 mode |= ATMEL_US_USMODE_NORMAL;
1187
1188 spin_lock_irqsave(&port->lock, flags);
1189
1190 port->read_status_mask = ATMEL_US_OVRE;
1191 if (termios->c_iflag & INPCK)
1192 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1193 if (termios->c_iflag & (BRKINT | PARMRK))
1194 port->read_status_mask |= ATMEL_US_RXBRK;
1195
1196 if (atmel_use_dma_rx(port))
1197
1198 UART_PUT_IER(port, port->read_status_mask);
1199
1200
1201
1202
1203 port->ignore_status_mask = 0;
1204 if (termios->c_iflag & IGNPAR)
1205 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1206 if (termios->c_iflag & IGNBRK) {
1207 port->ignore_status_mask |= ATMEL_US_RXBRK;
1208
1209
1210
1211
1212 if (termios->c_iflag & IGNPAR)
1213 port->ignore_status_mask |= ATMEL_US_OVRE;
1214 }
1215
1216
1217
1218 uart_update_timeout(port, termios->c_cflag, baud);
1219
1220
1221
1222
1223
1224
1225 imr = UART_GET_IMR(port);
1226 UART_PUT_IDR(port, -1);
1227
1228
1229 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1230
1231
1232 mode &= ~ATMEL_US_USMODE;
1233
1234 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1235 dev_dbg(port->dev, "Setting UART to RS485\n");
1236 if ((atmel_port->rs485.delay_rts_after_send) > 0)
1237 UART_PUT_TTGR(port,
1238 atmel_port->rs485.delay_rts_after_send);
1239 mode |= ATMEL_US_USMODE_RS485;
1240 } else {
1241 dev_dbg(port->dev, "Setting UART to RS232\n");
1242 }
1243
1244
1245 UART_PUT_MR(port, mode);
1246
1247
1248 UART_PUT_BRGR(port, quot);
1249 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1250 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1251
1252
1253 UART_PUT_IER(port, imr);
1254
1255
1256 if (UART_ENABLE_MS(port, termios->c_cflag))
1257 port->ops->enable_ms(port);
1258
1259 spin_unlock_irqrestore(&port->lock, flags);
1260}
1261
1262static void atmel_set_ldisc(struct uart_port *port, int new)
1263{
1264 if (new == N_PPS) {
1265 port->flags |= UPF_HARDPPS_CD;
1266 atmel_enable_ms(port);
1267 } else {
1268 port->flags &= ~UPF_HARDPPS_CD;
1269 }
1270}
1271
1272
1273
1274
1275static const char *atmel_type(struct uart_port *port)
1276{
1277 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1278}
1279
1280
1281
1282
1283static void atmel_release_port(struct uart_port *port)
1284{
1285 struct platform_device *pdev = to_platform_device(port->dev);
1286 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1287
1288 release_mem_region(port->mapbase, size);
1289
1290 if (port->flags & UPF_IOREMAP) {
1291 iounmap(port->membase);
1292 port->membase = NULL;
1293 }
1294}
1295
1296
1297
1298
1299static int atmel_request_port(struct uart_port *port)
1300{
1301 struct platform_device *pdev = to_platform_device(port->dev);
1302 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1303
1304 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1305 return -EBUSY;
1306
1307 if (port->flags & UPF_IOREMAP) {
1308 port->membase = ioremap(port->mapbase, size);
1309 if (port->membase == NULL) {
1310 release_mem_region(port->mapbase, size);
1311 return -ENOMEM;
1312 }
1313 }
1314
1315 return 0;
1316}
1317
1318
1319
1320
1321static void atmel_config_port(struct uart_port *port, int flags)
1322{
1323 if (flags & UART_CONFIG_TYPE) {
1324 port->type = PORT_ATMEL;
1325 atmel_request_port(port);
1326 }
1327}
1328
1329
1330
1331
1332static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1333{
1334 int ret = 0;
1335 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1336 ret = -EINVAL;
1337 if (port->irq != ser->irq)
1338 ret = -EINVAL;
1339 if (ser->io_type != SERIAL_IO_MEM)
1340 ret = -EINVAL;
1341 if (port->uartclk / 16 != ser->baud_base)
1342 ret = -EINVAL;
1343 if ((void *)port->mapbase != ser->iomem_base)
1344 ret = -EINVAL;
1345 if (port->iobase != ser->port)
1346 ret = -EINVAL;
1347 if (ser->hub6 != 0)
1348 ret = -EINVAL;
1349 return ret;
1350}
1351
1352#ifdef CONFIG_CONSOLE_POLL
1353static int atmel_poll_get_char(struct uart_port *port)
1354{
1355 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
1356 cpu_relax();
1357
1358 return UART_GET_CHAR(port);
1359}
1360
1361static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1362{
1363 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1364 cpu_relax();
1365
1366 UART_PUT_CHAR(port, ch);
1367}
1368#endif
1369
1370static int
1371atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
1372{
1373 struct serial_rs485 rs485conf;
1374
1375 switch (cmd) {
1376 case TIOCSRS485:
1377 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
1378 sizeof(rs485conf)))
1379 return -EFAULT;
1380
1381 atmel_config_rs485(port, &rs485conf);
1382 break;
1383
1384 case TIOCGRS485:
1385 if (copy_to_user((struct serial_rs485 *) arg,
1386 &(to_atmel_uart_port(port)->rs485),
1387 sizeof(rs485conf)))
1388 return -EFAULT;
1389 break;
1390
1391 default:
1392 return -ENOIOCTLCMD;
1393 }
1394 return 0;
1395}
1396
1397
1398
1399static struct uart_ops atmel_pops = {
1400 .tx_empty = atmel_tx_empty,
1401 .set_mctrl = atmel_set_mctrl,
1402 .get_mctrl = atmel_get_mctrl,
1403 .stop_tx = atmel_stop_tx,
1404 .start_tx = atmel_start_tx,
1405 .stop_rx = atmel_stop_rx,
1406 .enable_ms = atmel_enable_ms,
1407 .break_ctl = atmel_break_ctl,
1408 .startup = atmel_startup,
1409 .shutdown = atmel_shutdown,
1410 .flush_buffer = atmel_flush_buffer,
1411 .set_termios = atmel_set_termios,
1412 .set_ldisc = atmel_set_ldisc,
1413 .type = atmel_type,
1414 .release_port = atmel_release_port,
1415 .request_port = atmel_request_port,
1416 .config_port = atmel_config_port,
1417 .verify_port = atmel_verify_port,
1418 .pm = atmel_serial_pm,
1419 .ioctl = atmel_ioctl,
1420#ifdef CONFIG_CONSOLE_POLL
1421 .poll_get_char = atmel_poll_get_char,
1422 .poll_put_char = atmel_poll_put_char,
1423#endif
1424};
1425
1426static void atmel_of_init_port(struct atmel_uart_port *atmel_port,
1427 struct device_node *np)
1428{
1429 u32 rs485_delay[2];
1430
1431
1432 if (of_get_property(np, "atmel,use-dma-rx", NULL))
1433 atmel_port->use_dma_rx = 1;
1434 else
1435 atmel_port->use_dma_rx = 0;
1436 if (of_get_property(np, "atmel,use-dma-tx", NULL))
1437 atmel_port->use_dma_tx = 1;
1438 else
1439 atmel_port->use_dma_tx = 0;
1440
1441
1442 if (of_property_read_u32_array(np, "rs485-rts-delay",
1443 rs485_delay, 2) == 0) {
1444 struct serial_rs485 *rs485conf = &atmel_port->rs485;
1445
1446 rs485conf->delay_rts_before_send = rs485_delay[0];
1447 rs485conf->delay_rts_after_send = rs485_delay[1];
1448 rs485conf->flags = 0;
1449
1450 if (of_get_property(np, "rs485-rx-during-tx", NULL))
1451 rs485conf->flags |= SER_RS485_RX_DURING_TX;
1452
1453 if (of_get_property(np, "linux,rs485-enabled-at-boot-time", NULL))
1454 rs485conf->flags |= SER_RS485_ENABLED;
1455 }
1456}
1457
1458
1459
1460
1461static int atmel_init_port(struct atmel_uart_port *atmel_port,
1462 struct platform_device *pdev)
1463{
1464 int ret;
1465 struct uart_port *port = &atmel_port->uart;
1466 struct atmel_uart_data *pdata = pdev->dev.platform_data;
1467
1468 if (pdev->dev.of_node) {
1469 atmel_of_init_port(atmel_port, pdev->dev.of_node);
1470 } else {
1471 atmel_port->use_dma_rx = pdata->use_dma_rx;
1472 atmel_port->use_dma_tx = pdata->use_dma_tx;
1473 atmel_port->rs485 = pdata->rs485;
1474 }
1475
1476 port->iotype = UPIO_MEM;
1477 port->flags = UPF_BOOT_AUTOCONF;
1478 port->ops = &atmel_pops;
1479 port->fifosize = 1;
1480 port->dev = &pdev->dev;
1481 port->mapbase = pdev->resource[0].start;
1482 port->irq = pdev->resource[1].start;
1483
1484 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
1485 (unsigned long)port);
1486
1487 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
1488
1489 if (pdata && pdata->regs) {
1490
1491 port->membase = pdata->regs;
1492 } else {
1493 port->flags |= UPF_IOREMAP;
1494 port->membase = NULL;
1495 }
1496
1497
1498 if (!atmel_port->clk) {
1499 atmel_port->clk = clk_get(&pdev->dev, "usart");
1500 if (IS_ERR(atmel_port->clk)) {
1501 ret = PTR_ERR(atmel_port->clk);
1502 atmel_port->clk = NULL;
1503 return ret;
1504 }
1505 ret = clk_prepare_enable(atmel_port->clk);
1506 if (ret) {
1507 clk_put(atmel_port->clk);
1508 atmel_port->clk = NULL;
1509 return ret;
1510 }
1511 port->uartclk = clk_get_rate(atmel_port->clk);
1512 clk_disable_unprepare(atmel_port->clk);
1513
1514 }
1515
1516
1517 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
1518 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
1519 else if (atmel_use_dma_tx(port)) {
1520 port->fifosize = PDC_BUFFER_SIZE;
1521 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
1522 } else {
1523 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
1524 }
1525
1526 return 0;
1527}
1528
1529struct platform_device *atmel_default_console_device;
1530
1531#ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1532static void atmel_console_putchar(struct uart_port *port, int ch)
1533{
1534 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1535 cpu_relax();
1536 UART_PUT_CHAR(port, ch);
1537}
1538
1539
1540
1541
1542static void atmel_console_write(struct console *co, const char *s, u_int count)
1543{
1544 struct uart_port *port = &atmel_ports[co->index].uart;
1545 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1546 unsigned int status, imr;
1547 unsigned int pdc_tx;
1548
1549
1550
1551
1552 imr = UART_GET_IMR(port);
1553 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
1554
1555
1556 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
1557 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1558
1559 uart_console_write(port, s, count, atmel_console_putchar);
1560
1561
1562
1563
1564
1565 do {
1566 status = UART_GET_CSR(port);
1567 } while (!(status & ATMEL_US_TXRDY));
1568
1569
1570 if (pdc_tx)
1571 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1572
1573
1574 UART_PUT_IER(port, imr);
1575}
1576
1577
1578
1579
1580
1581static void __init atmel_console_get_options(struct uart_port *port, int *baud,
1582 int *parity, int *bits)
1583{
1584 unsigned int mr, quot;
1585
1586
1587
1588
1589
1590 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
1591 if (!quot)
1592 return;
1593
1594 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
1595 if (mr == ATMEL_US_CHRL_8)
1596 *bits = 8;
1597 else
1598 *bits = 7;
1599
1600 mr = UART_GET_MR(port) & ATMEL_US_PAR;
1601 if (mr == ATMEL_US_PAR_EVEN)
1602 *parity = 'e';
1603 else if (mr == ATMEL_US_PAR_ODD)
1604 *parity = 'o';
1605
1606
1607
1608
1609
1610
1611
1612 *baud = port->uartclk / (16 * (quot - 1));
1613}
1614
1615static int __init atmel_console_setup(struct console *co, char *options)
1616{
1617 int ret;
1618 struct uart_port *port = &atmel_ports[co->index].uart;
1619 int baud = 115200;
1620 int bits = 8;
1621 int parity = 'n';
1622 int flow = 'n';
1623
1624 if (port->membase == NULL) {
1625
1626 return -ENODEV;
1627 }
1628
1629 ret = clk_prepare_enable(atmel_ports[co->index].clk);
1630 if (ret)
1631 return ret;
1632
1633 UART_PUT_IDR(port, -1);
1634 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1635 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1636
1637 if (options)
1638 uart_parse_options(options, &baud, &parity, &bits, &flow);
1639 else
1640 atmel_console_get_options(port, &baud, &parity, &bits);
1641
1642 return uart_set_options(port, co, baud, parity, bits, flow);
1643}
1644
1645static struct uart_driver atmel_uart;
1646
1647static struct console atmel_console = {
1648 .name = ATMEL_DEVICENAME,
1649 .write = atmel_console_write,
1650 .device = uart_console_device,
1651 .setup = atmel_console_setup,
1652 .flags = CON_PRINTBUFFER,
1653 .index = -1,
1654 .data = &atmel_uart,
1655};
1656
1657#define ATMEL_CONSOLE_DEVICE (&atmel_console)
1658
1659
1660
1661
1662static int __init atmel_console_init(void)
1663{
1664 int ret;
1665 if (atmel_default_console_device) {
1666 struct atmel_uart_data *pdata =
1667 atmel_default_console_device->dev.platform_data;
1668 int id = pdata->num;
1669 struct atmel_uart_port *port = &atmel_ports[id];
1670
1671 port->backup_imr = 0;
1672 port->uart.line = id;
1673
1674 add_preferred_console(ATMEL_DEVICENAME, id, NULL);
1675 ret = atmel_init_port(port, atmel_default_console_device);
1676 if (ret)
1677 return ret;
1678 register_console(&atmel_console);
1679 }
1680
1681 return 0;
1682}
1683
1684console_initcall(atmel_console_init);
1685
1686
1687
1688
1689static int __init atmel_late_console_init(void)
1690{
1691 if (atmel_default_console_device
1692 && !(atmel_console.flags & CON_ENABLED))
1693 register_console(&atmel_console);
1694
1695 return 0;
1696}
1697
1698core_initcall(atmel_late_console_init);
1699
1700static inline bool atmel_is_console_port(struct uart_port *port)
1701{
1702 return port->cons && port->cons->index == port->line;
1703}
1704
1705#else
1706#define ATMEL_CONSOLE_DEVICE NULL
1707
1708static inline bool atmel_is_console_port(struct uart_port *port)
1709{
1710 return false;
1711}
1712#endif
1713
1714static struct uart_driver atmel_uart = {
1715 .owner = THIS_MODULE,
1716 .driver_name = "atmel_serial",
1717 .dev_name = ATMEL_DEVICENAME,
1718 .major = SERIAL_ATMEL_MAJOR,
1719 .minor = MINOR_START,
1720 .nr = ATMEL_MAX_UART,
1721 .cons = ATMEL_CONSOLE_DEVICE,
1722};
1723
1724#ifdef CONFIG_PM
1725static bool atmel_serial_clk_will_stop(void)
1726{
1727#ifdef CONFIG_ARCH_AT91
1728 return at91_suspend_entering_slow_clock();
1729#else
1730 return false;
1731#endif
1732}
1733
1734static int atmel_serial_suspend(struct platform_device *pdev,
1735 pm_message_t state)
1736{
1737 struct uart_port *port = platform_get_drvdata(pdev);
1738 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1739
1740 if (atmel_is_console_port(port) && console_suspend_enabled) {
1741
1742 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
1743 cpu_relax();
1744 }
1745
1746
1747 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
1748 if (atmel_serial_clk_will_stop())
1749 device_set_wakeup_enable(&pdev->dev, 0);
1750
1751 uart_suspend_port(&atmel_uart, port);
1752
1753 return 0;
1754}
1755
1756static int atmel_serial_resume(struct platform_device *pdev)
1757{
1758 struct uart_port *port = platform_get_drvdata(pdev);
1759 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1760
1761 uart_resume_port(&atmel_uart, port);
1762 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
1763
1764 return 0;
1765}
1766#else
1767#define atmel_serial_suspend NULL
1768#define atmel_serial_resume NULL
1769#endif
1770
1771static int atmel_serial_probe(struct platform_device *pdev)
1772{
1773 struct atmel_uart_port *port;
1774 struct device_node *np = pdev->dev.of_node;
1775 struct atmel_uart_data *pdata = pdev->dev.platform_data;
1776 void *data;
1777 int ret = -ENODEV;
1778 struct pinctrl *pinctrl;
1779
1780 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
1781
1782 if (np)
1783 ret = of_alias_get_id(np, "serial");
1784 else
1785 if (pdata)
1786 ret = pdata->num;
1787
1788 if (ret < 0)
1789
1790
1791 ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART);
1792
1793 if (ret >= ATMEL_MAX_UART) {
1794 ret = -ENODEV;
1795 goto err;
1796 }
1797
1798 if (test_and_set_bit(ret, atmel_ports_in_use)) {
1799
1800 ret = -EBUSY;
1801 goto err;
1802 }
1803
1804 port = &atmel_ports[ret];
1805 port->backup_imr = 0;
1806 port->uart.line = ret;
1807
1808 ret = atmel_init_port(port, pdev);
1809 if (ret)
1810 goto err;
1811
1812 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
1813 if (IS_ERR(pinctrl)) {
1814 ret = PTR_ERR(pinctrl);
1815 goto err;
1816 }
1817
1818 if (!atmel_use_dma_rx(&port->uart)) {
1819 ret = -ENOMEM;
1820 data = kmalloc(sizeof(struct atmel_uart_char)
1821 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
1822 if (!data)
1823 goto err_alloc_ring;
1824 port->rx_ring.buf = data;
1825 }
1826
1827 ret = uart_add_one_port(&atmel_uart, &port->uart);
1828 if (ret)
1829 goto err_add_port;
1830
1831#ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1832 if (atmel_is_console_port(&port->uart)
1833 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
1834
1835
1836
1837
1838 clk_disable_unprepare(port->clk);
1839 }
1840#endif
1841
1842 device_init_wakeup(&pdev->dev, 1);
1843 platform_set_drvdata(pdev, port);
1844
1845 if (port->rs485.flags & SER_RS485_ENABLED) {
1846 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
1847 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
1848 }
1849
1850 return 0;
1851
1852err_add_port:
1853 kfree(port->rx_ring.buf);
1854 port->rx_ring.buf = NULL;
1855err_alloc_ring:
1856 if (!atmel_is_console_port(&port->uart)) {
1857 clk_put(port->clk);
1858 port->clk = NULL;
1859 }
1860err:
1861 return ret;
1862}
1863
1864static int atmel_serial_remove(struct platform_device *pdev)
1865{
1866 struct uart_port *port = platform_get_drvdata(pdev);
1867 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1868 int ret = 0;
1869
1870 device_init_wakeup(&pdev->dev, 0);
1871 platform_set_drvdata(pdev, NULL);
1872
1873 ret = uart_remove_one_port(&atmel_uart, port);
1874
1875 tasklet_kill(&atmel_port->tasklet);
1876 kfree(atmel_port->rx_ring.buf);
1877
1878
1879
1880 clear_bit(port->line, atmel_ports_in_use);
1881
1882 clk_put(atmel_port->clk);
1883
1884 return ret;
1885}
1886
1887static struct platform_driver atmel_serial_driver = {
1888 .probe = atmel_serial_probe,
1889 .remove = atmel_serial_remove,
1890 .suspend = atmel_serial_suspend,
1891 .resume = atmel_serial_resume,
1892 .driver = {
1893 .name = "atmel_usart",
1894 .owner = THIS_MODULE,
1895 .of_match_table = of_match_ptr(atmel_serial_dt_ids),
1896 },
1897};
1898
1899static int __init atmel_serial_init(void)
1900{
1901 int ret;
1902
1903 ret = uart_register_driver(&atmel_uart);
1904 if (ret)
1905 return ret;
1906
1907 ret = platform_driver_register(&atmel_serial_driver);
1908 if (ret)
1909 uart_unregister_driver(&atmel_uart);
1910
1911 return ret;
1912}
1913
1914static void __exit atmel_serial_exit(void)
1915{
1916 platform_driver_unregister(&atmel_serial_driver);
1917 uart_unregister_driver(&atmel_uart);
1918}
1919
1920module_init(atmel_serial_init);
1921module_exit(atmel_serial_exit);
1922
1923MODULE_AUTHOR("Rick Bronson");
1924MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
1925MODULE_LICENSE("GPL");
1926MODULE_ALIAS("platform:atmel_usart");
1927