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23#if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
24#define SUPPORT_SYSRQ
25#endif
26
27#include <linux/console.h>
28#include <linux/errno.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/ioport.h>
32#include <linux/module.h>
33#include <linux/platform_device.h>
34#include <linux/serial.h>
35#include <linux/serial_core.h>
36#include <linux/serial_reg.h>
37#include <linux/tty.h>
38#include <linux/tty_flip.h>
39
40#include <asm/io.h>
41#include <asm/vr41xx/siu.h>
42#include <asm/vr41xx/vr41xx.h>
43
44#define SIU_BAUD_BASE 1152000
45#define SIU_MAJOR 204
46#define SIU_MINOR_BASE 82
47
48#define RX_MAX_COUNT 256
49#define TX_MAX_COUNT 15
50
51#define SIUIRSEL 0x08
52 #define TMICMODE 0x20
53 #define TMICTX 0x10
54 #define IRMSEL 0x0c
55 #define IRMSEL_HP 0x08
56 #define IRMSEL_TEMIC 0x04
57 #define IRMSEL_SHARP 0x00
58 #define IRUSESEL 0x02
59 #define SIRSEL 0x01
60
61static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = {
62 [0 ... SIU_PORTS_MAX-1] = {
63 .lock = __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock),
64 .irq = 0,
65 },
66};
67
68#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
69static uint8_t lsr_break_flag[SIU_PORTS_MAX];
70#endif
71
72#define siu_read(port, offset) readb((port)->membase + (offset))
73#define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
74
75void vr41xx_select_siu_interface(siu_interface_t interface)
76{
77 struct uart_port *port;
78 unsigned long flags;
79 uint8_t irsel;
80
81 port = &siu_uart_ports[0];
82
83 spin_lock_irqsave(&port->lock, flags);
84
85 irsel = siu_read(port, SIUIRSEL);
86 if (interface == SIU_INTERFACE_IRDA)
87 irsel |= SIRSEL;
88 else
89 irsel &= ~SIRSEL;
90 siu_write(port, SIUIRSEL, irsel);
91
92 spin_unlock_irqrestore(&port->lock, flags);
93}
94EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
95
96void vr41xx_use_irda(irda_use_t use)
97{
98 struct uart_port *port;
99 unsigned long flags;
100 uint8_t irsel;
101
102 port = &siu_uart_ports[0];
103
104 spin_lock_irqsave(&port->lock, flags);
105
106 irsel = siu_read(port, SIUIRSEL);
107 if (use == FIR_USE_IRDA)
108 irsel |= IRUSESEL;
109 else
110 irsel &= ~IRUSESEL;
111 siu_write(port, SIUIRSEL, irsel);
112
113 spin_unlock_irqrestore(&port->lock, flags);
114}
115EXPORT_SYMBOL_GPL(vr41xx_use_irda);
116
117void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
118{
119 struct uart_port *port;
120 unsigned long flags;
121 uint8_t irsel;
122
123 port = &siu_uart_ports[0];
124
125 spin_lock_irqsave(&port->lock, flags);
126
127 irsel = siu_read(port, SIUIRSEL);
128 irsel &= ~(IRMSEL | TMICTX | TMICMODE);
129 switch (module) {
130 case SHARP_IRDA:
131 irsel |= IRMSEL_SHARP;
132 break;
133 case TEMIC_IRDA:
134 irsel |= IRMSEL_TEMIC | TMICMODE;
135 if (speed == IRDA_TX_4MBPS)
136 irsel |= TMICTX;
137 break;
138 case HP_IRDA:
139 irsel |= IRMSEL_HP;
140 break;
141 default:
142 break;
143 }
144 siu_write(port, SIUIRSEL, irsel);
145
146 spin_unlock_irqrestore(&port->lock, flags);
147}
148EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
149
150static inline void siu_clear_fifo(struct uart_port *port)
151{
152 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
153 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
154 UART_FCR_CLEAR_XMIT);
155 siu_write(port, UART_FCR, 0);
156}
157
158static inline unsigned long siu_port_size(struct uart_port *port)
159{
160 switch (port->type) {
161 case PORT_VR41XX_SIU:
162 return 11UL;
163 case PORT_VR41XX_DSIU:
164 return 8UL;
165 }
166
167 return 0;
168}
169
170static inline unsigned int siu_check_type(struct uart_port *port)
171{
172 if (port->line == 0)
173 return PORT_VR41XX_SIU;
174 if (port->line == 1 && port->irq)
175 return PORT_VR41XX_DSIU;
176
177 return PORT_UNKNOWN;
178}
179
180static inline const char *siu_type_name(struct uart_port *port)
181{
182 switch (port->type) {
183 case PORT_VR41XX_SIU:
184 return "SIU";
185 case PORT_VR41XX_DSIU:
186 return "DSIU";
187 }
188
189 return NULL;
190}
191
192static unsigned int siu_tx_empty(struct uart_port *port)
193{
194 uint8_t lsr;
195
196 lsr = siu_read(port, UART_LSR);
197 if (lsr & UART_LSR_TEMT)
198 return TIOCSER_TEMT;
199
200 return 0;
201}
202
203static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
204{
205 uint8_t mcr = 0;
206
207 if (mctrl & TIOCM_DTR)
208 mcr |= UART_MCR_DTR;
209 if (mctrl & TIOCM_RTS)
210 mcr |= UART_MCR_RTS;
211 if (mctrl & TIOCM_OUT1)
212 mcr |= UART_MCR_OUT1;
213 if (mctrl & TIOCM_OUT2)
214 mcr |= UART_MCR_OUT2;
215 if (mctrl & TIOCM_LOOP)
216 mcr |= UART_MCR_LOOP;
217
218 siu_write(port, UART_MCR, mcr);
219}
220
221static unsigned int siu_get_mctrl(struct uart_port *port)
222{
223 uint8_t msr;
224 unsigned int mctrl = 0;
225
226 msr = siu_read(port, UART_MSR);
227 if (msr & UART_MSR_DCD)
228 mctrl |= TIOCM_CAR;
229 if (msr & UART_MSR_RI)
230 mctrl |= TIOCM_RNG;
231 if (msr & UART_MSR_DSR)
232 mctrl |= TIOCM_DSR;
233 if (msr & UART_MSR_CTS)
234 mctrl |= TIOCM_CTS;
235
236 return mctrl;
237}
238
239static void siu_stop_tx(struct uart_port *port)
240{
241 unsigned long flags;
242 uint8_t ier;
243
244 spin_lock_irqsave(&port->lock, flags);
245
246 ier = siu_read(port, UART_IER);
247 ier &= ~UART_IER_THRI;
248 siu_write(port, UART_IER, ier);
249
250 spin_unlock_irqrestore(&port->lock, flags);
251}
252
253static void siu_start_tx(struct uart_port *port)
254{
255 unsigned long flags;
256 uint8_t ier;
257
258 spin_lock_irqsave(&port->lock, flags);
259
260 ier = siu_read(port, UART_IER);
261 ier |= UART_IER_THRI;
262 siu_write(port, UART_IER, ier);
263
264 spin_unlock_irqrestore(&port->lock, flags);
265}
266
267static void siu_stop_rx(struct uart_port *port)
268{
269 unsigned long flags;
270 uint8_t ier;
271
272 spin_lock_irqsave(&port->lock, flags);
273
274 ier = siu_read(port, UART_IER);
275 ier &= ~UART_IER_RLSI;
276 siu_write(port, UART_IER, ier);
277
278 port->read_status_mask &= ~UART_LSR_DR;
279
280 spin_unlock_irqrestore(&port->lock, flags);
281}
282
283static void siu_enable_ms(struct uart_port *port)
284{
285 unsigned long flags;
286 uint8_t ier;
287
288 spin_lock_irqsave(&port->lock, flags);
289
290 ier = siu_read(port, UART_IER);
291 ier |= UART_IER_MSI;
292 siu_write(port, UART_IER, ier);
293
294 spin_unlock_irqrestore(&port->lock, flags);
295}
296
297static void siu_break_ctl(struct uart_port *port, int ctl)
298{
299 unsigned long flags;
300 uint8_t lcr;
301
302 spin_lock_irqsave(&port->lock, flags);
303
304 lcr = siu_read(port, UART_LCR);
305 if (ctl == -1)
306 lcr |= UART_LCR_SBC;
307 else
308 lcr &= ~UART_LCR_SBC;
309 siu_write(port, UART_LCR, lcr);
310
311 spin_unlock_irqrestore(&port->lock, flags);
312}
313
314static inline void receive_chars(struct uart_port *port, uint8_t *status)
315{
316 uint8_t lsr, ch;
317 char flag;
318 int max_count = RX_MAX_COUNT;
319
320 lsr = *status;
321
322 do {
323 ch = siu_read(port, UART_RX);
324 port->icount.rx++;
325 flag = TTY_NORMAL;
326
327#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
328 lsr |= lsr_break_flag[port->line];
329 lsr_break_flag[port->line] = 0;
330#endif
331 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
332 UART_LSR_PE | UART_LSR_OE))) {
333 if (lsr & UART_LSR_BI) {
334 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
335 port->icount.brk++;
336
337 if (uart_handle_break(port))
338 goto ignore_char;
339 }
340
341 if (lsr & UART_LSR_FE)
342 port->icount.frame++;
343 if (lsr & UART_LSR_PE)
344 port->icount.parity++;
345 if (lsr & UART_LSR_OE)
346 port->icount.overrun++;
347
348 lsr &= port->read_status_mask;
349 if (lsr & UART_LSR_BI)
350 flag = TTY_BREAK;
351 if (lsr & UART_LSR_FE)
352 flag = TTY_FRAME;
353 if (lsr & UART_LSR_PE)
354 flag = TTY_PARITY;
355 }
356
357 if (uart_handle_sysrq_char(port, ch))
358 goto ignore_char;
359
360 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
361
362 ignore_char:
363 lsr = siu_read(port, UART_LSR);
364 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
365
366 tty_flip_buffer_push(&port->state->port);
367
368 *status = lsr;
369}
370
371static inline void check_modem_status(struct uart_port *port)
372{
373 uint8_t msr;
374
375 msr = siu_read(port, UART_MSR);
376 if ((msr & UART_MSR_ANY_DELTA) == 0)
377 return;
378 if (msr & UART_MSR_DDCD)
379 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
380 if (msr & UART_MSR_TERI)
381 port->icount.rng++;
382 if (msr & UART_MSR_DDSR)
383 port->icount.dsr++;
384 if (msr & UART_MSR_DCTS)
385 uart_handle_cts_change(port, msr & UART_MSR_CTS);
386
387 wake_up_interruptible(&port->state->port.delta_msr_wait);
388}
389
390static inline void transmit_chars(struct uart_port *port)
391{
392 struct circ_buf *xmit;
393 int max_count = TX_MAX_COUNT;
394
395 xmit = &port->state->xmit;
396
397 if (port->x_char) {
398 siu_write(port, UART_TX, port->x_char);
399 port->icount.tx++;
400 port->x_char = 0;
401 return;
402 }
403
404 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
405 siu_stop_tx(port);
406 return;
407 }
408
409 do {
410 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
411 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
412 port->icount.tx++;
413 if (uart_circ_empty(xmit))
414 break;
415 } while (max_count-- > 0);
416
417 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
418 uart_write_wakeup(port);
419
420 if (uart_circ_empty(xmit))
421 siu_stop_tx(port);
422}
423
424static irqreturn_t siu_interrupt(int irq, void *dev_id)
425{
426 struct uart_port *port;
427 uint8_t iir, lsr;
428
429 port = (struct uart_port *)dev_id;
430
431 iir = siu_read(port, UART_IIR);
432 if (iir & UART_IIR_NO_INT)
433 return IRQ_NONE;
434
435 lsr = siu_read(port, UART_LSR);
436 if (lsr & UART_LSR_DR)
437 receive_chars(port, &lsr);
438
439 check_modem_status(port);
440
441 if (lsr & UART_LSR_THRE)
442 transmit_chars(port);
443
444 return IRQ_HANDLED;
445}
446
447static int siu_startup(struct uart_port *port)
448{
449 int retval;
450
451 if (port->membase == NULL)
452 return -ENODEV;
453
454 siu_clear_fifo(port);
455
456 (void)siu_read(port, UART_LSR);
457 (void)siu_read(port, UART_RX);
458 (void)siu_read(port, UART_IIR);
459 (void)siu_read(port, UART_MSR);
460
461 if (siu_read(port, UART_LSR) == 0xff)
462 return -ENODEV;
463
464 retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
465 if (retval)
466 return retval;
467
468 if (port->type == PORT_VR41XX_DSIU)
469 vr41xx_enable_dsiuint(DSIUINT_ALL);
470
471 siu_write(port, UART_LCR, UART_LCR_WLEN8);
472
473 spin_lock_irq(&port->lock);
474 siu_set_mctrl(port, port->mctrl);
475 spin_unlock_irq(&port->lock);
476
477 siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
478
479 (void)siu_read(port, UART_LSR);
480 (void)siu_read(port, UART_RX);
481 (void)siu_read(port, UART_IIR);
482 (void)siu_read(port, UART_MSR);
483
484 return 0;
485}
486
487static void siu_shutdown(struct uart_port *port)
488{
489 unsigned long flags;
490 uint8_t lcr;
491
492 siu_write(port, UART_IER, 0);
493
494 spin_lock_irqsave(&port->lock, flags);
495
496 port->mctrl &= ~TIOCM_OUT2;
497 siu_set_mctrl(port, port->mctrl);
498
499 spin_unlock_irqrestore(&port->lock, flags);
500
501 lcr = siu_read(port, UART_LCR);
502 lcr &= ~UART_LCR_SBC;
503 siu_write(port, UART_LCR, lcr);
504
505 siu_clear_fifo(port);
506
507 (void)siu_read(port, UART_RX);
508
509 if (port->type == PORT_VR41XX_DSIU)
510 vr41xx_disable_dsiuint(DSIUINT_ALL);
511
512 free_irq(port->irq, port);
513}
514
515static void siu_set_termios(struct uart_port *port, struct ktermios *new,
516 struct ktermios *old)
517{
518 tcflag_t c_cflag, c_iflag;
519 uint8_t lcr, fcr, ier;
520 unsigned int baud, quot;
521 unsigned long flags;
522
523 c_cflag = new->c_cflag;
524 switch (c_cflag & CSIZE) {
525 case CS5:
526 lcr = UART_LCR_WLEN5;
527 break;
528 case CS6:
529 lcr = UART_LCR_WLEN6;
530 break;
531 case CS7:
532 lcr = UART_LCR_WLEN7;
533 break;
534 default:
535 lcr = UART_LCR_WLEN8;
536 break;
537 }
538
539 if (c_cflag & CSTOPB)
540 lcr |= UART_LCR_STOP;
541 if (c_cflag & PARENB)
542 lcr |= UART_LCR_PARITY;
543 if ((c_cflag & PARODD) != PARODD)
544 lcr |= UART_LCR_EPAR;
545 if (c_cflag & CMSPAR)
546 lcr |= UART_LCR_SPAR;
547
548 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
549 quot = uart_get_divisor(port, baud);
550
551 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
552
553 spin_lock_irqsave(&port->lock, flags);
554
555 uart_update_timeout(port, c_cflag, baud);
556
557 c_iflag = new->c_iflag;
558
559 port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
560 if (c_iflag & INPCK)
561 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
562 if (c_iflag & (BRKINT | PARMRK))
563 port->read_status_mask |= UART_LSR_BI;
564
565 port->ignore_status_mask = 0;
566 if (c_iflag & IGNPAR)
567 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
568 if (c_iflag & IGNBRK) {
569 port->ignore_status_mask |= UART_LSR_BI;
570 if (c_iflag & IGNPAR)
571 port->ignore_status_mask |= UART_LSR_OE;
572 }
573
574 if ((c_cflag & CREAD) == 0)
575 port->ignore_status_mask |= UART_LSR_DR;
576
577 ier = siu_read(port, UART_IER);
578 ier &= ~UART_IER_MSI;
579 if (UART_ENABLE_MS(port, c_cflag))
580 ier |= UART_IER_MSI;
581 siu_write(port, UART_IER, ier);
582
583 siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
584
585 siu_write(port, UART_DLL, (uint8_t)quot);
586 siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
587
588 siu_write(port, UART_LCR, lcr);
589
590 siu_write(port, UART_FCR, fcr);
591
592 siu_set_mctrl(port, port->mctrl);
593
594 spin_unlock_irqrestore(&port->lock, flags);
595}
596
597static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
598{
599 switch (state) {
600 case 0:
601 switch (port->type) {
602 case PORT_VR41XX_SIU:
603 vr41xx_supply_clock(SIU_CLOCK);
604 break;
605 case PORT_VR41XX_DSIU:
606 vr41xx_supply_clock(DSIU_CLOCK);
607 break;
608 }
609 break;
610 case 3:
611 switch (port->type) {
612 case PORT_VR41XX_SIU:
613 vr41xx_mask_clock(SIU_CLOCK);
614 break;
615 case PORT_VR41XX_DSIU:
616 vr41xx_mask_clock(DSIU_CLOCK);
617 break;
618 }
619 break;
620 }
621}
622
623static const char *siu_type(struct uart_port *port)
624{
625 return siu_type_name(port);
626}
627
628static void siu_release_port(struct uart_port *port)
629{
630 unsigned long size;
631
632 if (port->flags & UPF_IOREMAP) {
633 iounmap(port->membase);
634 port->membase = NULL;
635 }
636
637 size = siu_port_size(port);
638 release_mem_region(port->mapbase, size);
639}
640
641static int siu_request_port(struct uart_port *port)
642{
643 unsigned long size;
644 struct resource *res;
645
646 size = siu_port_size(port);
647 res = request_mem_region(port->mapbase, size, siu_type_name(port));
648 if (res == NULL)
649 return -EBUSY;
650
651 if (port->flags & UPF_IOREMAP) {
652 port->membase = ioremap(port->mapbase, size);
653 if (port->membase == NULL) {
654 release_resource(res);
655 return -ENOMEM;
656 }
657 }
658
659 return 0;
660}
661
662static void siu_config_port(struct uart_port *port, int flags)
663{
664 if (flags & UART_CONFIG_TYPE) {
665 port->type = siu_check_type(port);
666 (void)siu_request_port(port);
667 }
668}
669
670static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
671{
672 if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
673 return -EINVAL;
674 if (port->irq != serial->irq)
675 return -EINVAL;
676 if (port->iotype != serial->io_type)
677 return -EINVAL;
678 if (port->mapbase != (unsigned long)serial->iomem_base)
679 return -EINVAL;
680
681 return 0;
682}
683
684static struct uart_ops siu_uart_ops = {
685 .tx_empty = siu_tx_empty,
686 .set_mctrl = siu_set_mctrl,
687 .get_mctrl = siu_get_mctrl,
688 .stop_tx = siu_stop_tx,
689 .start_tx = siu_start_tx,
690 .stop_rx = siu_stop_rx,
691 .enable_ms = siu_enable_ms,
692 .break_ctl = siu_break_ctl,
693 .startup = siu_startup,
694 .shutdown = siu_shutdown,
695 .set_termios = siu_set_termios,
696 .pm = siu_pm,
697 .type = siu_type,
698 .release_port = siu_release_port,
699 .request_port = siu_request_port,
700 .config_port = siu_config_port,
701 .verify_port = siu_verify_port,
702};
703
704static int siu_init_ports(struct platform_device *pdev)
705{
706 struct uart_port *port;
707 struct resource *res;
708 int *type = pdev->dev.platform_data;
709 int i;
710
711 if (!type)
712 return 0;
713
714 port = siu_uart_ports;
715 for (i = 0; i < SIU_PORTS_MAX; i++) {
716 port->type = type[i];
717 if (port->type == PORT_UNKNOWN)
718 continue;
719 port->irq = platform_get_irq(pdev, i);
720 port->uartclk = SIU_BAUD_BASE * 16;
721 port->fifosize = 16;
722 port->regshift = 0;
723 port->iotype = UPIO_MEM;
724 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
725 port->line = i;
726 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
727 port->mapbase = res->start;
728 port++;
729 }
730
731 return i;
732}
733
734#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
735
736#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
737
738static void wait_for_xmitr(struct uart_port *port)
739{
740 int timeout = 10000;
741 uint8_t lsr, msr;
742
743 do {
744 lsr = siu_read(port, UART_LSR);
745 if (lsr & UART_LSR_BI)
746 lsr_break_flag[port->line] = UART_LSR_BI;
747
748 if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
749 break;
750 } while (timeout-- > 0);
751
752 if (port->flags & UPF_CONS_FLOW) {
753 timeout = 1000000;
754
755 do {
756 msr = siu_read(port, UART_MSR);
757 if ((msr & UART_MSR_CTS) != 0)
758 break;
759 } while (timeout-- > 0);
760 }
761}
762
763static void siu_console_putchar(struct uart_port *port, int ch)
764{
765 wait_for_xmitr(port);
766 siu_write(port, UART_TX, ch);
767}
768
769static void siu_console_write(struct console *con, const char *s, unsigned count)
770{
771 struct uart_port *port;
772 uint8_t ier;
773
774 port = &siu_uart_ports[con->index];
775
776 ier = siu_read(port, UART_IER);
777 siu_write(port, UART_IER, 0);
778
779 uart_console_write(port, s, count, siu_console_putchar);
780
781 wait_for_xmitr(port);
782 siu_write(port, UART_IER, ier);
783}
784
785static int __init siu_console_setup(struct console *con, char *options)
786{
787 struct uart_port *port;
788 int baud = 9600;
789 int parity = 'n';
790 int bits = 8;
791 int flow = 'n';
792
793 if (con->index >= SIU_PORTS_MAX)
794 con->index = 0;
795
796 port = &siu_uart_ports[con->index];
797 if (port->membase == NULL) {
798 if (port->mapbase == 0)
799 return -ENODEV;
800 port->membase = ioremap(port->mapbase, siu_port_size(port));
801 }
802
803 if (port->type == PORT_VR41XX_SIU)
804 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
805
806 if (options != NULL)
807 uart_parse_options(options, &baud, &parity, &bits, &flow);
808
809 return uart_set_options(port, con, baud, parity, bits, flow);
810}
811
812static struct uart_driver siu_uart_driver;
813
814static struct console siu_console = {
815 .name = "ttyVR",
816 .write = siu_console_write,
817 .device = uart_console_device,
818 .setup = siu_console_setup,
819 .flags = CON_PRINTBUFFER,
820 .index = -1,
821 .data = &siu_uart_driver,
822};
823
824static int siu_console_init(void)
825{
826 struct uart_port *port;
827 int i;
828
829 for (i = 0; i < SIU_PORTS_MAX; i++) {
830 port = &siu_uart_ports[i];
831 port->ops = &siu_uart_ops;
832 }
833
834 register_console(&siu_console);
835
836 return 0;
837}
838
839console_initcall(siu_console_init);
840
841void __init vr41xx_siu_early_setup(struct uart_port *port)
842{
843 if (port->type == PORT_UNKNOWN)
844 return;
845
846 siu_uart_ports[port->line].line = port->line;
847 siu_uart_ports[port->line].type = port->type;
848 siu_uart_ports[port->line].uartclk = SIU_BAUD_BASE * 16;
849 siu_uart_ports[port->line].mapbase = port->mapbase;
850 siu_uart_ports[port->line].mapbase = port->mapbase;
851 siu_uart_ports[port->line].ops = &siu_uart_ops;
852}
853
854#define SERIAL_VR41XX_CONSOLE &siu_console
855#else
856#define SERIAL_VR41XX_CONSOLE NULL
857#endif
858
859static struct uart_driver siu_uart_driver = {
860 .owner = THIS_MODULE,
861 .driver_name = "SIU",
862 .dev_name = "ttyVR",
863 .major = SIU_MAJOR,
864 .minor = SIU_MINOR_BASE,
865 .cons = SERIAL_VR41XX_CONSOLE,
866};
867
868static int siu_probe(struct platform_device *dev)
869{
870 struct uart_port *port;
871 int num, i, retval;
872
873 num = siu_init_ports(dev);
874 if (num <= 0)
875 return -ENODEV;
876
877 siu_uart_driver.nr = num;
878 retval = uart_register_driver(&siu_uart_driver);
879 if (retval)
880 return retval;
881
882 for (i = 0; i < num; i++) {
883 port = &siu_uart_ports[i];
884 port->ops = &siu_uart_ops;
885 port->dev = &dev->dev;
886
887 retval = uart_add_one_port(&siu_uart_driver, port);
888 if (retval < 0) {
889 port->dev = NULL;
890 break;
891 }
892 }
893
894 if (i == 0 && retval < 0) {
895 uart_unregister_driver(&siu_uart_driver);
896 return retval;
897 }
898
899 return 0;
900}
901
902static int siu_remove(struct platform_device *dev)
903{
904 struct uart_port *port;
905 int i;
906
907 for (i = 0; i < siu_uart_driver.nr; i++) {
908 port = &siu_uart_ports[i];
909 if (port->dev == &dev->dev) {
910 uart_remove_one_port(&siu_uart_driver, port);
911 port->dev = NULL;
912 }
913 }
914
915 uart_unregister_driver(&siu_uart_driver);
916
917 return 0;
918}
919
920static int siu_suspend(struct platform_device *dev, pm_message_t state)
921{
922 struct uart_port *port;
923 int i;
924
925 for (i = 0; i < siu_uart_driver.nr; i++) {
926 port = &siu_uart_ports[i];
927 if ((port->type == PORT_VR41XX_SIU ||
928 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
929 uart_suspend_port(&siu_uart_driver, port);
930
931 }
932
933 return 0;
934}
935
936static int siu_resume(struct platform_device *dev)
937{
938 struct uart_port *port;
939 int i;
940
941 for (i = 0; i < siu_uart_driver.nr; i++) {
942 port = &siu_uart_ports[i];
943 if ((port->type == PORT_VR41XX_SIU ||
944 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
945 uart_resume_port(&siu_uart_driver, port);
946 }
947
948 return 0;
949}
950
951static struct platform_driver siu_device_driver = {
952 .probe = siu_probe,
953 .remove = siu_remove,
954 .suspend = siu_suspend,
955 .resume = siu_resume,
956 .driver = {
957 .name = "SIU",
958 .owner = THIS_MODULE,
959 },
960};
961
962module_platform_driver(siu_device_driver);
963
964MODULE_LICENSE("GPL");
965MODULE_ALIAS("platform:SIU");
966
