LXR linux/drivers/usb/host/fhci.h

   1/*
   2 * Freescale QUICC Engine USB Host Controller Driver
   3 *
   4 * Copyright (c) Freescale Semicondutor, Inc. 2006.
   5 *               Shlomi Gridish <gridish@freescale.com>
   6 *               Jerry Huang <Chang-Ming.Huang@freescale.com>
   7 * Copyright (c) Logic Product Development, Inc. 2007
   8 *               Peter Barada <peterb@logicpd.com>
   9 * Copyright (c) MontaVista Software, Inc. 2008.
  10 *               Anton Vorontsov <avorontsov@ru.mvista.com>
  11 *
  12 * This program is free software; you can redistribute  it and/or modify it
  13 * under  the terms of  the GNU General  Public License as published by the
  14 * Free Software Foundation;  either version 2 of the  License, or (at your
  15 * option) any later version.
  16 */
  17
  18#ifndef __FHCI_H
  19#define __FHCI_H
  20
  21#include <linux/kernel.h>
  22#include <linux/types.h>
  23#include <linux/bug.h>
  24#include <linux/spinlock.h>
  25#include <linux/interrupt.h>
  26#include <linux/kfifo.h>
  27#include <linux/io.h>
  28#include <linux/usb.h>
  29#include <linux/usb/hcd.h>
  30#include <asm/qe.h>
  31#include <asm/immap_qe.h>
  32
  33#define USB_CLOCK       48000000
  34
  35#define FHCI_PRAM_SIZE 0x100
  36
  37#define MAX_EDS         32
  38#define MAX_TDS         32
  39
  40
  41/* CRC16 field size */
  42#define CRC_SIZE 2
  43
  44/* USB protocol overhead for each frame transmitted from the host */
  45#define PROTOCOL_OVERHEAD 7
  46
  47/* Packet structure, info field */
  48#define PKT_PID_DATA0           0x80000000 /* PID - Data toggle zero */
  49#define PKT_PID_DATA1           0x40000000 /* PID - Data toggle one  */
  50#define PKT_PID_SETUP           0x20000000 /* PID - Setup bit */
  51#define PKT_SETUP_STATUS        0x10000000 /* Setup status bit */
  52#define PKT_SETADDR_STATUS      0x08000000 /* Set address status bit */
  53#define PKT_SET_HOST_LAST       0x04000000 /* Last data packet */
  54#define PKT_HOST_DATA           0x02000000 /* Data packet */
  55#define PKT_FIRST_IN_FRAME      0x01000000 /* First packet in the frame */
  56#define PKT_TOKEN_FRAME         0x00800000 /* Token packet */
  57#define PKT_ZLP                 0x00400000 /* Zero length packet */
  58#define PKT_IN_TOKEN_FRAME      0x00200000 /* IN token packet */
  59#define PKT_OUT_TOKEN_FRAME     0x00100000 /* OUT token packet */
  60#define PKT_SETUP_TOKEN_FRAME   0x00080000 /* SETUP token packet */
  61#define PKT_STALL_FRAME         0x00040000 /* STALL packet */
  62#define PKT_NACK_FRAME          0x00020000 /* NACK packet */
  63#define PKT_NO_PID              0x00010000 /* No PID */
  64#define PKT_NO_CRC              0x00008000 /* don't append CRC */
  65#define PKT_HOST_COMMAND        0x00004000 /* Host command packet */
  66#define PKT_DUMMY_PACKET        0x00002000 /* Dummy packet, used for mmm */
  67#define PKT_LOW_SPEED_PACKET    0x00001000 /* Low-Speed packet */
  68
  69#define TRANS_OK                (0)
  70#define TRANS_INPROGRESS        (-1)
  71#define TRANS_DISCARD           (-2)
  72#define TRANS_FAIL              (-3)
  73
  74#define PS_INT          0
  75#define PS_DISCONNECTED 1
  76#define PS_CONNECTED    2
  77#define PS_READY        3
  78#define PS_MISSING      4
  79
  80/* Transfer Descriptor status field */
  81#define USB_TD_OK               0x00000000 /* TD transmited or received ok */
  82#define USB_TD_INPROGRESS       0x80000000 /* TD is being transmitted */
  83#define USB_TD_RX_ER_NONOCT     0x40000000 /* Tx Non Octet Aligned Packet */
  84#define USB_TD_RX_ER_BITSTUFF   0x20000000 /* Frame Aborted-Received pkt */
  85#define USB_TD_RX_ER_CRC        0x10000000 /* CRC error */
  86#define USB_TD_RX_ER_OVERUN     0x08000000 /* Over - run occurred */
  87#define USB_TD_RX_ER_PID        0x04000000 /* wrong PID received */
  88#define USB_TD_RX_DATA_UNDERUN  0x02000000 /* shorter than expected */
  89#define USB_TD_RX_DATA_OVERUN   0x01000000 /* longer than expected */
  90#define USB_TD_TX_ER_NAK        0x00800000 /* NAK handshake */
  91#define USB_TD_TX_ER_STALL      0x00400000 /* STALL handshake */
  92#define USB_TD_TX_ER_TIMEOUT    0x00200000 /* transmit time out */
  93#define USB_TD_TX_ER_UNDERUN    0x00100000 /* transmit underrun */
  94
  95#define USB_TD_ERROR (USB_TD_RX_ER_NONOCT | USB_TD_RX_ER_BITSTUFF | \
  96                USB_TD_RX_ER_CRC | USB_TD_RX_ER_OVERUN | USB_TD_RX_ER_PID | \
  97                USB_TD_RX_DATA_UNDERUN | USB_TD_RX_DATA_OVERUN | \
  98                USB_TD_TX_ER_NAK | USB_TD_TX_ER_STALL | \
  99                USB_TD_TX_ER_TIMEOUT | USB_TD_TX_ER_UNDERUN)
 100
 101/* Transfer Descriptor toggle field */
 102#define USB_TD_TOGGLE_DATA0     0
 103#define USB_TD_TOGGLE_DATA1     1
 104#define USB_TD_TOGGLE_CARRY     2
 105
 106/* #define MULTI_DATA_BUS */
 107
 108/* Bus mode register RBMR/TBMR */
 109#define BUS_MODE_GBL    0x20    /* Global snooping */
 110#define BUS_MODE_BO     0x18    /* Byte ordering */
 111#define BUS_MODE_BO_BE  0x10    /* Byte ordering - Big-endian */
 112#define BUS_MODE_DTB    0x02    /* Data bus */
 113
 114/* FHCI QE USB Register Description */
 115
 116/* USB Mode Register bit define */
 117#define USB_MODE_EN             0x01
 118#define USB_MODE_HOST           0x02
 119#define USB_MODE_TEST           0x04
 120#define USB_MODE_SFTE           0x08
 121#define USB_MODE_RESUME         0x40
 122#define USB_MODE_LSS            0x80
 123
 124/* USB Slave Address Register Mask */
 125#define USB_SLVADDR_MASK        0x7F
 126
 127/* USB Endpoint register define */
 128#define USB_EPNUM_MASK          0xF000
 129#define USB_EPNUM_SHIFT         12
 130
 131#define USB_TRANS_MODE_SHIFT    8
 132#define USB_TRANS_CTR           0x0000
 133#define USB_TRANS_INT           0x0100
 134#define USB_TRANS_BULK          0x0200
 135#define USB_TRANS_ISO           0x0300
 136
 137#define USB_EP_MF               0x0020
 138#define USB_EP_RTE              0x0010
 139
 140#define USB_THS_SHIFT           2
 141#define USB_THS_MASK            0x000c
 142#define USB_THS_NORMAL          0x0
 143#define USB_THS_IGNORE_IN       0x0004
 144#define USB_THS_NACK            0x0008
 145#define USB_THS_STALL           0x000c
 146
 147#define USB_RHS_SHIFT           0
 148#define USB_RHS_MASK            0x0003
 149#define USB_RHS_NORMAL          0x0
 150#define USB_RHS_IGNORE_OUT      0x0001
 151#define USB_RHS_NACK            0x0002
 152#define USB_RHS_STALL           0x0003
 153
 154#define USB_RTHS_MASK           0x000f
 155
 156/* USB Command Register define */
 157#define USB_CMD_STR_FIFO        0x80
 158#define USB_CMD_FLUSH_FIFO      0x40
 159#define USB_CMD_ISFT            0x20
 160#define USB_CMD_DSFT            0x10
 161#define USB_CMD_EP_MASK         0x03
 162
 163/* USB Event and Mask Register define */
 164#define USB_E_MSF_MASK          0x0800
 165#define USB_E_SFT_MASK          0x0400
 166#define USB_E_RESET_MASK        0x0200
 167#define USB_E_IDLE_MASK         0x0100
 168#define USB_E_TXE4_MASK         0x0080
 169#define USB_E_TXE3_MASK         0x0040
 170#define USB_E_TXE2_MASK         0x0020
 171#define USB_E_TXE1_MASK         0x0010
 172#define USB_E_SOF_MASK          0x0008
 173#define USB_E_BSY_MASK          0x0004
 174#define USB_E_TXB_MASK          0x0002
 175#define USB_E_RXB_MASK          0x0001
 176
 177/* Freescale USB HOST */
 178struct fhci_pram {
 179        __be16 ep_ptr[4];       /* Endpoint porter reg */
 180        __be32 rx_state;        /* Rx internal state */
 181        __be32 rx_ptr;          /* Rx internal data pointer */
 182        __be16 frame_num;       /* Frame number */
 183        __be16 rx_cnt;          /* Rx byte count */
 184        __be32 rx_temp;         /* Rx temp */
 185        __be32 rx_data_temp;    /* Rx data temp */
 186        __be16 rx_u_ptr;        /* Rx microcode return address temp */
 187        u8 reserved1[2];        /* reserved area */
 188        __be32 sof_tbl;         /* SOF lookup table pointer */
 189        u8 sof_u_crc_temp;      /* SOF micorcode CRC5 temp reg */
 190        u8 reserved2[0xdb];
 191};
 192
 193/* Freescale USB Endpoint*/
 194struct fhci_ep_pram {
 195        __be16 rx_base;         /* Rx BD base address */
 196        __be16 tx_base;         /* Tx BD base address */
 197        u8 rx_func_code;        /* Rx function code */
 198        u8 tx_func_code;        /* Tx function code */
 199        __be16 rx_buff_len;     /* Rx buffer length */
 200        __be16 rx_bd_ptr;       /* Rx BD pointer */
 201        __be16 tx_bd_ptr;       /* Tx BD pointer */
 202        __be32 tx_state;        /* Tx internal state */
 203        __be32 tx_ptr;          /* Tx internal data pointer */
 204        __be16 tx_crc;          /* temp transmit CRC */
 205        __be16 tx_cnt;          /* Tx byte count */
 206        __be32 tx_temp;         /* Tx temp */
 207        __be16 tx_u_ptr;        /* Tx microcode return address temp */
 208        __be16 reserved;
 209};
 210
 211struct fhci_controller_list {
 212        struct list_head ctrl_list;     /* control endpoints */
 213        struct list_head bulk_list;     /* bulk endpoints */
 214        struct list_head iso_list;      /* isochronous endpoints */
 215        struct list_head intr_list;     /* interruput endpoints */
 216        struct list_head done_list;     /* done transfers */
 217};
 218
 219struct virtual_root_hub {
 220        int dev_num;    /* USB address of the root hub */
 221        u32 feature;    /* indicates what feature has been set */
 222        struct usb_hub_status hub;
 223        struct usb_port_status port;
 224};
 225
 226enum fhci_gpios {
 227        GPIO_USBOE = 0,
 228        GPIO_USBTP,
 229        GPIO_USBTN,
 230        GPIO_USBRP,
 231        GPIO_USBRN,
 232        /* these are optional */
 233        GPIO_SPEED,
 234        GPIO_POWER,
 235        NUM_GPIOS,
 236};
 237
 238enum fhci_pins {
 239        PIN_USBOE = 0,
 240        PIN_USBTP,
 241        PIN_USBTN,
 242        NUM_PINS,
 243};
 244
 245struct fhci_hcd {
 246        enum qe_clock fullspeed_clk;
 247        enum qe_clock lowspeed_clk;
 248        struct qe_pin *pins[NUM_PINS];
 249        int gpios[NUM_GPIOS];
 250        bool alow_gpios[NUM_GPIOS];
 251
 252        struct qe_usb_ctlr __iomem *regs; /* I/O memory used to communicate */
 253        struct fhci_pram __iomem *pram; /* Parameter RAM */
 254        struct gtm_timer *timer;
 255
 256        spinlock_t lock;
 257        struct fhci_usb *usb_lld; /* Low-level driver */
 258        struct virtual_root_hub *vroot_hub; /* the virtual root hub */
 259        int active_urbs;
 260        struct fhci_controller_list *hc_list;
 261        struct tasklet_struct *process_done_task; /* tasklet for done list */
 262
 263        struct list_head empty_eds;
 264        struct list_head empty_tds;
 265
 266#ifdef CONFIG_FHCI_DEBUG
 267        int usb_irq_stat[13];
 268        struct dentry *dfs_root;
 269        struct dentry *dfs_regs;
 270        struct dentry *dfs_irq_stat;
 271#endif
 272};
 273
 274#define USB_FRAME_USAGE 90
 275#define FRAME_TIME_USAGE (USB_FRAME_USAGE*10)   /* frame time usage */
 276#define SW_FIX_TIME_BETWEEN_TRANSACTION 150     /* SW */
 277#define MAX_BYTES_PER_FRAME (USB_FRAME_USAGE*15)
 278#define MAX_PERIODIC_FRAME_USAGE 90
 279
 280/* transaction type */
 281enum fhci_ta_type {
 282        FHCI_TA_IN = 0, /* input transaction */
 283        FHCI_TA_OUT,    /* output transaction */
 284        FHCI_TA_SETUP,  /* setup transaction */
 285};
 286
 287/* transfer mode */
 288enum fhci_tf_mode {
 289        FHCI_TF_CTRL = 0,
 290        FHCI_TF_ISO,
 291        FHCI_TF_BULK,
 292        FHCI_TF_INTR,
 293};
 294
 295enum fhci_speed {
 296        FHCI_FULL_SPEED,
 297        FHCI_LOW_SPEED,
 298};
 299
 300/* endpoint state */
 301enum fhci_ed_state {
 302        FHCI_ED_NEW = 0, /* pipe is new */
 303        FHCI_ED_OPER,    /* pipe is operating */
 304        FHCI_ED_URB_DEL, /* pipe is in hold because urb is being deleted */
 305        FHCI_ED_SKIP,    /* skip this pipe */
 306        FHCI_ED_HALTED,  /* pipe is halted */
 307};
 308
 309enum fhci_port_status {
 310        FHCI_PORT_POWER_OFF = 0,
 311        FHCI_PORT_DISABLED,
 312        FHCI_PORT_DISCONNECTING,
 313        FHCI_PORT_WAITING,      /* waiting for connection */
 314        FHCI_PORT_FULL,         /* full speed connected */
 315        FHCI_PORT_LOW,          /* low speed connected */
 316};
 317
 318enum fhci_mem_alloc {
 319        MEM_CACHABLE_SYS = 0x00000001,  /* primary DDR,cachable */
 320        MEM_NOCACHE_SYS = 0x00000004,   /* primary DDR,non-cachable */
 321        MEM_SECONDARY = 0x00000002,     /* either secondary DDR or SDRAM */
 322        MEM_PRAM = 0x00000008,          /* multi-user RAM identifier */
 323};
 324
 325/* USB default parameters*/
 326#define DEFAULT_RING_LEN        8
 327#define DEFAULT_DATA_MEM        MEM_CACHABLE_SYS
 328
 329struct ed {
 330        u8 dev_addr;            /* device address */
 331        u8 ep_addr;             /* endpoint address */
 332        enum fhci_tf_mode mode; /* USB transfer mode */
 333        enum fhci_speed speed;
 334        unsigned int max_pkt_size;
 335        enum fhci_ed_state state;
 336        struct list_head td_list; /* a list of all queued TD to this pipe */
 337        struct list_head node;
 338
 339        /* read only parameters, should be cleared upon initialization */
 340        u8 toggle_carry;        /* toggle carry from the last TD submitted */
 341        u16 next_iso;           /* time stamp of next queued ISO transfer */
 342        struct td *td_head;     /* a pointer to the current TD handled */
 343};
 344
 345struct td {
 346        void *data;              /* a pointer to the data buffer */
 347        unsigned int len;        /* length of the data to be submitted */
 348        unsigned int actual_len; /* actual bytes transferred on this td */
 349        enum fhci_ta_type type;  /* transaction type */
 350        u8 toggle;               /* toggle for next trans. within this TD */
 351        u16 iso_index;           /* ISO transaction index */
 352        u16 start_frame;         /* start frame time stamp */
 353        u16 interval;            /* interval between trans. (for ISO/Intr) */
 354        u32 status;              /* status of the TD */
 355        struct ed *ed;           /* a handle to the corresponding ED */
 356        struct urb *urb;         /* a handle to the corresponding URB */
 357        bool ioc;                /* Inform On Completion */
 358        struct list_head node;
 359
 360        /* read only parameters should be cleared upon initialization */
 361        struct packet *pkt;
 362        int nak_cnt;
 363        int error_cnt;
 364        struct list_head frame_lh;
 365};
 366
 367struct packet {
 368        u8 *data;       /* packet data */
 369        u32 len;        /* packet length */
 370        u32 status;     /* status of the packet - equivalent to the status
 371                         * field for the corresponding structure td */
 372        u32 info;       /* packet information */
 373        void __iomem *priv_data; /* private data of the driver (TDs or BDs) */
 374};
 375
 376/* struct for each URB */
 377#define URB_INPROGRESS  0
 378#define URB_DEL         1
 379
 380/* URB states (state field) */
 381#define US_BULK         0
 382#define US_BULK0        1
 383
 384/* three setup states */
 385#define US_CTRL_SETUP   2
 386#define US_CTRL_DATA    1
 387#define US_CTRL_ACK     0
 388
 389#define EP_ZERO 0
 390
 391struct urb_priv {
 392        int num_of_tds;
 393        int tds_cnt;
 394        int state;
 395
 396        struct td **tds;
 397        struct ed *ed;
 398        struct timer_list time_out;
 399};
 400
 401struct endpoint {
 402        /* Pointer to ep parameter RAM */
 403        struct fhci_ep_pram __iomem *ep_pram_ptr;
 404
 405        /* Host transactions */
 406        struct usb_td __iomem *td_base; /* first TD in the ring */
 407        struct usb_td __iomem *conf_td; /* next TD for confirm after transac */
 408        struct usb_td __iomem *empty_td;/* next TD for new transaction req. */
 409        struct kfifo empty_frame_Q;  /* Empty frames list to use */
 410        struct kfifo conf_frame_Q;   /* frames passed to TDs,waiting for tx */
 411        struct kfifo dummy_packets_Q;/* dummy packets for the CRC overun */
 412
 413        bool already_pushed_dummy_bd;
 414};
 415
 416/* struct for each 1mSec frame time */
 417#define FRAME_IS_TRANSMITTED            0x00
 418#define FRAME_TIMER_END_TRANSMISSION    0x01
 419#define FRAME_DATA_END_TRANSMISSION     0x02
 420#define FRAME_END_TRANSMISSION          0x03
 421#define FRAME_IS_PREPARED               0x04
 422
 423struct fhci_time_frame {
 424        u16 frame_num;   /* frame number */
 425        u16 total_bytes; /* total bytes submitted within this frame */
 426        u8 frame_status; /* flag that indicates to stop fill this frame */
 427        struct list_head tds_list; /* all tds of this frame */
 428};
 429
 430/* internal driver structure*/
 431struct fhci_usb {
 432        u16 saved_msk;           /* saving of the USB mask register */
 433        struct endpoint *ep0;    /* pointer for endpoint0 structure */
 434        int intr_nesting_cnt;    /* interrupt nesting counter */
 435        u16 max_frame_usage;     /* max frame time usage,in micro-sec */
 436        u16 max_bytes_per_frame; /* max byte can be tx in one time frame */
 437        u32 sw_transaction_time; /* sw complete trans time,in micro-sec */
 438        struct fhci_time_frame *actual_frame;
 439        struct fhci_controller_list *hc_list;   /* main structure for hc */
 440        struct virtual_root_hub *vroot_hub;
 441        enum fhci_port_status port_status;      /* v_rh port status */
 442
 443        u32 (*transfer_confirm)(struct fhci_hcd *fhci);
 444
 445        struct fhci_hcd *fhci;
 446};
 447
 448/*
 449 * Various helpers and prototypes below.
 450 */
 451
 452static inline u16 get_frame_num(struct fhci_hcd *fhci)
 453{
 454        return in_be16(&fhci->pram->frame_num) & 0x07ff;
 455}
 456
 457#define fhci_dbg(fhci, fmt, args...) \
 458                dev_dbg(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
 459#define fhci_vdbg(fhci, fmt, args...) \
 460                dev_vdbg(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
 461#define fhci_err(fhci, fmt, args...) \
 462                dev_err(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
 463#define fhci_info(fhci, fmt, args...) \
 464                dev_info(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
 465#define fhci_warn(fhci, fmt, args...) \
 466                dev_warn(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
 467
 468static inline struct fhci_hcd *hcd_to_fhci(struct usb_hcd *hcd)
 469{
 470        return (struct fhci_hcd *)hcd->hcd_priv;
 471}
 472
 473static inline struct usb_hcd *fhci_to_hcd(struct fhci_hcd *fhci)
 474{
 475        return container_of((void *)fhci, struct usb_hcd, hcd_priv);
 476}
 477
 478/* fifo of pointers */
 479static inline int cq_new(struct kfifo *fifo, int size)
 480{
 481        return kfifo_alloc(fifo, size * sizeof(void *), GFP_KERNEL);
 482}
 483
 484static inline void cq_delete(struct kfifo *kfifo)
 485{
 486        kfifo_free(kfifo);
 487}
 488
 489static inline unsigned int cq_howmany(struct kfifo *kfifo)
 490{
 491        return kfifo_len(kfifo) / sizeof(void *);
 492}
 493
 494static inline int cq_put(struct kfifo *kfifo, void *p)
 495{
 496        return kfifo_in(kfifo, (void *)&p, sizeof(p));
 497}
 498
 499static inline void *cq_get(struct kfifo *kfifo)
 500{
 501        unsigned int sz;
 502        void *p;
 503
 504        sz = kfifo_out(kfifo, (void *)&p, sizeof(p));
 505        if (sz != sizeof(p))
 506                return NULL;
 507
 508        return p;
 509}
 510
 511/* fhci-hcd.c */
 512void fhci_start_sof_timer(struct fhci_hcd *fhci);
 513void fhci_stop_sof_timer(struct fhci_hcd *fhci);
 514u16 fhci_get_sof_timer_count(struct fhci_usb *usb);
 515void fhci_usb_enable_interrupt(struct fhci_usb *usb);
 516void fhci_usb_disable_interrupt(struct fhci_usb *usb);
 517int fhci_ioports_check_bus_state(struct fhci_hcd *fhci);
 518
 519/* fhci-mem.c */
 520void fhci_recycle_empty_td(struct fhci_hcd *fhci, struct td *td);
 521void fhci_recycle_empty_ed(struct fhci_hcd *fhci, struct ed *ed);
 522struct ed *fhci_get_empty_ed(struct fhci_hcd *fhci);
 523struct td *fhci_td_fill(struct fhci_hcd *fhci, struct urb *urb,
 524                        struct urb_priv *urb_priv, struct ed *ed, u16 index,
 525                        enum fhci_ta_type type, int toggle, u8 *data, u32 len,
 526                        u16 interval, u16 start_frame, bool ioc);
 527void fhci_add_tds_to_ed(struct ed *ed, struct td **td_list, int number);
 528
 529/* fhci-hub.c */
 530void fhci_config_transceiver(struct fhci_hcd *fhci,
 531                        enum fhci_port_status status);
 532void fhci_port_disable(struct fhci_hcd *fhci);
 533void fhci_port_enable(void *lld);
 534void fhci_io_port_generate_reset(struct fhci_hcd *fhci);
 535void fhci_port_reset(void *lld);
 536int fhci_hub_status_data(struct usb_hcd *hcd, char *buf);
 537int fhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
 538                     u16 wIndex, char *buf, u16 wLength);
 539
 540/* fhci-tds.c */
 541void fhci_flush_bds(struct fhci_usb *usb);
 542void fhci_flush_actual_frame(struct fhci_usb *usb);
 543u32 fhci_host_transaction(struct fhci_usb *usb, struct packet *pkt,
 544                          enum fhci_ta_type trans_type, u8 dest_addr,
 545                          u8 dest_ep, enum fhci_tf_mode trans_mode,
 546                          enum fhci_speed dest_speed, u8 data_toggle);
 547void fhci_host_transmit_actual_frame(struct fhci_usb *usb);
 548void fhci_tx_conf_interrupt(struct fhci_usb *usb);
 549void fhci_push_dummy_bd(struct endpoint *ep);
 550u32 fhci_create_ep(struct fhci_usb *usb, enum fhci_mem_alloc data_mem,
 551                   u32 ring_len);
 552void fhci_init_ep_registers(struct fhci_usb *usb,
 553                            struct endpoint *ep,
 554                            enum fhci_mem_alloc data_mem);
 555void fhci_ep0_free(struct fhci_usb *usb);
 556
 557/* fhci-sched.c */
 558extern struct tasklet_struct fhci_tasklet;
 559void fhci_transaction_confirm(struct fhci_usb *usb, struct packet *pkt);
 560void fhci_flush_all_transmissions(struct fhci_usb *usb);
 561void fhci_schedule_transactions(struct fhci_usb *usb);
 562void fhci_device_connected_interrupt(struct fhci_hcd *fhci);
 563void fhci_device_disconnected_interrupt(struct fhci_hcd *fhci);
 564void fhci_queue_urb(struct fhci_hcd *fhci, struct urb *urb);
 565u32 fhci_transfer_confirm_callback(struct fhci_hcd *fhci);
 566irqreturn_t fhci_irq(struct usb_hcd *hcd);
 567irqreturn_t fhci_frame_limit_timer_irq(int irq, void *_hcd);
 568
 569/* fhci-q.h */
 570void fhci_urb_complete_free(struct fhci_hcd *fhci, struct urb *urb);
 571struct td *fhci_remove_td_from_ed(struct ed *ed);
 572struct td *fhci_remove_td_from_frame(struct fhci_time_frame *frame);
 573void fhci_move_td_from_ed_to_done_list(struct fhci_usb *usb, struct ed *ed);
 574struct td *fhci_peek_td_from_frame(struct fhci_time_frame *frame);
 575void fhci_add_td_to_frame(struct fhci_time_frame *frame, struct td *td);
 576struct td *fhci_remove_td_from_done_list(struct fhci_controller_list *p_list);
 577void fhci_done_td(struct urb *urb, struct td *td);
 578void fhci_del_ed_list(struct fhci_hcd *fhci, struct ed *ed);
 579
 580#ifdef CONFIG_FHCI_DEBUG
 581
 582void fhci_dbg_isr(struct fhci_hcd *fhci, int usb_er);
 583void fhci_dfs_destroy(struct fhci_hcd *fhci);
 584void fhci_dfs_create(struct fhci_hcd *fhci);
 585
 586#else
 587
 588static inline void fhci_dbg_isr(struct fhci_hcd *fhci, int usb_er) {}
 589static inline void fhci_dfs_destroy(struct fhci_hcd *fhci) {}
 590static inline void fhci_dfs_create(struct fhci_hcd *fhci) {}
 591
 592#endif /* CONFIG_FHCI_DEBUG */
 593
 594#endif /* __FHCI_H */
 595