1#ifndef _LINUX_IRQ_H
2#define _LINUX_IRQ_H
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12#include <linux/smp.h>
13#include <linux/linkage.h>
14#include <linux/cache.h>
15#include <linux/spinlock.h>
16#include <linux/cpumask.h>
17#include <linux/gfp.h>
18#include <linux/irqreturn.h>
19#include <linux/irqnr.h>
20#include <linux/errno.h>
21#include <linux/topology.h>
22#include <linux/wait.h>
23
24#include <asm/irq.h>
25#include <asm/ptrace.h>
26#include <asm/irq_regs.h>
27
28struct seq_file;
29struct module;
30struct irq_desc;
31struct irq_data;
32typedef void (*irq_flow_handler_t)(unsigned int irq,
33 struct irq_desc *desc);
34typedef void (*irq_preflow_handler_t)(struct irq_data *data);
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74enum {
75 IRQ_TYPE_NONE = 0x00000000,
76 IRQ_TYPE_EDGE_RISING = 0x00000001,
77 IRQ_TYPE_EDGE_FALLING = 0x00000002,
78 IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING),
79 IRQ_TYPE_LEVEL_HIGH = 0x00000004,
80 IRQ_TYPE_LEVEL_LOW = 0x00000008,
81 IRQ_TYPE_LEVEL_MASK = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH),
82 IRQ_TYPE_SENSE_MASK = 0x0000000f,
83 IRQ_TYPE_DEFAULT = IRQ_TYPE_SENSE_MASK,
84
85 IRQ_TYPE_PROBE = 0x00000010,
86
87 IRQ_LEVEL = (1 << 8),
88 IRQ_PER_CPU = (1 << 9),
89 IRQ_NOPROBE = (1 << 10),
90 IRQ_NOREQUEST = (1 << 11),
91 IRQ_NOAUTOEN = (1 << 12),
92 IRQ_NO_BALANCING = (1 << 13),
93 IRQ_MOVE_PCNTXT = (1 << 14),
94 IRQ_NESTED_THREAD = (1 << 15),
95 IRQ_NOTHREAD = (1 << 16),
96 IRQ_PER_CPU_DEVID = (1 << 17),
97};
98
99#define IRQF_MODIFY_MASK \
100 (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \
101 IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \
102 IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID)
103
104#define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
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111
112enum {
113 IRQ_SET_MASK_OK = 0,
114 IRQ_SET_MASK_OK_NOCOPY,
115};
116
117struct msi_desc;
118struct irq_domain;
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141struct irq_data {
142 u32 mask;
143 unsigned int irq;
144 unsigned long hwirq;
145 unsigned int node;
146 unsigned int state_use_accessors;
147 struct irq_chip *chip;
148 struct irq_domain *domain;
149 void *handler_data;
150 void *chip_data;
151 struct msi_desc *msi_desc;
152 cpumask_var_t affinity;
153};
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172enum {
173 IRQD_TRIGGER_MASK = 0xf,
174 IRQD_SETAFFINITY_PENDING = (1 << 8),
175 IRQD_NO_BALANCING = (1 << 10),
176 IRQD_PER_CPU = (1 << 11),
177 IRQD_AFFINITY_SET = (1 << 12),
178 IRQD_LEVEL = (1 << 13),
179 IRQD_WAKEUP_STATE = (1 << 14),
180 IRQD_MOVE_PCNTXT = (1 << 15),
181 IRQD_IRQ_DISABLED = (1 << 16),
182 IRQD_IRQ_MASKED = (1 << 17),
183 IRQD_IRQ_INPROGRESS = (1 << 18),
184};
185
186static inline bool irqd_is_setaffinity_pending(struct irq_data *d)
187{
188 return d->state_use_accessors & IRQD_SETAFFINITY_PENDING;
189}
190
191static inline bool irqd_is_per_cpu(struct irq_data *d)
192{
193 return d->state_use_accessors & IRQD_PER_CPU;
194}
195
196static inline bool irqd_can_balance(struct irq_data *d)
197{
198 return !(d->state_use_accessors & (IRQD_PER_CPU | IRQD_NO_BALANCING));
199}
200
201static inline bool irqd_affinity_was_set(struct irq_data *d)
202{
203 return d->state_use_accessors & IRQD_AFFINITY_SET;
204}
205
206static inline void irqd_mark_affinity_was_set(struct irq_data *d)
207{
208 d->state_use_accessors |= IRQD_AFFINITY_SET;
209}
210
211static inline u32 irqd_get_trigger_type(struct irq_data *d)
212{
213 return d->state_use_accessors & IRQD_TRIGGER_MASK;
214}
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219static inline void irqd_set_trigger_type(struct irq_data *d, u32 type)
220{
221 d->state_use_accessors &= ~IRQD_TRIGGER_MASK;
222 d->state_use_accessors |= type & IRQD_TRIGGER_MASK;
223}
224
225static inline bool irqd_is_level_type(struct irq_data *d)
226{
227 return d->state_use_accessors & IRQD_LEVEL;
228}
229
230static inline bool irqd_is_wakeup_set(struct irq_data *d)
231{
232 return d->state_use_accessors & IRQD_WAKEUP_STATE;
233}
234
235static inline bool irqd_can_move_in_process_context(struct irq_data *d)
236{
237 return d->state_use_accessors & IRQD_MOVE_PCNTXT;
238}
239
240static inline bool irqd_irq_disabled(struct irq_data *d)
241{
242 return d->state_use_accessors & IRQD_IRQ_DISABLED;
243}
244
245static inline bool irqd_irq_masked(struct irq_data *d)
246{
247 return d->state_use_accessors & IRQD_IRQ_MASKED;
248}
249
250static inline bool irqd_irq_inprogress(struct irq_data *d)
251{
252 return d->state_use_accessors & IRQD_IRQ_INPROGRESS;
253}
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260static inline void irqd_set_chained_irq_inprogress(struct irq_data *d)
261{
262 d->state_use_accessors |= IRQD_IRQ_INPROGRESS;
263}
264
265static inline void irqd_clr_chained_irq_inprogress(struct irq_data *d)
266{
267 d->state_use_accessors &= ~IRQD_IRQ_INPROGRESS;
268}
269
270static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
271{
272 return d->hwirq;
273}
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303struct irq_chip {
304 const char *name;
305 unsigned int (*irq_startup)(struct irq_data *data);
306 void (*irq_shutdown)(struct irq_data *data);
307 void (*irq_enable)(struct irq_data *data);
308 void (*irq_disable)(struct irq_data *data);
309
310 void (*irq_ack)(struct irq_data *data);
311 void (*irq_mask)(struct irq_data *data);
312 void (*irq_mask_ack)(struct irq_data *data);
313 void (*irq_unmask)(struct irq_data *data);
314 void (*irq_eoi)(struct irq_data *data);
315
316 int (*irq_set_affinity)(struct irq_data *data, const struct cpumask *dest, bool force);
317 int (*irq_retrigger)(struct irq_data *data);
318 int (*irq_set_type)(struct irq_data *data, unsigned int flow_type);
319 int (*irq_set_wake)(struct irq_data *data, unsigned int on);
320
321 void (*irq_bus_lock)(struct irq_data *data);
322 void (*irq_bus_sync_unlock)(struct irq_data *data);
323
324 void (*irq_cpu_online)(struct irq_data *data);
325 void (*irq_cpu_offline)(struct irq_data *data);
326
327 void (*irq_suspend)(struct irq_data *data);
328 void (*irq_resume)(struct irq_data *data);
329 void (*irq_pm_shutdown)(struct irq_data *data);
330
331 void (*irq_calc_mask)(struct irq_data *data);
332
333 void (*irq_print_chip)(struct irq_data *data, struct seq_file *p);
334
335 unsigned long flags;
336};
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348enum {
349 IRQCHIP_SET_TYPE_MASKED = (1 << 0),
350 IRQCHIP_EOI_IF_HANDLED = (1 << 1),
351 IRQCHIP_MASK_ON_SUSPEND = (1 << 2),
352 IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
353 IRQCHIP_SKIP_SET_WAKE = (1 << 4),
354 IRQCHIP_ONESHOT_SAFE = (1 << 5),
355};
356
357
358#include <linux/irqdesc.h>
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363#include <asm/hw_irq.h>
364
365#ifndef NR_IRQS_LEGACY
366# define NR_IRQS_LEGACY 0
367#endif
368
369#ifndef ARCH_IRQ_INIT_FLAGS
370# define ARCH_IRQ_INIT_FLAGS 0
371#endif
372
373#define IRQ_DEFAULT_INIT_FLAGS ARCH_IRQ_INIT_FLAGS
374
375struct irqaction;
376extern int setup_irq(unsigned int irq, struct irqaction *new);
377extern void remove_irq(unsigned int irq, struct irqaction *act);
378extern int setup_percpu_irq(unsigned int irq, struct irqaction *new);
379extern void remove_percpu_irq(unsigned int irq, struct irqaction *act);
380
381extern void irq_cpu_online(void);
382extern void irq_cpu_offline(void);
383extern int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *cpumask);
384
385#ifdef CONFIG_GENERIC_HARDIRQS
386
387#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ)
388void irq_move_irq(struct irq_data *data);
389void irq_move_masked_irq(struct irq_data *data);
390#else
391static inline void irq_move_irq(struct irq_data *data) { }
392static inline void irq_move_masked_irq(struct irq_data *data) { }
393#endif
394
395extern int no_irq_affinity;
396
397#ifdef CONFIG_HARDIRQS_SW_RESEND
398int irq_set_parent(int irq, int parent_irq);
399#else
400static inline int irq_set_parent(int irq, int parent_irq)
401{
402 return 0;
403}
404#endif
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410extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
411extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
412extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
413extern void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc);
414extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
415extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
416extern void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc);
417extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
418extern void handle_nested_irq(unsigned int irq);
419
420
421extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
422 irqreturn_t action_ret);
423
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425
426extern int noirqdebug_setup(char *str);
427
428
429extern int can_request_irq(unsigned int irq, unsigned long irqflags);
430
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432extern struct irq_chip no_irq_chip;
433extern struct irq_chip dummy_irq_chip;
434
435extern void
436irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
437 irq_flow_handler_t handle, const char *name);
438
439static inline void irq_set_chip_and_handler(unsigned int irq, struct irq_chip *chip,
440 irq_flow_handler_t handle)
441{
442 irq_set_chip_and_handler_name(irq, chip, handle, NULL);
443}
444
445extern int irq_set_percpu_devid(unsigned int irq);
446
447extern void
448__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
449 const char *name);
450
451static inline void
452irq_set_handler(unsigned int irq, irq_flow_handler_t handle)
453{
454 __irq_set_handler(irq, handle, 0, NULL);
455}
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462static inline void
463irq_set_chained_handler(unsigned int irq, irq_flow_handler_t handle)
464{
465 __irq_set_handler(irq, handle, 1, NULL);
466}
467
468void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set);
469
470static inline void irq_set_status_flags(unsigned int irq, unsigned long set)
471{
472 irq_modify_status(irq, 0, set);
473}
474
475static inline void irq_clear_status_flags(unsigned int irq, unsigned long clr)
476{
477 irq_modify_status(irq, clr, 0);
478}
479
480static inline void irq_set_noprobe(unsigned int irq)
481{
482 irq_modify_status(irq, 0, IRQ_NOPROBE);
483}
484
485static inline void irq_set_probe(unsigned int irq)
486{
487 irq_modify_status(irq, IRQ_NOPROBE, 0);
488}
489
490static inline void irq_set_nothread(unsigned int irq)
491{
492 irq_modify_status(irq, 0, IRQ_NOTHREAD);
493}
494
495static inline void irq_set_thread(unsigned int irq)
496{
497 irq_modify_status(irq, IRQ_NOTHREAD, 0);
498}
499
500static inline void irq_set_nested_thread(unsigned int irq, bool nest)
501{
502 if (nest)
503 irq_set_status_flags(irq, IRQ_NESTED_THREAD);
504 else
505 irq_clear_status_flags(irq, IRQ_NESTED_THREAD);
506}
507
508static inline void irq_set_percpu_devid_flags(unsigned int irq)
509{
510 irq_set_status_flags(irq,
511 IRQ_NOAUTOEN | IRQ_PER_CPU | IRQ_NOTHREAD |
512 IRQ_NOPROBE | IRQ_PER_CPU_DEVID);
513}
514
515
516extern unsigned int create_irq_nr(unsigned int irq_want, int node);
517extern unsigned int __create_irqs(unsigned int from, unsigned int count,
518 int node);
519extern int create_irq(void);
520extern void destroy_irq(unsigned int irq);
521extern void destroy_irqs(unsigned int irq, unsigned int count);
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527extern void dynamic_irq_cleanup(unsigned int irq);
528static inline void dynamic_irq_init(unsigned int irq)
529{
530 dynamic_irq_cleanup(irq);
531}
532
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534extern int irq_set_chip(unsigned int irq, struct irq_chip *chip);
535extern int irq_set_handler_data(unsigned int irq, void *data);
536extern int irq_set_chip_data(unsigned int irq, void *data);
537extern int irq_set_irq_type(unsigned int irq, unsigned int type);
538extern int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry);
539extern int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
540 struct msi_desc *entry);
541extern struct irq_data *irq_get_irq_data(unsigned int irq);
542
543static inline struct irq_chip *irq_get_chip(unsigned int irq)
544{
545 struct irq_data *d = irq_get_irq_data(irq);
546 return d ? d->chip : NULL;
547}
548
549static inline struct irq_chip *irq_data_get_irq_chip(struct irq_data *d)
550{
551 return d->chip;
552}
553
554static inline void *irq_get_chip_data(unsigned int irq)
555{
556 struct irq_data *d = irq_get_irq_data(irq);
557 return d ? d->chip_data : NULL;
558}
559
560static inline void *irq_data_get_irq_chip_data(struct irq_data *d)
561{
562 return d->chip_data;
563}
564
565static inline void *irq_get_handler_data(unsigned int irq)
566{
567 struct irq_data *d = irq_get_irq_data(irq);
568 return d ? d->handler_data : NULL;
569}
570
571static inline void *irq_data_get_irq_handler_data(struct irq_data *d)
572{
573 return d->handler_data;
574}
575
576static inline struct msi_desc *irq_get_msi_desc(unsigned int irq)
577{
578 struct irq_data *d = irq_get_irq_data(irq);
579 return d ? d->msi_desc : NULL;
580}
581
582static inline struct msi_desc *irq_data_get_msi(struct irq_data *d)
583{
584 return d->msi_desc;
585}
586
587static inline u32 irq_get_trigger_type(unsigned int irq)
588{
589 struct irq_data *d = irq_get_irq_data(irq);
590 return d ? irqd_get_trigger_type(d) : 0;
591}
592
593int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
594 struct module *owner);
595
596
597#define irq_alloc_descs(irq, from, cnt, node) \
598 __irq_alloc_descs(irq, from, cnt, node, THIS_MODULE)
599
600#define irq_alloc_desc(node) \
601 irq_alloc_descs(-1, 0, 1, node)
602
603#define irq_alloc_desc_at(at, node) \
604 irq_alloc_descs(at, at, 1, node)
605
606#define irq_alloc_desc_from(from, node) \
607 irq_alloc_descs(-1, from, 1, node)
608
609#define irq_alloc_descs_from(from, cnt, node) \
610 irq_alloc_descs(-1, from, cnt, node)
611
612void irq_free_descs(unsigned int irq, unsigned int cnt);
613int irq_reserve_irqs(unsigned int from, unsigned int cnt);
614
615static inline void irq_free_desc(unsigned int irq)
616{
617 irq_free_descs(irq, 1);
618}
619
620static inline int irq_reserve_irq(unsigned int irq)
621{
622 return irq_reserve_irqs(irq, 1);
623}
624
625#ifndef irq_reg_writel
626# define irq_reg_writel(val, addr) writel(val, addr)
627#endif
628#ifndef irq_reg_readl
629# define irq_reg_readl(addr) readl(addr)
630#endif
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642struct irq_chip_regs {
643 unsigned long enable;
644 unsigned long disable;
645 unsigned long mask;
646 unsigned long ack;
647 unsigned long eoi;
648 unsigned long type;
649 unsigned long polarity;
650};
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665struct irq_chip_type {
666 struct irq_chip chip;
667 struct irq_chip_regs regs;
668 irq_flow_handler_t handler;
669 u32 type;
670 u32 mask_cache_priv;
671 u32 *mask_cache;
672};
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699struct irq_chip_generic {
700 raw_spinlock_t lock;
701 void __iomem *reg_base;
702 unsigned int irq_base;
703 unsigned int irq_cnt;
704 u32 mask_cache;
705 u32 type_cache;
706 u32 polarity_cache;
707 u32 wake_enabled;
708 u32 wake_active;
709 unsigned int num_ct;
710 void *private;
711 unsigned long installed;
712 unsigned long unused;
713 struct irq_domain *domain;
714 struct list_head list;
715 struct irq_chip_type chip_types[0];
716};
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727enum irq_gc_flags {
728 IRQ_GC_INIT_MASK_CACHE = 1 << 0,
729 IRQ_GC_INIT_NESTED_LOCK = 1 << 1,
730 IRQ_GC_MASK_CACHE_PER_TYPE = 1 << 2,
731 IRQ_GC_NO_MASK = 1 << 3,
732};
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743struct irq_domain_chip_generic {
744 unsigned int irqs_per_chip;
745 unsigned int num_chips;
746 unsigned int irq_flags_to_clear;
747 unsigned int irq_flags_to_set;
748 enum irq_gc_flags gc_flags;
749 struct irq_chip_generic *gc[0];
750};
751
752
753void irq_gc_noop(struct irq_data *d);
754void irq_gc_mask_disable_reg(struct irq_data *d);
755void irq_gc_mask_set_bit(struct irq_data *d);
756void irq_gc_mask_clr_bit(struct irq_data *d);
757void irq_gc_unmask_enable_reg(struct irq_data *d);
758void irq_gc_ack_set_bit(struct irq_data *d);
759void irq_gc_ack_clr_bit(struct irq_data *d);
760void irq_gc_mask_disable_reg_and_ack(struct irq_data *d);
761void irq_gc_eoi(struct irq_data *d);
762int irq_gc_set_wake(struct irq_data *d, unsigned int on);
763
764
765struct irq_chip_generic *
766irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
767 void __iomem *reg_base, irq_flow_handler_t handler);
768void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
769 enum irq_gc_flags flags, unsigned int clr,
770 unsigned int set);
771int irq_setup_alt_chip(struct irq_data *d, unsigned int type);
772void irq_remove_generic_chip(struct irq_chip_generic *gc, u32 msk,
773 unsigned int clr, unsigned int set);
774
775struct irq_chip_generic *irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq);
776int irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip,
777 int num_ct, const char *name,
778 irq_flow_handler_t handler,
779 unsigned int clr, unsigned int set,
780 enum irq_gc_flags flags);
781
782
783static inline struct irq_chip_type *irq_data_get_chip_type(struct irq_data *d)
784{
785 return container_of(d->chip, struct irq_chip_type, chip);
786}
787
788#define IRQ_MSK(n) (u32)((n) < 32 ? ((1 << (n)) - 1) : UINT_MAX)
789
790#ifdef CONFIG_SMP
791static inline void irq_gc_lock(struct irq_chip_generic *gc)
792{
793 raw_spin_lock(&gc->lock);
794}
795
796static inline void irq_gc_unlock(struct irq_chip_generic *gc)
797{
798 raw_spin_unlock(&gc->lock);
799}
800#else
801static inline void irq_gc_lock(struct irq_chip_generic *gc) { }
802static inline void irq_gc_unlock(struct irq_chip_generic *gc) { }
803#endif
804
805#else
806
807extern struct msi_desc *irq_get_msi_desc(unsigned int irq);
808extern int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry);
809
810#endif
811
812#endif
813