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31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/slab.h>
34#include <linux/module.h>
35#include <sound/core.h>
36#include <sound/jack.h>
37#include <sound/asoundef.h>
38#include <sound/tlv.h>
39#include "hda_codec.h"
40#include "hda_local.h"
41#include "hda_jack.h"
42
43static bool static_hdmi_pcm;
44module_param(static_hdmi_pcm, bool, 0644);
45MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
46
47struct hdmi_spec_per_cvt {
48 hda_nid_t cvt_nid;
49 int assigned;
50 unsigned int channels_min;
51 unsigned int channels_max;
52 u32 rates;
53 u64 formats;
54 unsigned int maxbps;
55};
56
57
58#define HDA_MAX_CONNECTIONS 32
59
60struct hdmi_spec_per_pin {
61 hda_nid_t pin_nid;
62 int num_mux_nids;
63 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
64
65 struct hda_codec *codec;
66 struct hdmi_eld sink_eld;
67 struct delayed_work work;
68 struct snd_kcontrol *eld_ctl;
69 int repoll_count;
70 bool non_pcm;
71 bool chmap_set;
72 unsigned char chmap[8];
73 char pcm_name[8];
74};
75
76struct hdmi_spec {
77 int num_cvts;
78 struct snd_array cvts;
79 hda_nid_t cvt_nids[4];
80
81 int num_pins;
82 struct snd_array pins;
83 struct snd_array pcm_rec;
84 unsigned int channels_max;
85
86 struct hdmi_eld temp_eld;
87
88
89
90 struct hda_multi_out multiout;
91 struct hda_pcm_stream pcm_playback;
92};
93
94
95struct hdmi_audio_infoframe {
96 u8 type;
97 u8 ver;
98 u8 len;
99
100 u8 checksum;
101
102 u8 CC02_CT47;
103 u8 SS01_SF24;
104 u8 CXT04;
105 u8 CA;
106 u8 LFEPBL01_LSV36_DM_INH7;
107};
108
109struct dp_audio_infoframe {
110 u8 type;
111 u8 len;
112 u8 ver;
113
114 u8 CC02_CT47;
115 u8 SS01_SF24;
116 u8 CXT04;
117 u8 CA;
118 u8 LFEPBL01_LSV36_DM_INH7;
119};
120
121union audio_infoframe {
122 struct hdmi_audio_infoframe hdmi;
123 struct dp_audio_infoframe dp;
124 u8 bytes[0];
125};
126
127
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139
140
141enum cea_speaker_placement {
142 FL = (1 << 0),
143 FC = (1 << 1),
144 FR = (1 << 2),
145 FLC = (1 << 3),
146 FRC = (1 << 4),
147 RL = (1 << 5),
148 RC = (1 << 6),
149 RR = (1 << 7),
150 RLC = (1 << 8),
151 RRC = (1 << 9),
152 LFE = (1 << 10),
153 FLW = (1 << 11),
154 FRW = (1 << 12),
155 FLH = (1 << 13),
156 FCH = (1 << 14),
157 FRH = (1 << 15),
158 TC = (1 << 16),
159};
160
161
162
163
164static int eld_speaker_allocation_bits[] = {
165 [0] = FL | FR,
166 [1] = LFE,
167 [2] = FC,
168 [3] = RL | RR,
169 [4] = RC,
170 [5] = FLC | FRC,
171 [6] = RLC | RRC,
172
173 [7] = FLW | FRW,
174 [8] = FLH | FRH,
175 [9] = TC,
176 [10] = FCH,
177};
178
179struct cea_channel_speaker_allocation {
180 int ca_index;
181 int speakers[8];
182
183
184 int channels;
185 int spk_mask;
186};
187
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201
202
203static int hdmi_channel_mapping[0x32][8] = {
204
205 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
206
207 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
208
209 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
210
211 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
212
213 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
214
215 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
216
217 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
218
219 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
220
221 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
222};
223
224
225
226
227
228
229
230static struct cea_channel_speaker_allocation channel_allocations[] = {
231
232{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
233
234{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
235
236{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
237
238{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
239
240{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
241
242{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
243
244{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
245
246{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
247
248{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
249
250{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
251{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
252{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
253{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
254{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
255{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
256{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
257{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
258{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
259{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
260{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
261{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
262{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
263{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
264{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
265{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
266{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
267{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
268{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
269{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
270{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
271{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
272{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
273{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
274{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
275{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
276{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
277{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
278{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
279{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
280{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
281{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
282{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
283{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
284{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
285{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
286{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
287{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
288{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
289{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
290{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
291};
292
293
294
295
296
297
298#define get_pin(spec, idx) \
299 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
300#define get_cvt(spec, idx) \
301 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
302#define get_pcm_rec(spec, idx) \
303 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
304
305static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
306{
307 int pin_idx;
308
309 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
310 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
311 return pin_idx;
312
313 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
314 return -EINVAL;
315}
316
317static int hinfo_to_pin_index(struct hdmi_spec *spec,
318 struct hda_pcm_stream *hinfo)
319{
320 int pin_idx;
321
322 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
323 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
324 return pin_idx;
325
326 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
327 return -EINVAL;
328}
329
330static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
331{
332 int cvt_idx;
333
334 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
335 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
336 return cvt_idx;
337
338 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
339 return -EINVAL;
340}
341
342static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
343 struct snd_ctl_elem_info *uinfo)
344{
345 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
346 struct hdmi_spec *spec = codec->spec;
347 struct hdmi_eld *eld;
348 int pin_idx;
349
350 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
351
352 pin_idx = kcontrol->private_value;
353 eld = &get_pin(spec, pin_idx)->sink_eld;
354
355 mutex_lock(&eld->lock);
356 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
357 mutex_unlock(&eld->lock);
358
359 return 0;
360}
361
362static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
363 struct snd_ctl_elem_value *ucontrol)
364{
365 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
366 struct hdmi_spec *spec = codec->spec;
367 struct hdmi_eld *eld;
368 int pin_idx;
369
370 pin_idx = kcontrol->private_value;
371 eld = &get_pin(spec, pin_idx)->sink_eld;
372
373 mutex_lock(&eld->lock);
374 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
375 mutex_unlock(&eld->lock);
376 snd_BUG();
377 return -EINVAL;
378 }
379
380 memset(ucontrol->value.bytes.data, 0,
381 ARRAY_SIZE(ucontrol->value.bytes.data));
382 if (eld->eld_valid)
383 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
384 eld->eld_size);
385 mutex_unlock(&eld->lock);
386
387 return 0;
388}
389
390static struct snd_kcontrol_new eld_bytes_ctl = {
391 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
392 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
393 .name = "ELD",
394 .info = hdmi_eld_ctl_info,
395 .get = hdmi_eld_ctl_get,
396};
397
398static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
399 int device)
400{
401 struct snd_kcontrol *kctl;
402 struct hdmi_spec *spec = codec->spec;
403 int err;
404
405 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
406 if (!kctl)
407 return -ENOMEM;
408 kctl->private_value = pin_idx;
409 kctl->id.device = device;
410
411 err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
412 if (err < 0)
413 return err;
414
415 get_pin(spec, pin_idx)->eld_ctl = kctl;
416 return 0;
417}
418
419#ifdef BE_PARANOID
420static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
421 int *packet_index, int *byte_index)
422{
423 int val;
424
425 val = snd_hda_codec_read(codec, pin_nid, 0,
426 AC_VERB_GET_HDMI_DIP_INDEX, 0);
427
428 *packet_index = val >> 5;
429 *byte_index = val & 0x1f;
430}
431#endif
432
433static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
434 int packet_index, int byte_index)
435{
436 int val;
437
438 val = (packet_index << 5) | (byte_index & 0x1f);
439
440 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
441}
442
443static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
444 unsigned char val)
445{
446 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
447}
448
449static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
450{
451
452 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
453 snd_hda_codec_write(codec, pin_nid, 0,
454 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
455
456
457
458 snd_hda_codec_write(codec, pin_nid, 0,
459 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
460}
461
462static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
463{
464 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
465 AC_VERB_GET_CVT_CHAN_COUNT, 0);
466}
467
468static void hdmi_set_channel_count(struct hda_codec *codec,
469 hda_nid_t cvt_nid, int chs)
470{
471 if (chs != hdmi_get_channel_count(codec, cvt_nid))
472 snd_hda_codec_write(codec, cvt_nid, 0,
473 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
474}
475
476
477
478
479
480
481
482
483
484static void init_channel_allocations(void)
485{
486 int i, j;
487 struct cea_channel_speaker_allocation *p;
488
489 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
490 p = channel_allocations + i;
491 p->channels = 0;
492 p->spk_mask = 0;
493 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
494 if (p->speakers[j]) {
495 p->channels++;
496 p->spk_mask |= p->speakers[j];
497 }
498 }
499}
500
501static int get_channel_allocation_order(int ca)
502{
503 int i;
504
505 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
506 if (channel_allocations[i].ca_index == ca)
507 break;
508 }
509 return i;
510}
511
512
513
514
515
516
517
518
519
520static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
521{
522 int i;
523 int ca = 0;
524 int spk_mask = 0;
525 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
526
527
528
529
530 if (channels <= 2)
531 return 0;
532
533
534
535
536
537
538
539 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
540 if (eld->info.spk_alloc & (1 << i))
541 spk_mask |= eld_speaker_allocation_bits[i];
542 }
543
544
545 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
546 if (channels == channel_allocations[i].channels &&
547 (spk_mask & channel_allocations[i].spk_mask) ==
548 channel_allocations[i].spk_mask) {
549 ca = channel_allocations[i].ca_index;
550 break;
551 }
552 }
553
554 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
555 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
556 ca, channels, buf);
557
558 return ca;
559}
560
561static void hdmi_debug_channel_mapping(struct hda_codec *codec,
562 hda_nid_t pin_nid)
563{
564#ifdef CONFIG_SND_DEBUG_VERBOSE
565 int i;
566 int slot;
567
568 for (i = 0; i < 8; i++) {
569 slot = snd_hda_codec_read(codec, pin_nid, 0,
570 AC_VERB_GET_HDMI_CHAN_SLOT, i);
571 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
572 slot >> 4, slot & 0xf);
573 }
574#endif
575}
576
577
578static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
579 hda_nid_t pin_nid,
580 bool non_pcm,
581 int ca)
582{
583 int i;
584 int err;
585 int order;
586 int non_pcm_mapping[8];
587
588 order = get_channel_allocation_order(ca);
589
590 if (hdmi_channel_mapping[ca][1] == 0) {
591 for (i = 0; i < channel_allocations[order].channels; i++)
592 hdmi_channel_mapping[ca][i] = i | (i << 4);
593 for (; i < 8; i++)
594 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
595 }
596
597 if (non_pcm) {
598 for (i = 0; i < channel_allocations[order].channels; i++)
599 non_pcm_mapping[i] = i | (i << 4);
600 for (; i < 8; i++)
601 non_pcm_mapping[i] = 0xf | (i << 4);
602 }
603
604 for (i = 0; i < 8; i++) {
605 err = snd_hda_codec_write(codec, pin_nid, 0,
606 AC_VERB_SET_HDMI_CHAN_SLOT,
607 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
608 if (err) {
609 snd_printdd(KERN_NOTICE
610 "HDMI: channel mapping failed\n");
611 break;
612 }
613 }
614
615 hdmi_debug_channel_mapping(codec, pin_nid);
616}
617
618struct channel_map_table {
619 unsigned char map;
620 unsigned char cea_slot;
621 int spk_mask;
622};
623
624static struct channel_map_table map_tables[] = {
625 { SNDRV_CHMAP_FL, 0x00, FL },
626 { SNDRV_CHMAP_FR, 0x01, FR },
627 { SNDRV_CHMAP_RL, 0x04, RL },
628 { SNDRV_CHMAP_RR, 0x05, RR },
629 { SNDRV_CHMAP_LFE, 0x02, LFE },
630 { SNDRV_CHMAP_FC, 0x03, FC },
631 { SNDRV_CHMAP_RLC, 0x06, RLC },
632 { SNDRV_CHMAP_RRC, 0x07, RRC },
633 {}
634};
635
636
637static int to_spk_mask(unsigned char c)
638{
639 struct channel_map_table *t = map_tables;
640 for (; t->map; t++) {
641 if (t->map == c)
642 return t->spk_mask;
643 }
644 return 0;
645}
646
647
648static int to_cea_slot(unsigned char c)
649{
650 struct channel_map_table *t = map_tables;
651 for (; t->map; t++) {
652 if (t->map == c)
653 return t->cea_slot;
654 }
655 return 0x0f;
656}
657
658
659static int from_cea_slot(unsigned char c)
660{
661 struct channel_map_table *t = map_tables;
662 for (; t->map; t++) {
663 if (t->cea_slot == c)
664 return t->map;
665 }
666 return 0;
667}
668
669
670static int spk_to_chmap(int spk)
671{
672 struct channel_map_table *t = map_tables;
673 for (; t->map; t++) {
674 if (t->spk_mask == spk)
675 return t->map;
676 }
677 return 0;
678}
679
680
681static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
682{
683 int i, spks = 0, spk_mask = 0;
684
685 for (i = 0; i < chs; i++) {
686 int mask = to_spk_mask(map[i]);
687 if (mask) {
688 spk_mask |= mask;
689 spks++;
690 }
691 }
692
693 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
694 if ((chs == channel_allocations[i].channels ||
695 spks == channel_allocations[i].channels) &&
696 (spk_mask & channel_allocations[i].spk_mask) ==
697 channel_allocations[i].spk_mask)
698 return channel_allocations[i].ca_index;
699 }
700 return -1;
701}
702
703
704static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
705 hda_nid_t pin_nid,
706 int chs, unsigned char *map)
707{
708 int i;
709 for (i = 0; i < 8; i++) {
710 int val, err;
711 if (i < chs)
712 val = to_cea_slot(map[i]);
713 else
714 val = 0xf;
715 val |= (i << 4);
716 err = snd_hda_codec_write(codec, pin_nid, 0,
717 AC_VERB_SET_HDMI_CHAN_SLOT, val);
718 if (err)
719 return -EINVAL;
720 }
721 return 0;
722}
723
724
725static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
726{
727 int i;
728 for (i = 0; i < 8; i++) {
729 if (i < channel_allocations[ca].channels)
730 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
731 else
732 map[i] = 0;
733 }
734}
735
736static void hdmi_setup_channel_mapping(struct hda_codec *codec,
737 hda_nid_t pin_nid, bool non_pcm, int ca,
738 int channels, unsigned char *map,
739 bool chmap_set)
740{
741 if (!non_pcm && chmap_set) {
742 hdmi_manual_setup_channel_mapping(codec, pin_nid,
743 channels, map);
744 } else {
745 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
746 hdmi_setup_fake_chmap(map, ca);
747 }
748}
749
750
751
752
753
754
755
756
757static void hdmi_start_infoframe_trans(struct hda_codec *codec,
758 hda_nid_t pin_nid)
759{
760 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
761 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
762 AC_DIPXMIT_BEST);
763}
764
765
766
767
768static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
769 hda_nid_t pin_nid)
770{
771 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
772 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
773 AC_DIPXMIT_DISABLE);
774}
775
776static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
777{
778#ifdef CONFIG_SND_DEBUG_VERBOSE
779 int i;
780 int size;
781
782 size = snd_hdmi_get_eld_size(codec, pin_nid);
783 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
784
785 for (i = 0; i < 8; i++) {
786 size = snd_hda_codec_read(codec, pin_nid, 0,
787 AC_VERB_GET_HDMI_DIP_SIZE, i);
788 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
789 }
790#endif
791}
792
793static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
794{
795#ifdef BE_PARANOID
796 int i, j;
797 int size;
798 int pi, bi;
799 for (i = 0; i < 8; i++) {
800 size = snd_hda_codec_read(codec, pin_nid, 0,
801 AC_VERB_GET_HDMI_DIP_SIZE, i);
802 if (size == 0)
803 continue;
804
805 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
806 for (j = 1; j < 1000; j++) {
807 hdmi_write_dip_byte(codec, pin_nid, 0x0);
808 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
809 if (pi != i)
810 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
811 bi, pi, i);
812 if (bi == 0)
813 break;
814 }
815 snd_printd(KERN_INFO
816 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
817 i, size, j);
818 }
819#endif
820}
821
822static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
823{
824 u8 *bytes = (u8 *)hdmi_ai;
825 u8 sum = 0;
826 int i;
827
828 hdmi_ai->checksum = 0;
829
830 for (i = 0; i < sizeof(*hdmi_ai); i++)
831 sum += bytes[i];
832
833 hdmi_ai->checksum = -sum;
834}
835
836static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
837 hda_nid_t pin_nid,
838 u8 *dip, int size)
839{
840 int i;
841
842 hdmi_debug_dip_size(codec, pin_nid);
843 hdmi_clear_dip_buffers(codec, pin_nid);
844
845 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
846 for (i = 0; i < size; i++)
847 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
848}
849
850static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
851 u8 *dip, int size)
852{
853 u8 val;
854 int i;
855
856 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
857 != AC_DIPXMIT_BEST)
858 return false;
859
860 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
861 for (i = 0; i < size; i++) {
862 val = snd_hda_codec_read(codec, pin_nid, 0,
863 AC_VERB_GET_HDMI_DIP_DATA, 0);
864 if (val != dip[i])
865 return false;
866 }
867
868 return true;
869}
870
871static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
872 bool non_pcm,
873 struct snd_pcm_substream *substream)
874{
875 struct hdmi_spec *spec = codec->spec;
876 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
877 hda_nid_t pin_nid = per_pin->pin_nid;
878 int channels = substream->runtime->channels;
879 struct hdmi_eld *eld;
880 int ca;
881 union audio_infoframe ai;
882
883 eld = &per_pin->sink_eld;
884 if (!eld->monitor_present)
885 return;
886
887 if (!non_pcm && per_pin->chmap_set)
888 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
889 else
890 ca = hdmi_channel_allocation(eld, channels);
891 if (ca < 0)
892 ca = 0;
893
894 memset(&ai, 0, sizeof(ai));
895 if (eld->info.conn_type == 0) {
896 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
897
898 hdmi_ai->type = 0x84;
899 hdmi_ai->ver = 0x01;
900 hdmi_ai->len = 0x0a;
901 hdmi_ai->CC02_CT47 = channels - 1;
902 hdmi_ai->CA = ca;
903 hdmi_checksum_audio_infoframe(hdmi_ai);
904 } else if (eld->info.conn_type == 1) {
905 struct dp_audio_infoframe *dp_ai = &ai.dp;
906
907 dp_ai->type = 0x84;
908 dp_ai->len = 0x1b;
909 dp_ai->ver = 0x11 << 2;
910 dp_ai->CC02_CT47 = channels - 1;
911 dp_ai->CA = ca;
912 } else {
913 snd_printd("HDMI: unknown connection type at pin %d\n",
914 pin_nid);
915 return;
916 }
917
918
919
920
921
922
923 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
924 sizeof(ai))) {
925 snd_printdd("hdmi_setup_audio_infoframe: "
926 "pin=%d channels=%d\n",
927 pin_nid,
928 channels);
929 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
930 channels, per_pin->chmap,
931 per_pin->chmap_set);
932 hdmi_stop_infoframe_trans(codec, pin_nid);
933 hdmi_fill_audio_infoframe(codec, pin_nid,
934 ai.bytes, sizeof(ai));
935 hdmi_start_infoframe_trans(codec, pin_nid);
936 } else {
937
938
939 if (per_pin->non_pcm != non_pcm)
940 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
941 channels, per_pin->chmap,
942 per_pin->chmap_set);
943 }
944
945 per_pin->non_pcm = non_pcm;
946}
947
948
949
950
951
952
953static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
954
955static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
956{
957 struct hdmi_spec *spec = codec->spec;
958 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
959 int pin_nid;
960 int pin_idx;
961 struct hda_jack_tbl *jack;
962
963 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
964 if (!jack)
965 return;
966 pin_nid = jack->nid;
967 jack->jack_dirty = 1;
968
969 _snd_printd(SND_PR_VERBOSE,
970 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
971 codec->addr, pin_nid,
972 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
973
974 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
975 if (pin_idx < 0)
976 return;
977
978 hdmi_present_sense(get_pin(spec, pin_idx), 1);
979 snd_hda_jack_report_sync(codec);
980}
981
982static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
983{
984 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
985 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
986 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
987 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
988
989 printk(KERN_INFO
990 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
991 codec->addr,
992 tag,
993 subtag,
994 cp_state,
995 cp_ready);
996
997
998 if (cp_state)
999 ;
1000 if (cp_ready)
1001 ;
1002}
1003
1004
1005static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1006{
1007 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1008 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1009
1010 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1011 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1012 return;
1013 }
1014
1015 if (subtag == 0)
1016 hdmi_intrinsic_event(codec, res);
1017 else
1018 hdmi_non_intrinsic_event(codec, res);
1019}
1020
1021static void haswell_verify_pin_D0(struct hda_codec *codec,
1022 hda_nid_t cvt_nid, hda_nid_t nid)
1023{
1024 int pwr, lamp, ramp;
1025
1026
1027
1028
1029 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1030 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1031
1032 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1033 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1034 AC_PWRST_D0);
1035 msleep(40);
1036 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1037 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1038 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1039 }
1040
1041 lamp = snd_hda_codec_read(codec, nid, 0,
1042 AC_VERB_GET_AMP_GAIN_MUTE,
1043 AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1044 ramp = snd_hda_codec_read(codec, nid, 0,
1045 AC_VERB_GET_AMP_GAIN_MUTE,
1046 AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1047 if (lamp != ramp) {
1048 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1049 AC_AMP_SET_RIGHT | AC_AMP_SET_OUTPUT | lamp);
1050
1051 lamp = snd_hda_codec_read(codec, nid, 0,
1052 AC_VERB_GET_AMP_GAIN_MUTE,
1053 AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1054 ramp = snd_hda_codec_read(codec, nid, 0,
1055 AC_VERB_GET_AMP_GAIN_MUTE,
1056 AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1057 snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid, lamp, ramp);
1058 }
1059}
1060
1061
1062
1063
1064
1065
1066#define is_hbr_format(format) \
1067 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1068
1069static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1070 hda_nid_t pin_nid, u32 stream_tag, int format)
1071{
1072 int pinctl;
1073 int new_pinctl = 0;
1074
1075 if (codec->vendor_id == 0x80862807)
1076 haswell_verify_pin_D0(codec, cvt_nid, pin_nid);
1077
1078 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1079 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1080 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1081
1082 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1083 if (is_hbr_format(format))
1084 new_pinctl |= AC_PINCTL_EPT_HBR;
1085 else
1086 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1087
1088 snd_printdd("hdmi_setup_stream: "
1089 "NID=0x%x, %spinctl=0x%x\n",
1090 pin_nid,
1091 pinctl == new_pinctl ? "" : "new-",
1092 new_pinctl);
1093
1094 if (pinctl != new_pinctl)
1095 snd_hda_codec_write(codec, pin_nid, 0,
1096 AC_VERB_SET_PIN_WIDGET_CONTROL,
1097 new_pinctl);
1098
1099 }
1100 if (is_hbr_format(format) && !new_pinctl) {
1101 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1102 return -EINVAL;
1103 }
1104
1105 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1106 return 0;
1107}
1108
1109static int hdmi_choose_cvt(struct hda_codec *codec,
1110 int pin_idx, int *cvt_id, int *mux_id)
1111{
1112 struct hdmi_spec *spec = codec->spec;
1113 struct hdmi_spec_per_pin *per_pin;
1114 struct hdmi_spec_per_cvt *per_cvt = NULL;
1115 int cvt_idx, mux_idx = 0;
1116
1117 per_pin = get_pin(spec, pin_idx);
1118
1119
1120 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1121 per_cvt = get_cvt(spec, cvt_idx);
1122
1123
1124 if (per_cvt->assigned)
1125 continue;
1126
1127 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1128 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1129 break;
1130
1131 if (mux_idx == per_pin->num_mux_nids)
1132 continue;
1133 break;
1134 }
1135
1136
1137 if (cvt_idx == spec->num_cvts)
1138 return -ENODEV;
1139
1140 if (cvt_id)
1141 *cvt_id = cvt_idx;
1142 if (mux_id)
1143 *mux_id = mux_idx;
1144
1145 return 0;
1146}
1147
1148static void haswell_config_cvts(struct hda_codec *codec,
1149 int pin_id, int mux_id)
1150{
1151 struct hdmi_spec *spec = codec->spec;
1152 struct hdmi_spec_per_pin *per_pin;
1153 int pin_idx, mux_idx;
1154 int curr;
1155 int err;
1156
1157 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1158 per_pin = get_pin(spec, pin_idx);
1159
1160 if (pin_idx == pin_id)
1161 continue;
1162
1163 curr = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1164 AC_VERB_GET_CONNECT_SEL, 0);
1165
1166
1167 if (curr == mux_id) {
1168 err = hdmi_choose_cvt(codec, pin_idx, NULL, &mux_idx);
1169 if (err < 0)
1170 return;
1171 snd_printdd("HDMI: choose converter %d for pin %d\n", mux_idx, pin_idx);
1172 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1173 AC_VERB_SET_CONNECT_SEL,
1174 mux_idx);
1175 }
1176 }
1177}
1178
1179
1180
1181
1182static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1183 struct hda_codec *codec,
1184 struct snd_pcm_substream *substream)
1185{
1186 struct hdmi_spec *spec = codec->spec;
1187 struct snd_pcm_runtime *runtime = substream->runtime;
1188 int pin_idx, cvt_idx, mux_idx = 0;
1189 struct hdmi_spec_per_pin *per_pin;
1190 struct hdmi_eld *eld;
1191 struct hdmi_spec_per_cvt *per_cvt = NULL;
1192 int err;
1193
1194
1195 pin_idx = hinfo_to_pin_index(spec, hinfo);
1196 if (snd_BUG_ON(pin_idx < 0))
1197 return -EINVAL;
1198 per_pin = get_pin(spec, pin_idx);
1199 eld = &per_pin->sink_eld;
1200
1201 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1202 if (err < 0)
1203 return err;
1204
1205 per_cvt = get_cvt(spec, cvt_idx);
1206
1207 per_cvt->assigned = 1;
1208 hinfo->nid = per_cvt->cvt_nid;
1209
1210 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1211 AC_VERB_SET_CONNECT_SEL,
1212 mux_idx);
1213
1214
1215 if (codec->vendor_id == 0x80862807)
1216 haswell_config_cvts(codec, pin_idx, mux_idx);
1217
1218 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1219
1220
1221 hinfo->channels_min = per_cvt->channels_min;
1222 hinfo->channels_max = per_cvt->channels_max;
1223 hinfo->rates = per_cvt->rates;
1224 hinfo->formats = per_cvt->formats;
1225 hinfo->maxbps = per_cvt->maxbps;
1226
1227
1228 if (!static_hdmi_pcm && eld->eld_valid) {
1229 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1230 if (hinfo->channels_min > hinfo->channels_max ||
1231 !hinfo->rates || !hinfo->formats) {
1232 per_cvt->assigned = 0;
1233 hinfo->nid = 0;
1234 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1235 return -ENODEV;
1236 }
1237 }
1238
1239
1240 runtime->hw.channels_min = hinfo->channels_min;
1241 runtime->hw.channels_max = hinfo->channels_max;
1242 runtime->hw.formats = hinfo->formats;
1243 runtime->hw.rates = hinfo->rates;
1244
1245 snd_pcm_hw_constraint_step(substream->runtime, 0,
1246 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1247 return 0;
1248}
1249
1250
1251
1252
1253static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1254{
1255 struct hdmi_spec *spec = codec->spec;
1256 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1257 hda_nid_t pin_nid = per_pin->pin_nid;
1258
1259 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1260 snd_printk(KERN_WARNING
1261 "HDMI: pin %d wcaps %#x "
1262 "does not support connection list\n",
1263 pin_nid, get_wcaps(codec, pin_nid));
1264 return -EINVAL;
1265 }
1266
1267 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1268 per_pin->mux_nids,
1269 HDA_MAX_CONNECTIONS);
1270
1271 return 0;
1272}
1273
1274static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1275{
1276 struct hda_codec *codec = per_pin->codec;
1277 struct hdmi_spec *spec = codec->spec;
1278 struct hdmi_eld *eld = &spec->temp_eld;
1279 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1280 hda_nid_t pin_nid = per_pin->pin_nid;
1281
1282
1283
1284
1285
1286
1287
1288
1289 int present = snd_hda_pin_sense(codec, pin_nid);
1290 bool update_eld = false;
1291 bool eld_changed = false;
1292
1293 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1294 if (pin_eld->monitor_present)
1295 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1296 else
1297 eld->eld_valid = false;
1298
1299 _snd_printd(SND_PR_VERBOSE,
1300 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1301 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1302
1303 if (eld->eld_valid) {
1304 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1305 &eld->eld_size) < 0)
1306 eld->eld_valid = false;
1307 else {
1308 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1309 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1310 eld->eld_size) < 0)
1311 eld->eld_valid = false;
1312 }
1313
1314 if (eld->eld_valid) {
1315 snd_hdmi_show_eld(&eld->info);
1316 update_eld = true;
1317 }
1318 else if (repoll) {
1319 queue_delayed_work(codec->bus->workq,
1320 &per_pin->work,
1321 msecs_to_jiffies(300));
1322 return;
1323 }
1324 }
1325
1326 mutex_lock(&pin_eld->lock);
1327 if (pin_eld->eld_valid && !eld->eld_valid) {
1328 update_eld = true;
1329 eld_changed = true;
1330 }
1331 if (update_eld) {
1332 pin_eld->eld_valid = eld->eld_valid;
1333 eld_changed = pin_eld->eld_size != eld->eld_size ||
1334 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1335 eld->eld_size) != 0;
1336 if (eld_changed)
1337 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1338 eld->eld_size);
1339 pin_eld->eld_size = eld->eld_size;
1340 pin_eld->info = eld->info;
1341 }
1342 mutex_unlock(&pin_eld->lock);
1343
1344 if (eld_changed)
1345 snd_ctl_notify(codec->bus->card,
1346 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1347 &per_pin->eld_ctl->id);
1348}
1349
1350static void hdmi_repoll_eld(struct work_struct *work)
1351{
1352 struct hdmi_spec_per_pin *per_pin =
1353 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1354
1355 if (per_pin->repoll_count++ > 6)
1356 per_pin->repoll_count = 0;
1357
1358 hdmi_present_sense(per_pin, per_pin->repoll_count);
1359}
1360
1361static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1362 hda_nid_t nid);
1363
1364static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1365{
1366 struct hdmi_spec *spec = codec->spec;
1367 unsigned int caps, config;
1368 int pin_idx;
1369 struct hdmi_spec_per_pin *per_pin;
1370 int err;
1371
1372 caps = snd_hda_query_pin_caps(codec, pin_nid);
1373 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1374 return 0;
1375
1376 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1377 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1378 return 0;
1379
1380 if (codec->vendor_id == 0x80862807)
1381 intel_haswell_fixup_connect_list(codec, pin_nid);
1382
1383 pin_idx = spec->num_pins;
1384 per_pin = snd_array_new(&spec->pins);
1385 if (!per_pin)
1386 return -ENOMEM;
1387
1388 per_pin->pin_nid = pin_nid;
1389 per_pin->non_pcm = false;
1390
1391 err = hdmi_read_pin_conn(codec, pin_idx);
1392 if (err < 0)
1393 return err;
1394
1395 spec->num_pins++;
1396
1397 return 0;
1398}
1399
1400static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1401{
1402 struct hdmi_spec *spec = codec->spec;
1403 struct hdmi_spec_per_cvt *per_cvt;
1404 unsigned int chans;
1405 int err;
1406
1407 chans = get_wcaps(codec, cvt_nid);
1408 chans = get_wcaps_channels(chans);
1409
1410 per_cvt = snd_array_new(&spec->cvts);
1411 if (!per_cvt)
1412 return -ENOMEM;
1413
1414 per_cvt->cvt_nid = cvt_nid;
1415 per_cvt->channels_min = 2;
1416 if (chans <= 16) {
1417 per_cvt->channels_max = chans;
1418 if (chans > spec->channels_max)
1419 spec->channels_max = chans;
1420 }
1421
1422 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1423 &per_cvt->rates,
1424 &per_cvt->formats,
1425 &per_cvt->maxbps);
1426 if (err < 0)
1427 return err;
1428
1429 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1430 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1431 spec->num_cvts++;
1432
1433 return 0;
1434}
1435
1436static int hdmi_parse_codec(struct hda_codec *codec)
1437{
1438 hda_nid_t nid;
1439 int i, nodes;
1440
1441 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1442 if (!nid || nodes < 0) {
1443 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1444 return -EINVAL;
1445 }
1446
1447 for (i = 0; i < nodes; i++, nid++) {
1448 unsigned int caps;
1449 unsigned int type;
1450
1451 caps = get_wcaps(codec, nid);
1452 type = get_wcaps_type(caps);
1453
1454 if (!(caps & AC_WCAP_DIGITAL))
1455 continue;
1456
1457 switch (type) {
1458 case AC_WID_AUD_OUT:
1459 hdmi_add_cvt(codec, nid);
1460 break;
1461 case AC_WID_PIN:
1462 hdmi_add_pin(codec, nid);
1463 break;
1464 }
1465 }
1466
1467#ifdef CONFIG_PM
1468
1469
1470 if (codec->vendor_id == 0x80862806)
1471 codec->bus->power_keep_link_on = 1;
1472
1473
1474
1475
1476
1477 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1478 AC_PWRST_EPSS))
1479 codec->bus->power_keep_link_on = 1;
1480#endif
1481
1482 return 0;
1483}
1484
1485
1486
1487static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1488{
1489 struct hda_spdif_out *spdif;
1490 bool non_pcm;
1491
1492 mutex_lock(&codec->spdif_mutex);
1493 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1494 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1495 mutex_unlock(&codec->spdif_mutex);
1496 return non_pcm;
1497}
1498
1499
1500
1501
1502
1503
1504static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1505 struct hda_codec *codec,
1506 unsigned int stream_tag,
1507 unsigned int format,
1508 struct snd_pcm_substream *substream)
1509{
1510 hda_nid_t cvt_nid = hinfo->nid;
1511 struct hdmi_spec *spec = codec->spec;
1512 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1513 hda_nid_t pin_nid = get_pin(spec, pin_idx)->pin_nid;
1514 bool non_pcm;
1515
1516 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1517
1518 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1519
1520 hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
1521
1522 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1523}
1524
1525static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1526 struct hda_codec *codec,
1527 struct snd_pcm_substream *substream)
1528{
1529 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1530 return 0;
1531}
1532
1533static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1534 struct hda_codec *codec,
1535 struct snd_pcm_substream *substream)
1536{
1537 struct hdmi_spec *spec = codec->spec;
1538 int cvt_idx, pin_idx;
1539 struct hdmi_spec_per_cvt *per_cvt;
1540 struct hdmi_spec_per_pin *per_pin;
1541
1542 if (hinfo->nid) {
1543 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1544 if (snd_BUG_ON(cvt_idx < 0))
1545 return -EINVAL;
1546 per_cvt = get_cvt(spec, cvt_idx);
1547
1548 snd_BUG_ON(!per_cvt->assigned);
1549 per_cvt->assigned = 0;
1550 hinfo->nid = 0;
1551
1552 pin_idx = hinfo_to_pin_index(spec, hinfo);
1553 if (snd_BUG_ON(pin_idx < 0))
1554 return -EINVAL;
1555 per_pin = get_pin(spec, pin_idx);
1556
1557 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1558 per_pin->chmap_set = false;
1559 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1560 }
1561
1562 return 0;
1563}
1564
1565static const struct hda_pcm_ops generic_ops = {
1566 .open = hdmi_pcm_open,
1567 .close = hdmi_pcm_close,
1568 .prepare = generic_hdmi_playback_pcm_prepare,
1569 .cleanup = generic_hdmi_playback_pcm_cleanup,
1570};
1571
1572
1573
1574
1575static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1576 struct snd_ctl_elem_info *uinfo)
1577{
1578 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1579 struct hda_codec *codec = info->private_data;
1580 struct hdmi_spec *spec = codec->spec;
1581 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1582 uinfo->count = spec->channels_max;
1583 uinfo->value.integer.min = 0;
1584 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1585 return 0;
1586}
1587
1588static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1589 unsigned int size, unsigned int __user *tlv)
1590{
1591 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1592 struct hda_codec *codec = info->private_data;
1593 struct hdmi_spec *spec = codec->spec;
1594 const unsigned int valid_mask =
1595 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1596 unsigned int __user *dst;
1597 int chs, count = 0;
1598
1599 if (size < 8)
1600 return -ENOMEM;
1601 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1602 return -EFAULT;
1603 size -= 8;
1604 dst = tlv + 2;
1605 for (chs = 2; chs <= spec->channels_max; chs++) {
1606 int i, c;
1607 struct cea_channel_speaker_allocation *cap;
1608 cap = channel_allocations;
1609 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1610 int chs_bytes = chs * 4;
1611 if (cap->channels != chs)
1612 continue;
1613 if (cap->spk_mask & ~valid_mask)
1614 continue;
1615 if (size < 8)
1616 return -ENOMEM;
1617 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1618 put_user(chs_bytes, dst + 1))
1619 return -EFAULT;
1620 dst += 2;
1621 size -= 8;
1622 count += 8;
1623 if (size < chs_bytes)
1624 return -ENOMEM;
1625 size -= chs_bytes;
1626 count += chs_bytes;
1627 for (c = 7; c >= 0; c--) {
1628 int spk = cap->speakers[c];
1629 if (!spk)
1630 continue;
1631 if (put_user(spk_to_chmap(spk), dst))
1632 return -EFAULT;
1633 dst++;
1634 }
1635 }
1636 }
1637 if (put_user(count, tlv + 1))
1638 return -EFAULT;
1639 return 0;
1640}
1641
1642static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1643 struct snd_ctl_elem_value *ucontrol)
1644{
1645 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1646 struct hda_codec *codec = info->private_data;
1647 struct hdmi_spec *spec = codec->spec;
1648 int pin_idx = kcontrol->private_value;
1649 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1650 int i;
1651
1652 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1653 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1654 return 0;
1655}
1656
1657static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1658 struct snd_ctl_elem_value *ucontrol)
1659{
1660 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1661 struct hda_codec *codec = info->private_data;
1662 struct hdmi_spec *spec = codec->spec;
1663 int pin_idx = kcontrol->private_value;
1664 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1665 unsigned int ctl_idx;
1666 struct snd_pcm_substream *substream;
1667 unsigned char chmap[8];
1668 int i, ca, prepared = 0;
1669
1670 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1671 substream = snd_pcm_chmap_substream(info, ctl_idx);
1672 if (!substream || !substream->runtime)
1673 return 0;
1674 switch (substream->runtime->status->state) {
1675 case SNDRV_PCM_STATE_OPEN:
1676 case SNDRV_PCM_STATE_SETUP:
1677 break;
1678 case SNDRV_PCM_STATE_PREPARED:
1679 prepared = 1;
1680 break;
1681 default:
1682 return -EBUSY;
1683 }
1684 memset(chmap, 0, sizeof(chmap));
1685 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1686 chmap[i] = ucontrol->value.integer.value[i];
1687 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1688 return 0;
1689 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1690 if (ca < 0)
1691 return -EINVAL;
1692 per_pin->chmap_set = true;
1693 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1694 if (prepared)
1695 hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
1696 substream);
1697
1698 return 0;
1699}
1700
1701static int generic_hdmi_build_pcms(struct hda_codec *codec)
1702{
1703 struct hdmi_spec *spec = codec->spec;
1704 int pin_idx;
1705
1706 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1707 struct hda_pcm *info;
1708 struct hda_pcm_stream *pstr;
1709 struct hdmi_spec_per_pin *per_pin;
1710
1711 per_pin = get_pin(spec, pin_idx);
1712 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1713 info = snd_array_new(&spec->pcm_rec);
1714 if (!info)
1715 return -ENOMEM;
1716 info->name = per_pin->pcm_name;
1717 info->pcm_type = HDA_PCM_TYPE_HDMI;
1718 info->own_chmap = true;
1719
1720 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1721 pstr->substreams = 1;
1722 pstr->ops = generic_ops;
1723
1724 }
1725
1726 codec->num_pcms = spec->num_pins;
1727 codec->pcm_info = spec->pcm_rec.list;
1728
1729 return 0;
1730}
1731
1732static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1733{
1734 char hdmi_str[32] = "HDMI/DP";
1735 struct hdmi_spec *spec = codec->spec;
1736 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1737 int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1738
1739 if (pcmdev > 0)
1740 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1741 if (!is_jack_detectable(codec, per_pin->pin_nid))
1742 strncat(hdmi_str, " Phantom",
1743 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1744
1745 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1746}
1747
1748static int generic_hdmi_build_controls(struct hda_codec *codec)
1749{
1750 struct hdmi_spec *spec = codec->spec;
1751 int err;
1752 int pin_idx;
1753
1754 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1755 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1756
1757 err = generic_hdmi_build_jack(codec, pin_idx);
1758 if (err < 0)
1759 return err;
1760
1761 err = snd_hda_create_dig_out_ctls(codec,
1762 per_pin->pin_nid,
1763 per_pin->mux_nids[0],
1764 HDA_PCM_TYPE_HDMI);
1765 if (err < 0)
1766 return err;
1767 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1768
1769
1770 err = hdmi_create_eld_ctl(codec, pin_idx,
1771 get_pcm_rec(spec, pin_idx)->device);
1772
1773 if (err < 0)
1774 return err;
1775
1776 hdmi_present_sense(per_pin, 0);
1777 }
1778
1779
1780 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1781 struct snd_pcm_chmap *chmap;
1782 struct snd_kcontrol *kctl;
1783 int i;
1784
1785 if (!codec->pcm_info[pin_idx].pcm)
1786 break;
1787 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1788 SNDRV_PCM_STREAM_PLAYBACK,
1789 NULL, 0, pin_idx, &chmap);
1790 if (err < 0)
1791 return err;
1792
1793 chmap->private_data = codec;
1794 kctl = chmap->kctl;
1795 for (i = 0; i < kctl->count; i++)
1796 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1797 kctl->info = hdmi_chmap_ctl_info;
1798 kctl->get = hdmi_chmap_ctl_get;
1799 kctl->put = hdmi_chmap_ctl_put;
1800 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1801 }
1802
1803 return 0;
1804}
1805
1806static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1807{
1808 struct hdmi_spec *spec = codec->spec;
1809 int pin_idx;
1810
1811 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1812 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1813 struct hdmi_eld *eld = &per_pin->sink_eld;
1814
1815 per_pin->codec = codec;
1816 mutex_init(&eld->lock);
1817 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1818 snd_hda_eld_proc_new(codec, eld, pin_idx);
1819 }
1820 return 0;
1821}
1822
1823static int generic_hdmi_init(struct hda_codec *codec)
1824{
1825 struct hdmi_spec *spec = codec->spec;
1826 int pin_idx;
1827
1828 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1829 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1830 hda_nid_t pin_nid = per_pin->pin_nid;
1831
1832 hdmi_init_pin(codec, pin_nid);
1833 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1834 }
1835 return 0;
1836}
1837
1838static void hdmi_array_init(struct hdmi_spec *spec, int nums)
1839{
1840 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
1841 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
1842 snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
1843}
1844
1845static void hdmi_array_free(struct hdmi_spec *spec)
1846{
1847 snd_array_free(&spec->pins);
1848 snd_array_free(&spec->cvts);
1849 snd_array_free(&spec->pcm_rec);
1850}
1851
1852static void generic_hdmi_free(struct hda_codec *codec)
1853{
1854 struct hdmi_spec *spec = codec->spec;
1855 int pin_idx;
1856
1857 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1858 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1859 struct hdmi_eld *eld = &per_pin->sink_eld;
1860
1861 cancel_delayed_work(&per_pin->work);
1862 snd_hda_eld_proc_free(codec, eld);
1863 }
1864
1865 flush_workqueue(codec->bus->workq);
1866 hdmi_array_free(spec);
1867 kfree(spec);
1868}
1869
1870#ifdef CONFIG_PM
1871static int generic_hdmi_resume(struct hda_codec *codec)
1872{
1873 struct hdmi_spec *spec = codec->spec;
1874 int pin_idx;
1875
1876 generic_hdmi_init(codec);
1877 snd_hda_codec_resume_amp(codec);
1878 snd_hda_codec_resume_cache(codec);
1879
1880 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1881 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1882 hdmi_present_sense(per_pin, 1);
1883 }
1884 return 0;
1885}
1886#endif
1887
1888static const struct hda_codec_ops generic_hdmi_patch_ops = {
1889 .init = generic_hdmi_init,
1890 .free = generic_hdmi_free,
1891 .build_pcms = generic_hdmi_build_pcms,
1892 .build_controls = generic_hdmi_build_controls,
1893 .unsol_event = hdmi_unsol_event,
1894#ifdef CONFIG_PM
1895 .resume = generic_hdmi_resume,
1896#endif
1897};
1898
1899
1900static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1901 hda_nid_t nid)
1902{
1903 struct hdmi_spec *spec = codec->spec;
1904 hda_nid_t conns[4];
1905 int nconns;
1906
1907 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
1908 if (nconns == spec->num_cvts &&
1909 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
1910 return;
1911
1912
1913 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
1914 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
1915}
1916
1917#define INTEL_VENDOR_NID 0x08
1918#define INTEL_GET_VENDOR_VERB 0xf81
1919#define INTEL_SET_VENDOR_VERB 0x781
1920#define INTEL_EN_DP12 0x02
1921#define INTEL_EN_ALL_PIN_CVTS 0x01
1922
1923static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1924 bool update_tree)
1925{
1926 unsigned int vendor_param;
1927
1928 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1929 INTEL_GET_VENDOR_VERB, 0);
1930 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1931 return;
1932
1933 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1934 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1935 INTEL_SET_VENDOR_VERB, vendor_param);
1936 if (vendor_param == -1)
1937 return;
1938
1939 if (update_tree)
1940 snd_hda_codec_update_widgets(codec);
1941}
1942
1943static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
1944{
1945 unsigned int vendor_param;
1946
1947 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1948 INTEL_GET_VENDOR_VERB, 0);
1949 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
1950 return;
1951
1952
1953 vendor_param |= INTEL_EN_DP12;
1954 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
1955 INTEL_SET_VENDOR_VERB, vendor_param);
1956}
1957
1958
1959
1960
1961static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
1962 unsigned int power_state)
1963{
1964 if (power_state == AC_PWRST_D0) {
1965 intel_haswell_enable_all_pins(codec, false);
1966 intel_haswell_fixup_enable_dp12(codec);
1967 }
1968
1969 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
1970 snd_hda_codec_set_power_to_all(codec, fg, power_state);
1971}
1972
1973static int patch_generic_hdmi(struct hda_codec *codec)
1974{
1975 struct hdmi_spec *spec;
1976
1977 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1978 if (spec == NULL)
1979 return -ENOMEM;
1980
1981 codec->spec = spec;
1982 hdmi_array_init(spec, 4);
1983
1984 if (codec->vendor_id == 0x80862807) {
1985 intel_haswell_enable_all_pins(codec, true);
1986 intel_haswell_fixup_enable_dp12(codec);
1987 }
1988
1989 if (hdmi_parse_codec(codec) < 0) {
1990 codec->spec = NULL;
1991 kfree(spec);
1992 return -EINVAL;
1993 }
1994 codec->patch_ops = generic_hdmi_patch_ops;
1995 if (codec->vendor_id == 0x80862807)
1996 codec->patch_ops.set_power_state = haswell_set_power_state;
1997
1998 generic_hdmi_init_per_pins(codec);
1999
2000 init_channel_allocations();
2001
2002 return 0;
2003}
2004
2005
2006
2007
2008
2009static int simple_playback_build_pcms(struct hda_codec *codec)
2010{
2011 struct hdmi_spec *spec = codec->spec;
2012 struct hda_pcm *info;
2013 unsigned int chans;
2014 struct hda_pcm_stream *pstr;
2015 struct hdmi_spec_per_cvt *per_cvt;
2016
2017 per_cvt = get_cvt(spec, 0);
2018 chans = get_wcaps(codec, per_cvt->cvt_nid);
2019 chans = get_wcaps_channels(chans);
2020
2021 info = snd_array_new(&spec->pcm_rec);
2022 if (!info)
2023 return -ENOMEM;
2024 info->name = get_pin(spec, 0)->pcm_name;
2025 sprintf(info->name, "HDMI 0");
2026 info->pcm_type = HDA_PCM_TYPE_HDMI;
2027 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2028 *pstr = spec->pcm_playback;
2029 pstr->nid = per_cvt->cvt_nid;
2030 if (pstr->channels_max <= 2 && chans && chans <= 16)
2031 pstr->channels_max = chans;
2032
2033 codec->num_pcms = 1;
2034 codec->pcm_info = info;
2035
2036 return 0;
2037}
2038
2039
2040static void simple_hdmi_unsol_event(struct hda_codec *codec,
2041 unsigned int res)
2042{
2043 snd_hda_jack_set_dirty_all(codec);
2044 snd_hda_jack_report_sync(codec);
2045}
2046
2047
2048
2049
2050#define simple_hdmi_build_jack generic_hdmi_build_jack
2051
2052static int simple_playback_build_controls(struct hda_codec *codec)
2053{
2054 struct hdmi_spec *spec = codec->spec;
2055 struct hdmi_spec_per_cvt *per_cvt;
2056 int err;
2057
2058 per_cvt = get_cvt(spec, 0);
2059 err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
2060 per_cvt->cvt_nid);
2061 if (err < 0)
2062 return err;
2063 return simple_hdmi_build_jack(codec, 0);
2064}
2065
2066static int simple_playback_init(struct hda_codec *codec)
2067{
2068 struct hdmi_spec *spec = codec->spec;
2069 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2070 hda_nid_t pin = per_pin->pin_nid;
2071
2072 snd_hda_codec_write(codec, pin, 0,
2073 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2074
2075 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2076 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2077 AMP_OUT_UNMUTE);
2078 snd_hda_jack_detect_enable(codec, pin, pin);
2079 return 0;
2080}
2081
2082static void simple_playback_free(struct hda_codec *codec)
2083{
2084 struct hdmi_spec *spec = codec->spec;
2085
2086 hdmi_array_free(spec);
2087 kfree(spec);
2088}
2089
2090
2091
2092
2093
2094#define Nv_VERB_SET_Channel_Allocation 0xF79
2095#define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2096#define Nv_VERB_SET_Audio_Protection_On 0xF98
2097#define Nv_VERB_SET_Audio_Protection_Off 0xF99
2098
2099#define nvhdmi_master_con_nid_7x 0x04
2100#define nvhdmi_master_pin_nid_7x 0x05
2101
2102static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2103
2104 0x6, 0x8, 0xa, 0xc,
2105};
2106
2107static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2108
2109 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2110
2111 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2112 {}
2113};
2114
2115static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2116
2117 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2118
2119 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2120 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2121 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2122 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2123 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2124 {}
2125};
2126
2127#ifdef LIMITED_RATE_FMT_SUPPORT
2128
2129#define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2130#define SUPPORTED_MAXBPS 16
2131#define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2132#else
2133
2134#define SUPPORTED_RATES \
2135 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2136 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2137 SNDRV_PCM_RATE_192000)
2138#define SUPPORTED_MAXBPS 24
2139#define SUPPORTED_FORMATS \
2140 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2141#endif
2142
2143static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2144{
2145 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2146 return 0;
2147}
2148
2149static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2150{
2151 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2152 return 0;
2153}
2154
2155static unsigned int channels_2_6_8[] = {
2156 2, 6, 8
2157};
2158
2159static unsigned int channels_2_8[] = {
2160 2, 8
2161};
2162
2163static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2164 .count = ARRAY_SIZE(channels_2_6_8),
2165 .list = channels_2_6_8,
2166 .mask = 0,
2167};
2168
2169static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2170 .count = ARRAY_SIZE(channels_2_8),
2171 .list = channels_2_8,
2172 .mask = 0,
2173};
2174
2175static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2176 struct hda_codec *codec,
2177 struct snd_pcm_substream *substream)
2178{
2179 struct hdmi_spec *spec = codec->spec;
2180 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2181
2182 switch (codec->preset->id) {
2183 case 0x10de0002:
2184 case 0x10de0003:
2185 case 0x10de0005:
2186 case 0x10de0006:
2187 hw_constraints_channels = &hw_constraints_2_8_channels;
2188 break;
2189 case 0x10de0007:
2190 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2191 break;
2192 default:
2193 break;
2194 }
2195
2196 if (hw_constraints_channels != NULL) {
2197 snd_pcm_hw_constraint_list(substream->runtime, 0,
2198 SNDRV_PCM_HW_PARAM_CHANNELS,
2199 hw_constraints_channels);
2200 } else {
2201 snd_pcm_hw_constraint_step(substream->runtime, 0,
2202 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2203 }
2204
2205 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2206}
2207
2208static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2209 struct hda_codec *codec,
2210 struct snd_pcm_substream *substream)
2211{
2212 struct hdmi_spec *spec = codec->spec;
2213 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2214}
2215
2216static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2217 struct hda_codec *codec,
2218 unsigned int stream_tag,
2219 unsigned int format,
2220 struct snd_pcm_substream *substream)
2221{
2222 struct hdmi_spec *spec = codec->spec;
2223 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2224 stream_tag, format, substream);
2225}
2226
2227static const struct hda_pcm_stream simple_pcm_playback = {
2228 .substreams = 1,
2229 .channels_min = 2,
2230 .channels_max = 2,
2231 .ops = {
2232 .open = simple_playback_pcm_open,
2233 .close = simple_playback_pcm_close,
2234 .prepare = simple_playback_pcm_prepare
2235 },
2236};
2237
2238static const struct hda_codec_ops simple_hdmi_patch_ops = {
2239 .build_controls = simple_playback_build_controls,
2240 .build_pcms = simple_playback_build_pcms,
2241 .init = simple_playback_init,
2242 .free = simple_playback_free,
2243 .unsol_event = simple_hdmi_unsol_event,
2244};
2245
2246static int patch_simple_hdmi(struct hda_codec *codec,
2247 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2248{
2249 struct hdmi_spec *spec;
2250 struct hdmi_spec_per_cvt *per_cvt;
2251 struct hdmi_spec_per_pin *per_pin;
2252
2253 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2254 if (!spec)
2255 return -ENOMEM;
2256
2257 codec->spec = spec;
2258 hdmi_array_init(spec, 1);
2259
2260 spec->multiout.num_dacs = 0;
2261 spec->multiout.max_channels = 2;
2262 spec->multiout.dig_out_nid = cvt_nid;
2263 spec->num_cvts = 1;
2264 spec->num_pins = 1;
2265 per_pin = snd_array_new(&spec->pins);
2266 per_cvt = snd_array_new(&spec->cvts);
2267 if (!per_pin || !per_cvt) {
2268 simple_playback_free(codec);
2269 return -ENOMEM;
2270 }
2271 per_cvt->cvt_nid = cvt_nid;
2272 per_pin->pin_nid = pin_nid;
2273 spec->pcm_playback = simple_pcm_playback;
2274
2275 codec->patch_ops = simple_hdmi_patch_ops;
2276
2277 return 0;
2278}
2279
2280static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2281 int channels)
2282{
2283 unsigned int chanmask;
2284 int chan = channels ? (channels - 1) : 1;
2285
2286 switch (channels) {
2287 default:
2288 case 0:
2289 case 2:
2290 chanmask = 0x00;
2291 break;
2292 case 4:
2293 chanmask = 0x08;
2294 break;
2295 case 6:
2296 chanmask = 0x0b;
2297 break;
2298 case 8:
2299 chanmask = 0x13;
2300 break;
2301 }
2302
2303
2304
2305 snd_hda_codec_write(codec, 0x1, 0,
2306 Nv_VERB_SET_Channel_Allocation, chanmask);
2307
2308 snd_hda_codec_write(codec, 0x1, 0,
2309 Nv_VERB_SET_Info_Frame_Checksum,
2310 (0x71 - chan - chanmask));
2311}
2312
2313static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2314 struct hda_codec *codec,
2315 struct snd_pcm_substream *substream)
2316{
2317 struct hdmi_spec *spec = codec->spec;
2318 int i;
2319
2320 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2321 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2322 for (i = 0; i < 4; i++) {
2323
2324 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2325 AC_VERB_SET_CHANNEL_STREAMID, 0);
2326
2327 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2328 AC_VERB_SET_STREAM_FORMAT, 0);
2329 }
2330
2331
2332
2333 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2334
2335 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2336}
2337
2338static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2339 struct hda_codec *codec,
2340 unsigned int stream_tag,
2341 unsigned int format,
2342 struct snd_pcm_substream *substream)
2343{
2344 int chs;
2345 unsigned int dataDCC2, channel_id;
2346 int i;
2347 struct hdmi_spec *spec = codec->spec;
2348 struct hda_spdif_out *spdif;
2349 struct hdmi_spec_per_cvt *per_cvt;
2350
2351 mutex_lock(&codec->spdif_mutex);
2352 per_cvt = get_cvt(spec, 0);
2353 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2354
2355 chs = substream->runtime->channels;
2356
2357 dataDCC2 = 0x2;
2358
2359
2360 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2361 snd_hda_codec_write(codec,
2362 nvhdmi_master_con_nid_7x,
2363 0,
2364 AC_VERB_SET_DIGI_CONVERT_1,
2365 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2366
2367
2368 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2369 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2370
2371
2372 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2373 AC_VERB_SET_STREAM_FORMAT, format);
2374
2375
2376
2377 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2378 snd_hda_codec_write(codec,
2379 nvhdmi_master_con_nid_7x,
2380 0,
2381 AC_VERB_SET_DIGI_CONVERT_1,
2382 spdif->ctls & 0xff);
2383 snd_hda_codec_write(codec,
2384 nvhdmi_master_con_nid_7x,
2385 0,
2386 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2387 }
2388
2389 for (i = 0; i < 4; i++) {
2390 if (chs == 2)
2391 channel_id = 0;
2392 else
2393 channel_id = i * 2;
2394
2395
2396
2397
2398 if (codec->spdif_status_reset &&
2399 (spdif->ctls & AC_DIG1_ENABLE))
2400 snd_hda_codec_write(codec,
2401 nvhdmi_con_nids_7x[i],
2402 0,
2403 AC_VERB_SET_DIGI_CONVERT_1,
2404 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2405
2406 snd_hda_codec_write(codec,
2407 nvhdmi_con_nids_7x[i],
2408 0,
2409 AC_VERB_SET_CHANNEL_STREAMID,
2410 (stream_tag << 4) | channel_id);
2411
2412 snd_hda_codec_write(codec,
2413 nvhdmi_con_nids_7x[i],
2414 0,
2415 AC_VERB_SET_STREAM_FORMAT,
2416 format);
2417
2418
2419 if (codec->spdif_status_reset &&
2420 (spdif->ctls & AC_DIG1_ENABLE)) {
2421 snd_hda_codec_write(codec,
2422 nvhdmi_con_nids_7x[i],
2423 0,
2424 AC_VERB_SET_DIGI_CONVERT_1,
2425 spdif->ctls & 0xff);
2426 snd_hda_codec_write(codec,
2427 nvhdmi_con_nids_7x[i],
2428 0,
2429 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2430 }
2431 }
2432
2433 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2434
2435 mutex_unlock(&codec->spdif_mutex);
2436 return 0;
2437}
2438
2439static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2440 .substreams = 1,
2441 .channels_min = 2,
2442 .channels_max = 8,
2443 .nid = nvhdmi_master_con_nid_7x,
2444 .rates = SUPPORTED_RATES,
2445 .maxbps = SUPPORTED_MAXBPS,
2446 .formats = SUPPORTED_FORMATS,
2447 .ops = {
2448 .open = simple_playback_pcm_open,
2449 .close = nvhdmi_8ch_7x_pcm_close,
2450 .prepare = nvhdmi_8ch_7x_pcm_prepare
2451 },
2452};
2453
2454static int patch_nvhdmi_2ch(struct hda_codec *codec)
2455{
2456 struct hdmi_spec *spec;
2457 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2458 nvhdmi_master_pin_nid_7x);
2459 if (err < 0)
2460 return err;
2461
2462 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2463
2464 spec = codec->spec;
2465 spec->pcm_playback.rates = SUPPORTED_RATES;
2466 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2467 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2468 return 0;
2469}
2470
2471static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2472{
2473 struct hdmi_spec *spec = codec->spec;
2474 int err = simple_playback_build_pcms(codec);
2475 if (!err) {
2476 struct hda_pcm *info = get_pcm_rec(spec, 0);
2477 info->own_chmap = true;
2478 }
2479 return err;
2480}
2481
2482static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2483{
2484 struct hdmi_spec *spec = codec->spec;
2485 struct hda_pcm *info;
2486 struct snd_pcm_chmap *chmap;
2487 int err;
2488
2489 err = simple_playback_build_controls(codec);
2490 if (err < 0)
2491 return err;
2492
2493
2494 info = get_pcm_rec(spec, 0);
2495 err = snd_pcm_add_chmap_ctls(info->pcm,
2496 SNDRV_PCM_STREAM_PLAYBACK,
2497 snd_pcm_alt_chmaps, 8, 0, &chmap);
2498 if (err < 0)
2499 return err;
2500 switch (codec->preset->id) {
2501 case 0x10de0002:
2502 case 0x10de0003:
2503 case 0x10de0005:
2504 case 0x10de0006:
2505 chmap->channel_mask = (1U << 2) | (1U << 8);
2506 break;
2507 case 0x10de0007:
2508 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2509 }
2510 return 0;
2511}
2512
2513static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2514{
2515 struct hdmi_spec *spec;
2516 int err = patch_nvhdmi_2ch(codec);
2517 if (err < 0)
2518 return err;
2519 spec = codec->spec;
2520 spec->multiout.max_channels = 8;
2521 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2522 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2523 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2524 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2525
2526
2527
2528 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2529
2530 return 0;
2531}
2532
2533
2534
2535
2536
2537
2538
2539
2540#define ATIHDMI_CVT_NID 0x02
2541#define ATIHDMI_PIN_NID 0x03
2542
2543static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2544 struct hda_codec *codec,
2545 unsigned int stream_tag,
2546 unsigned int format,
2547 struct snd_pcm_substream *substream)
2548{
2549 struct hdmi_spec *spec = codec->spec;
2550 struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2551 int chans = substream->runtime->channels;
2552 int i, err;
2553
2554 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2555 substream);
2556 if (err < 0)
2557 return err;
2558 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2559 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2560
2561 for (i = 0; i < chans; i++) {
2562 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2563 AC_VERB_SET_HDMI_CHAN_SLOT,
2564 (i << 4) | i);
2565 }
2566 return 0;
2567}
2568
2569static int patch_atihdmi(struct hda_codec *codec)
2570{
2571 struct hdmi_spec *spec;
2572 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2573 if (err < 0)
2574 return err;
2575 spec = codec->spec;
2576 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2577 return 0;
2578}
2579
2580
2581#define VIAHDMI_CVT_NID 0x02
2582#define VIAHDMI_PIN_NID 0x03
2583
2584static int patch_via_hdmi(struct hda_codec *codec)
2585{
2586 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2587}
2588
2589
2590
2591
2592static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2593{ .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2594{ .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2595{ .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2596{ .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2597{ .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2598{ .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2599{ .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2600{ .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2601{ .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2602{ .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2603{ .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2604{ .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2605{ .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2606{ .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2607{ .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2608{ .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2609{ .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2610{ .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2611{ .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2612{ .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2613{ .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2614{ .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2615{ .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2616
2617{ .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2618{ .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2619{ .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2620{ .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2621{ .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2622{ .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2623{ .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2624{ .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2625{ .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2626{ .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2627{ .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2628{ .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
2629{ .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2630{ .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2631{ .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2632{ .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2633{ .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2634{ .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2635{ .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2636{ .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2637{ .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2638{ .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2639{ .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2640{ .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2641{ .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2642{ .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2643{ .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2644{ .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2645{}
2646};
2647
2648MODULE_ALIAS("snd-hda-codec-id:1002793c");
2649MODULE_ALIAS("snd-hda-codec-id:10027919");
2650MODULE_ALIAS("snd-hda-codec-id:1002791a");
2651MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2652MODULE_ALIAS("snd-hda-codec-id:10951390");
2653MODULE_ALIAS("snd-hda-codec-id:10951392");
2654MODULE_ALIAS("snd-hda-codec-id:10de0002");
2655MODULE_ALIAS("snd-hda-codec-id:10de0003");
2656MODULE_ALIAS("snd-hda-codec-id:10de0005");
2657MODULE_ALIAS("snd-hda-codec-id:10de0006");
2658MODULE_ALIAS("snd-hda-codec-id:10de0007");
2659MODULE_ALIAS("snd-hda-codec-id:10de000a");
2660MODULE_ALIAS("snd-hda-codec-id:10de000b");
2661MODULE_ALIAS("snd-hda-codec-id:10de000c");
2662MODULE_ALIAS("snd-hda-codec-id:10de000d");
2663MODULE_ALIAS("snd-hda-codec-id:10de0010");
2664MODULE_ALIAS("snd-hda-codec-id:10de0011");
2665MODULE_ALIAS("snd-hda-codec-id:10de0012");
2666MODULE_ALIAS("snd-hda-codec-id:10de0013");
2667MODULE_ALIAS("snd-hda-codec-id:10de0014");
2668MODULE_ALIAS("snd-hda-codec-id:10de0015");
2669MODULE_ALIAS("snd-hda-codec-id:10de0016");
2670MODULE_ALIAS("snd-hda-codec-id:10de0018");
2671MODULE_ALIAS("snd-hda-codec-id:10de0019");
2672MODULE_ALIAS("snd-hda-codec-id:10de001a");
2673MODULE_ALIAS("snd-hda-codec-id:10de001b");
2674MODULE_ALIAS("snd-hda-codec-id:10de001c");
2675MODULE_ALIAS("snd-hda-codec-id:10de0040");
2676MODULE_ALIAS("snd-hda-codec-id:10de0041");
2677MODULE_ALIAS("snd-hda-codec-id:10de0042");
2678MODULE_ALIAS("snd-hda-codec-id:10de0043");
2679MODULE_ALIAS("snd-hda-codec-id:10de0044");
2680MODULE_ALIAS("snd-hda-codec-id:10de0051");
2681MODULE_ALIAS("snd-hda-codec-id:10de0060");
2682MODULE_ALIAS("snd-hda-codec-id:10de0067");
2683MODULE_ALIAS("snd-hda-codec-id:10de8001");
2684MODULE_ALIAS("snd-hda-codec-id:11069f80");
2685MODULE_ALIAS("snd-hda-codec-id:11069f81");
2686MODULE_ALIAS("snd-hda-codec-id:11069f84");
2687MODULE_ALIAS("snd-hda-codec-id:11069f85");
2688MODULE_ALIAS("snd-hda-codec-id:17e80047");
2689MODULE_ALIAS("snd-hda-codec-id:80860054");
2690MODULE_ALIAS("snd-hda-codec-id:80862801");
2691MODULE_ALIAS("snd-hda-codec-id:80862802");
2692MODULE_ALIAS("snd-hda-codec-id:80862803");
2693MODULE_ALIAS("snd-hda-codec-id:80862804");
2694MODULE_ALIAS("snd-hda-codec-id:80862805");
2695MODULE_ALIAS("snd-hda-codec-id:80862806");
2696MODULE_ALIAS("snd-hda-codec-id:80862807");
2697MODULE_ALIAS("snd-hda-codec-id:80862880");
2698MODULE_ALIAS("snd-hda-codec-id:808629fb");
2699
2700MODULE_LICENSE("GPL");
2701MODULE_DESCRIPTION("HDMI HD-audio codec");
2702MODULE_ALIAS("snd-hda-codec-intelhdmi");
2703MODULE_ALIAS("snd-hda-codec-nvhdmi");
2704MODULE_ALIAS("snd-hda-codec-atihdmi");
2705
2706static struct hda_codec_preset_list intel_list = {
2707 .preset = snd_hda_preset_hdmi,
2708 .owner = THIS_MODULE,
2709};
2710
2711static int __init patch_hdmi_init(void)
2712{
2713 return snd_hda_add_codec_preset(&intel_list);
2714}
2715
2716static void __exit patch_hdmi_exit(void)
2717{
2718 snd_hda_delete_codec_preset(&intel_list);
2719}
2720
2721module_init(patch_hdmi_init)
2722module_exit(patch_hdmi_exit)
2723