linux/arch/arm/mach-at91/include/mach/at91sam9260.h
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   1/*
   2 * arch/arm/mach-at91/include/mach/at91sam9260.h
   3 *
   4 * (C) 2006 Andrew Victor
   5 *
   6 * Common definitions.
   7 * Based on AT91SAM9260 datasheet revision A (Preliminary).
   8 *
   9 * Includes also definitions for AT91SAM9XE and AT91SAM9G families
  10 *
  11 * This program is free software; you can redistribute it and/or modify
  12 * it under the terms of the GNU General Public License as published by
  13 * the Free Software Foundation; either version 2 of the License, or
  14 * (at your option) any later version.
  15 */
  16
  17#ifndef AT91SAM9260_H
  18#define AT91SAM9260_H
  19
  20/*
  21 * Peripheral identifiers/interrupts.
  22 */
  23#define AT91SAM9260_ID_PIOA     2       /* Parallel IO Controller A */
  24#define AT91SAM9260_ID_PIOB     3       /* Parallel IO Controller B */
  25#define AT91SAM9260_ID_PIOC     4       /* Parallel IO Controller C */
  26#define AT91SAM9260_ID_ADC      5       /* Analog-to-Digital Converter */
  27#define AT91SAM9260_ID_US0      6       /* USART 0 */
  28#define AT91SAM9260_ID_US1      7       /* USART 1 */
  29#define AT91SAM9260_ID_US2      8       /* USART 2 */
  30#define AT91SAM9260_ID_MCI      9       /* Multimedia Card Interface */
  31#define AT91SAM9260_ID_UDP      10      /* USB Device Port */
  32#define AT91SAM9260_ID_TWI      11      /* Two-Wire Interface */
  33#define AT91SAM9260_ID_SPI0     12      /* Serial Peripheral Interface 0 */
  34#define AT91SAM9260_ID_SPI1     13      /* Serial Peripheral Interface 1 */
  35#define AT91SAM9260_ID_SSC      14      /* Serial Synchronous Controller */
  36#define AT91SAM9260_ID_TC0      17      /* Timer Counter 0 */
  37#define AT91SAM9260_ID_TC1      18      /* Timer Counter 1 */
  38#define AT91SAM9260_ID_TC2      19      /* Timer Counter 2 */
  39#define AT91SAM9260_ID_UHP      20      /* USB Host port */
  40#define AT91SAM9260_ID_EMAC     21      /* Ethernet */
  41#define AT91SAM9260_ID_ISI      22      /* Image Sensor Interface */
  42#define AT91SAM9260_ID_US3      23      /* USART 3 */
  43#define AT91SAM9260_ID_US4      24      /* USART 4 */
  44#define AT91SAM9260_ID_US5      25      /* USART 5 */
  45#define AT91SAM9260_ID_TC3      26      /* Timer Counter 3 */
  46#define AT91SAM9260_ID_TC4      27      /* Timer Counter 4 */
  47#define AT91SAM9260_ID_TC5      28      /* Timer Counter 5 */
  48#define AT91SAM9260_ID_IRQ0     29      /* Advanced Interrupt Controller (IRQ0) */
  49#define AT91SAM9260_ID_IRQ1     30      /* Advanced Interrupt Controller (IRQ1) */
  50#define AT91SAM9260_ID_IRQ2     31      /* Advanced Interrupt Controller (IRQ2) */
  51
  52
  53/*
  54 * User Peripheral physical base addresses.
  55 */
  56#define AT91SAM9260_BASE_TCB0           0xfffa0000
  57#define AT91SAM9260_BASE_TC0            0xfffa0000
  58#define AT91SAM9260_BASE_TC1            0xfffa0040
  59#define AT91SAM9260_BASE_TC2            0xfffa0080
  60#define AT91SAM9260_BASE_UDP            0xfffa4000
  61#define AT91SAM9260_BASE_MCI            0xfffa8000
  62#define AT91SAM9260_BASE_TWI            0xfffac000
  63#define AT91SAM9260_BASE_US0            0xfffb0000
  64#define AT91SAM9260_BASE_US1            0xfffb4000
  65#define AT91SAM9260_BASE_US2            0xfffb8000
  66#define AT91SAM9260_BASE_SSC            0xfffbc000
  67#define AT91SAM9260_BASE_ISI            0xfffc0000
  68#define AT91SAM9260_BASE_EMAC           0xfffc4000
  69#define AT91SAM9260_BASE_SPI0           0xfffc8000
  70#define AT91SAM9260_BASE_SPI1           0xfffcc000
  71#define AT91SAM9260_BASE_US3            0xfffd0000
  72#define AT91SAM9260_BASE_US4            0xfffd4000
  73#define AT91SAM9260_BASE_US5            0xfffd8000
  74#define AT91SAM9260_BASE_TCB1           0xfffdc000
  75#define AT91SAM9260_BASE_TC3            0xfffdc000
  76#define AT91SAM9260_BASE_TC4            0xfffdc040
  77#define AT91SAM9260_BASE_TC5            0xfffdc080
  78#define AT91SAM9260_BASE_ADC            0xfffe0000
  79
  80/*
  81 * System Peripherals
  82 */
  83#define AT91SAM9260_BASE_ECC    0xffffe800
  84#define AT91SAM9260_BASE_SDRAMC 0xffffea00
  85#define AT91SAM9260_BASE_SMC    0xffffec00
  86#define AT91SAM9260_BASE_MATRIX 0xffffee00
  87#define AT91SAM9260_BASE_DBGU   AT91_BASE_DBGU0
  88#define AT91SAM9260_BASE_PIOA   0xfffff400
  89#define AT91SAM9260_BASE_PIOB   0xfffff600
  90#define AT91SAM9260_BASE_PIOC   0xfffff800
  91#define AT91SAM9260_BASE_RSTC   0xfffffd00
  92#define AT91SAM9260_BASE_SHDWC  0xfffffd10
  93#define AT91SAM9260_BASE_RTT    0xfffffd20
  94#define AT91SAM9260_BASE_PIT    0xfffffd30
  95#define AT91SAM9260_BASE_WDT    0xfffffd40
  96#define AT91SAM9260_BASE_GPBR   0xfffffd50
  97
  98
  99/*
 100 * Internal Memory.
 101 */
 102#define AT91SAM9260_ROM_BASE    0x00100000      /* Internal ROM base address */
 103#define AT91SAM9260_ROM_SIZE    SZ_32K          /* Internal ROM size (32Kb) */
 104
 105#define AT91SAM9260_SRAM0_BASE  0x00200000      /* Internal SRAM 0 base address */
 106#define AT91SAM9260_SRAM0_SIZE  SZ_4K           /* Internal SRAM 0 size (4Kb) */
 107#define AT91SAM9260_SRAM1_BASE  0x00300000      /* Internal SRAM 1 base address */
 108#define AT91SAM9260_SRAM1_SIZE  SZ_4K           /* Internal SRAM 1 size (4Kb) */
 109#define AT91SAM9260_SRAM_BASE   0x002FF000      /* Internal SRAM base address */
 110#define AT91SAM9260_SRAM_SIZE   SZ_8K           /* Internal SRAM size (8Kb) */
 111
 112#define AT91SAM9260_UHP_BASE    0x00500000      /* USB Host controller */
 113
 114#define AT91SAM9XE_FLASH_BASE   0x00200000      /* Internal FLASH base address */
 115#define AT91SAM9XE_SRAM_BASE    0x00300000      /* Internal SRAM base address */
 116
 117#define AT91SAM9G20_ROM_BASE    0x00100000      /* Internal ROM base address */
 118#define AT91SAM9G20_ROM_SIZE    SZ_32K          /* Internal ROM size (32Kb) */
 119
 120#define AT91SAM9G20_SRAM0_BASE  0x00200000      /* Internal SRAM 0 base address */
 121#define AT91SAM9G20_SRAM0_SIZE  SZ_16K          /* Internal SRAM 0 size (16Kb) */
 122#define AT91SAM9G20_SRAM1_BASE  0x00300000      /* Internal SRAM 1 base address */
 123#define AT91SAM9G20_SRAM1_SIZE  SZ_16K          /* Internal SRAM 1 size (16Kb) */
 124#define AT91SAM9G20_SRAM_BASE   0x002FC000      /* Internal SRAM base address */
 125#define AT91SAM9G20_SRAM_SIZE   SZ_32K          /* Internal SRAM size (32Kb) */
 126
 127#define AT91SAM9G20_UHP_BASE    0x00500000      /* USB Host controller */
 128
 129#endif
 130