linux/arch/arm/mach-omap1/include/mach/usb.h
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   1/*
   2 * FIXME correct answer depends on hmc_mode,
   3 * as does (on omap1) any nonzero value for config->otg port number
   4 */
   5#if IS_ENABLED(CONFIG_USB_OMAP)
   6#define is_usb0_device(config)  1
   7#else
   8#define is_usb0_device(config)  0
   9#endif
  10
  11struct omap_usb_config {
  12        /* Configure drivers according to the connectors on your board:
  13         *  - "A" connector (rectagular)
  14         *      ... for host/OHCI use, set "register_host".
  15         *  - "B" connector (squarish) or "Mini-B"
  16         *      ... for device/gadget use, set "register_dev".
  17         *  - "Mini-AB" connector (very similar to Mini-B)
  18         *      ... for OTG use as device OR host, initialize "otg"
  19         */
  20        unsigned        register_host:1;
  21        unsigned        register_dev:1;
  22        u8              otg;    /* port number, 1-based:  usb1 == 2 */
  23
  24        u8              hmc_mode;
  25
  26        /* implicitly true if otg:  host supports remote wakeup? */
  27        u8              rwc;
  28
  29        /* signaling pins used to talk to transceiver on usbN:
  30         *  0 == usbN unused
  31         *  2 == usb0-only, using internal transceiver
  32         *  3 == 3 wire bidirectional
  33         *  4 == 4 wire bidirectional
  34         *  6 == 6 wire unidirectional (or TLL)
  35         */
  36        u8              pins[3];
  37
  38        struct platform_device *udc_device;
  39        struct platform_device *ohci_device;
  40        struct platform_device *otg_device;
  41
  42        u32 (*usb0_init)(unsigned nwires, unsigned is_device);
  43        u32 (*usb1_init)(unsigned nwires);
  44        u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup);
  45
  46        int (*ocpi_enable)(void);
  47};
  48
  49void omap_otg_init(struct omap_usb_config *config);
  50
  51#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
  52void omap1_usb_init(struct omap_usb_config *pdata);
  53#else
  54static inline void omap1_usb_init(struct omap_usb_config *pdata)
  55{
  56}
  57#endif
  58
  59#define OMAP1_OTG_BASE                  0xfffb0400
  60#define OMAP1_UDC_BASE                  0xfffb4000
  61#define OMAP1_OHCI_BASE                 0xfffba000
  62
  63#define OMAP2_OHCI_BASE                 0x4805e000
  64#define OMAP2_UDC_BASE                  0x4805e200
  65#define OMAP2_OTG_BASE                  0x4805e300
  66#define OTG_BASE                        OMAP1_OTG_BASE
  67#define UDC_BASE                        OMAP1_UDC_BASE
  68#define OMAP_OHCI_BASE                  OMAP1_OHCI_BASE
  69
  70/*
  71 * OTG and transceiver registers, for OMAPs starting with ARM926
  72 */
  73#define OTG_REV                         (OTG_BASE + 0x00)
  74#define OTG_SYSCON_1                    (OTG_BASE + 0x04)
  75#       define   USB2_TRX_MODE(w)       (((w)>>24)&0x07)
  76#       define   USB1_TRX_MODE(w)       (((w)>>20)&0x07)
  77#       define   USB0_TRX_MODE(w)       (((w)>>16)&0x07)
  78#       define   OTG_IDLE_EN            (1 << 15)
  79#       define   HST_IDLE_EN            (1 << 14)
  80#       define   DEV_IDLE_EN            (1 << 13)
  81#       define   OTG_RESET_DONE         (1 << 2)
  82#       define   OTG_SOFT_RESET         (1 << 1)
  83#define OTG_SYSCON_2                    (OTG_BASE + 0x08)
  84#       define   OTG_EN                 (1 << 31)
  85#       define   USBX_SYNCHRO           (1 << 30)
  86#       define   OTG_MST16              (1 << 29)
  87#       define   SRP_GPDATA             (1 << 28)
  88#       define   SRP_GPDVBUS            (1 << 27)
  89#       define   SRP_GPUVBUS(w)         (((w)>>24)&0x07)
  90#       define   A_WAIT_VRISE(w)        (((w)>>20)&0x07)
  91#       define   B_ASE_BRST(w)          (((w)>>16)&0x07)
  92#       define   SRP_DPW                (1 << 14)
  93#       define   SRP_DATA               (1 << 13)
  94#       define   SRP_VBUS               (1 << 12)
  95#       define   OTG_PADEN              (1 << 10)
  96#       define   HMC_PADEN              (1 << 9)
  97#       define   UHOST_EN               (1 << 8)
  98#       define   HMC_TLLSPEED           (1 << 7)
  99#       define   HMC_TLLATTACH          (1 << 6)
 100#       define   OTG_HMC(w)             (((w)>>0)&0x3f)
 101#define OTG_CTRL                        (OTG_BASE + 0x0c)
 102#       define   OTG_USB2_EN            (1 << 29)
 103#       define   OTG_USB2_DP            (1 << 28)
 104#       define   OTG_USB2_DM            (1 << 27)
 105#       define   OTG_USB1_EN            (1 << 26)
 106#       define   OTG_USB1_DP            (1 << 25)
 107#       define   OTG_USB1_DM            (1 << 24)
 108#       define   OTG_USB0_EN            (1 << 23)
 109#       define   OTG_USB0_DP            (1 << 22)
 110#       define   OTG_USB0_DM            (1 << 21)
 111#       define   OTG_ASESSVLD           (1 << 20)
 112#       define   OTG_BSESSEND           (1 << 19)
 113#       define   OTG_BSESSVLD           (1 << 18)
 114#       define   OTG_VBUSVLD            (1 << 17)
 115#       define   OTG_ID                 (1 << 16)
 116#       define   OTG_DRIVER_SEL         (1 << 15)
 117#       define   OTG_A_SETB_HNPEN       (1 << 12)
 118#       define   OTG_A_BUSREQ           (1 << 11)
 119#       define   OTG_B_HNPEN            (1 << 9)
 120#       define   OTG_B_BUSREQ           (1 << 8)
 121#       define   OTG_BUSDROP            (1 << 7)
 122#       define   OTG_PULLDOWN           (1 << 5)
 123#       define   OTG_PULLUP             (1 << 4)
 124#       define   OTG_DRV_VBUS           (1 << 3)
 125#       define   OTG_PD_VBUS            (1 << 2)
 126#       define   OTG_PU_VBUS            (1 << 1)
 127#       define   OTG_PU_ID              (1 << 0)
 128#define OTG_IRQ_EN                      (OTG_BASE + 0x10)       /* 16-bit */
 129#       define   DRIVER_SWITCH          (1 << 15)
 130#       define   A_VBUS_ERR             (1 << 13)
 131#       define   A_REQ_TMROUT           (1 << 12)
 132#       define   A_SRP_DETECT           (1 << 11)
 133#       define   B_HNP_FAIL             (1 << 10)
 134#       define   B_SRP_TMROUT           (1 << 9)
 135#       define   B_SRP_DONE             (1 << 8)
 136#       define   B_SRP_STARTED          (1 << 7)
 137#       define   OPRT_CHG               (1 << 0)
 138#define OTG_IRQ_SRC                     (OTG_BASE + 0x14)       /* 16-bit */
 139        // same bits as in IRQ_EN
 140#define OTG_OUTCTRL                     (OTG_BASE + 0x18)       /* 16-bit */
 141#       define   OTGVPD                 (1 << 14)
 142#       define   OTGVPU                 (1 << 13)
 143#       define   OTGPUID                (1 << 12)
 144#       define   USB2VDR                (1 << 10)
 145#       define   USB2PDEN               (1 << 9)
 146#       define   USB2PUEN               (1 << 8)
 147#       define   USB1VDR                (1 << 6)
 148#       define   USB1PDEN               (1 << 5)
 149#       define   USB1PUEN               (1 << 4)
 150#       define   USB0VDR                (1 << 2)
 151#       define   USB0PDEN               (1 << 1)
 152#       define   USB0PUEN               (1 << 0)
 153#define OTG_TEST                        (OTG_BASE + 0x20)       /* 16-bit */
 154#define OTG_VENDOR_CODE                 (OTG_BASE + 0xfc)       /* 16-bit */
 155
 156/*-------------------------------------------------------------------------*/
 157
 158/* OMAP1 */
 159#define USB_TRANSCEIVER_CTRL            (0xfffe1000 + 0x0064)
 160#       define  CONF_USB2_UNI_R         (1 << 8)
 161#       define  CONF_USB1_UNI_R         (1 << 7)
 162#       define  CONF_USB_PORT0_R(x)     (((x)>>4)&0x7)
 163#       define  CONF_USB0_ISOLATE_R     (1 << 3)
 164#       define  CONF_USB_PWRDN_DM_R     (1 << 2)
 165#       define  CONF_USB_PWRDN_DP_R     (1 << 1)
 166