linux/arch/arm/mach-s3c64xx/include/mach/map.h
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   1/* linux/arch/arm/mach-s3c6400/include/mach/map.h
   2 *
   3 * Copyright 2008 Openmoko, Inc.
   4 * Copyright 2008 Simtec Electronics
   5 *      http://armlinux.simtec.co.uk/
   6 *      Ben Dooks <ben@simtec.co.uk>
   7 *
   8 * S3C64XX - Memory map definitions
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License version 2 as
  12 * published by the Free Software Foundation.
  13*/
  14
  15#ifndef __ASM_ARCH_MAP_H
  16#define __ASM_ARCH_MAP_H __FILE__
  17
  18#include <plat/map-base.h>
  19#include <plat/map-s3c.h>
  20
  21/*
  22 * Post-mux Chip Select Regions Xm0CSn_
  23 * These may be used by SROM, NAND or CF depending on settings
  24 */
  25
  26#define S3C64XX_PA_XM0CSN0 (0x10000000)
  27#define S3C64XX_PA_XM0CSN1 (0x18000000)
  28#define S3C64XX_PA_XM0CSN2 (0x20000000)
  29#define S3C64XX_PA_XM0CSN3 (0x28000000)
  30#define S3C64XX_PA_XM0CSN4 (0x30000000)
  31#define S3C64XX_PA_XM0CSN5 (0x38000000)
  32
  33/* HSMMC units */
  34#define S3C64XX_PA_HSMMC(x)     (0x7C200000 + ((x) * 0x100000))
  35#define S3C64XX_PA_HSMMC0       S3C64XX_PA_HSMMC(0)
  36#define S3C64XX_PA_HSMMC1       S3C64XX_PA_HSMMC(1)
  37#define S3C64XX_PA_HSMMC2       S3C64XX_PA_HSMMC(2)
  38
  39#define S3C_PA_UART             (0x7F005000)
  40#define S3C_PA_UART0            (S3C_PA_UART + 0x00)
  41#define S3C_PA_UART1            (S3C_PA_UART + 0x400)
  42#define S3C_PA_UART2            (S3C_PA_UART + 0x800)
  43#define S3C_PA_UART3            (S3C_PA_UART + 0xC00)
  44#define S3C_UART_OFFSET         (0x400)
  45
  46/* See notes on UART VA mapping in debug-macro.S */
  47#define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET))
  48
  49#define S3C_VA_UART0            S3C_VA_UARTx(0)
  50#define S3C_VA_UART1            S3C_VA_UARTx(1)
  51#define S3C_VA_UART2            S3C_VA_UARTx(2)
  52#define S3C_VA_UART3            S3C_VA_UARTx(3)
  53
  54#define S3C64XX_PA_SROM         (0x70000000)
  55
  56#define S3C64XX_PA_ONENAND0     (0x70100000)
  57#define S3C64XX_PA_ONENAND0_BUF (0x20000000)
  58#define S3C64XX_SZ_ONENAND0_BUF (SZ_64M)
  59
  60/* NAND and OneNAND1 controllers occupy the same register region
  61   (depending on SoC POP version) */
  62#define S3C64XX_PA_ONENAND1     (0x70200000)
  63#define S3C64XX_PA_ONENAND1_BUF (0x28000000)
  64#define S3C64XX_SZ_ONENAND1_BUF (SZ_64M)
  65
  66#define S3C64XX_PA_NAND         (0x70200000)
  67#define S3C64XX_PA_FB           (0x77100000)
  68#define S3C64XX_PA_USB_HSOTG    (0x7C000000)
  69#define S3C64XX_PA_WATCHDOG     (0x7E004000)
  70#define S3C64XX_PA_RTC          (0x7E005000)
  71#define S3C64XX_PA_KEYPAD       (0x7E00A000)
  72#define S3C64XX_PA_ADC          (0x7E00B000)
  73#define S3C64XX_PA_SYSCON       (0x7E00F000)
  74#define S3C64XX_PA_AC97         (0x7F001000)
  75#define S3C64XX_PA_IIS0         (0x7F002000)
  76#define S3C64XX_PA_IIS1         (0x7F003000)
  77#define S3C64XX_PA_TIMER        (0x7F006000)
  78#define S3C64XX_PA_IIC0         (0x7F004000)
  79#define S3C64XX_PA_SPI0         (0x7F00B000)
  80#define S3C64XX_PA_SPI1         (0x7F00C000)
  81#define S3C64XX_PA_PCM0         (0x7F009000)
  82#define S3C64XX_PA_PCM1         (0x7F00A000)
  83#define S3C64XX_PA_IISV4        (0x7F00D000)
  84#define S3C64XX_PA_IIC1         (0x7F00F000)
  85
  86#define S3C64XX_PA_GPIO         (0x7F008000)
  87#define S3C64XX_SZ_GPIO         SZ_4K
  88
  89#define S3C64XX_PA_SDRAM        (0x50000000)
  90
  91#define S3C64XX_PA_CFCON        (0x70300000)
  92
  93#define S3C64XX_PA_VIC0         (0x71200000)
  94#define S3C64XX_PA_VIC1         (0x71300000)
  95
  96#define S3C64XX_PA_MODEM        (0x74108000)
  97
  98#define S3C64XX_PA_USBHOST      (0x74300000)
  99
 100#define S3C64XX_PA_USB_HSPHY    (0x7C100000)
 101
 102/* compatibiltiy defines. */
 103#define S3C_PA_TIMER            S3C64XX_PA_TIMER
 104#define S3C_PA_HSMMC0           S3C64XX_PA_HSMMC0
 105#define S3C_PA_HSMMC1           S3C64XX_PA_HSMMC1
 106#define S3C_PA_HSMMC2           S3C64XX_PA_HSMMC2
 107#define S3C_PA_IIC              S3C64XX_PA_IIC0
 108#define S3C_PA_IIC1             S3C64XX_PA_IIC1
 109#define S3C_PA_NAND             S3C64XX_PA_NAND
 110#define S3C_PA_ONENAND          S3C64XX_PA_ONENAND0
 111#define S3C_PA_ONENAND_BUF      S3C64XX_PA_ONENAND0_BUF
 112#define S3C_SZ_ONENAND_BUF      S3C64XX_SZ_ONENAND0_BUF
 113#define S3C_PA_FB               S3C64XX_PA_FB
 114#define S3C_PA_USBHOST          S3C64XX_PA_USBHOST
 115#define S3C_PA_USB_HSOTG        S3C64XX_PA_USB_HSOTG
 116#define S3C_PA_RTC              S3C64XX_PA_RTC
 117#define S3C_PA_WDT              S3C64XX_PA_WATCHDOG
 118#define S3C_PA_SPI0             S3C64XX_PA_SPI0
 119#define S3C_PA_SPI1             S3C64XX_PA_SPI1
 120
 121#define SAMSUNG_PA_ADC          S3C64XX_PA_ADC
 122#define SAMSUNG_PA_CFCON        S3C64XX_PA_CFCON
 123#define SAMSUNG_PA_KEYPAD       S3C64XX_PA_KEYPAD
 124#define SAMSUNG_PA_TIMER        S3C64XX_PA_TIMER
 125
 126#endif /* __ASM_ARCH_6400_MAP_H */
 127