LXR linux/arch/arm/mach-sa1100/clock.c

   1/*
   2 *  linux/arch/arm/mach-sa1100/clock.c
   3 */
   4#include <linux/module.h>
   5#include <linux/kernel.h>
   6#include <linux/device.h>
   7#include <linux/list.h>
   8#include <linux/errno.h>
   9#include <linux/err.h>
  10#include <linux/string.h>
  11#include <linux/clk.h>
  12#include <linux/spinlock.h>
  13#include <linux/mutex.h>
  14#include <linux/io.h>
  15#include <linux/clkdev.h>
  16
  17#include <mach/hardware.h>
  18
  19struct clkops {
  20        void                    (*enable)(struct clk *);
  21        void                    (*disable)(struct clk *);
  22};
  23
  24struct clk {
  25        const struct clkops     *ops;
  26        unsigned int            enabled;
  27};
  28
  29#define DEFINE_CLK(_name, _ops)                         \
  30struct clk clk_##_name = {                              \
  31                .ops    = _ops,                         \
  32        }
  33
  34static DEFINE_SPINLOCK(clocks_lock);
  35
  36static void clk_gpio27_enable(struct clk *clk)
  37{
  38        /*
  39         * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
  40         * (SA-1110 Developer's Manual, section 9.1.2.1)
  41         */
  42        GAFR |= GPIO_32_768kHz;
  43        GPDR |= GPIO_32_768kHz;
  44        TUCR = TUCR_3_6864MHz;
  45}
  46
  47static void clk_gpio27_disable(struct clk *clk)
  48{
  49        TUCR = 0;
  50        GPDR &= ~GPIO_32_768kHz;
  51        GAFR &= ~GPIO_32_768kHz;
  52}
  53
  54int clk_enable(struct clk *clk)
  55{
  56        unsigned long flags;
  57
  58        if (clk) {
  59                spin_lock_irqsave(&clocks_lock, flags);
  60                if (clk->enabled++ == 0)
  61                        clk->ops->enable(clk);
  62                spin_unlock_irqrestore(&clocks_lock, flags);
  63        }
  64
  65        return 0;
  66}
  67EXPORT_SYMBOL(clk_enable);
  68
  69void clk_disable(struct clk *clk)
  70{
  71        unsigned long flags;
  72
  73        if (clk) {
  74                WARN_ON(clk->enabled == 0);
  75                spin_lock_irqsave(&clocks_lock, flags);
  76                if (--clk->enabled == 0)
  77                        clk->ops->disable(clk);
  78                spin_unlock_irqrestore(&clocks_lock, flags);
  79        }
  80}
  81EXPORT_SYMBOL(clk_disable);
  82
  83const struct clkops clk_gpio27_ops = {
  84        .enable         = clk_gpio27_enable,
  85        .disable        = clk_gpio27_disable,
  86};
  87
  88static DEFINE_CLK(gpio27, &clk_gpio27_ops);
  89
  90static struct clk_lookup sa11xx_clkregs[] = {
  91        CLKDEV_INIT("sa1111.0", NULL, &clk_gpio27),
  92        CLKDEV_INIT("sa1100-rtc", NULL, NULL),
  93};
  94
  95static int __init sa11xx_clk_init(void)
  96{
  97        clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
  98        return 0;
  99}
 100core_initcall(sa11xx_clk_init);
 101