LXR linux/arch/arm/mach-sa1100/generic.c

   1/*
   2 * linux/arch/arm/mach-sa1100/generic.c
   3 *
   4 * Author: Nicolas Pitre
   5 *
   6 * Code common to all SA11x0 machines.
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 */
  12#include <linux/gpio.h>
  13#include <linux/module.h>
  14#include <linux/kernel.h>
  15#include <linux/init.h>
  16#include <linux/delay.h>
  17#include <linux/dma-mapping.h>
  18#include <linux/pm.h>
  19#include <linux/cpufreq.h>
  20#include <linux/ioport.h>
  21#include <linux/platform_device.h>
  22#include <linux/reboot.h>
  23
  24#include <video/sa1100fb.h>
  25
  26#include <asm/div64.h>
  27#include <asm/mach/map.h>
  28#include <asm/mach/flash.h>
  29#include <asm/irq.h>
  30#include <asm/system_misc.h>
  31
  32#include <mach/hardware.h>
  33#include <mach/irqs.h>
  34
  35#include "generic.h"
  36
  37unsigned int reset_status;
  38EXPORT_SYMBOL(reset_status);
  39
  40#define NR_FREQS        16
  41
  42/*
  43 * This table is setup for a 3.6864MHz Crystal.
  44 */
  45static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
  46         590,   /*  59.0 MHz */
  47         737,   /*  73.7 MHz */
  48         885,   /*  88.5 MHz */
  49        1032,   /* 103.2 MHz */
  50        1180,   /* 118.0 MHz */
  51        1327,   /* 132.7 MHz */
  52        1475,   /* 147.5 MHz */
  53        1622,   /* 162.2 MHz */
  54        1769,   /* 176.9 MHz */
  55        1917,   /* 191.7 MHz */
  56        2064,   /* 206.4 MHz */
  57        2212,   /* 221.2 MHz */
  58        2359,   /* 235.9 MHz */
  59        2507,   /* 250.7 MHz */
  60        2654,   /* 265.4 MHz */
  61        2802    /* 280.2 MHz */
  62};
  63
  64/* rounds up(!)  */
  65unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
  66{
  67        int i;
  68
  69        khz /= 100;
  70
  71        for (i = 0; i < NR_FREQS; i++)
  72                if (cclk_frequency_100khz[i] >= khz)
  73                        break;
  74
  75        return i;
  76}
  77
  78unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
  79{
  80        unsigned int freq = 0;
  81        if (idx < NR_FREQS)
  82                freq = cclk_frequency_100khz[idx] * 100;
  83        return freq;
  84}
  85
  86
  87/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
  88 * this platform, anyway.
  89 */
  90int sa11x0_verify_speed(struct cpufreq_policy *policy)
  91{
  92        unsigned int tmp;
  93        if (policy->cpu)
  94                return -EINVAL;
  95
  96        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  97
  98        /* make sure that at least one frequency is within the policy */
  99        tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
 100        if (tmp > policy->max)
 101                policy->max = tmp;
 102
 103        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
 104
 105        return 0;
 106}
 107
 108unsigned int sa11x0_getspeed(unsigned int cpu)
 109{
 110        if (cpu)
 111                return 0;
 112        return cclk_frequency_100khz[PPCR & 0xf] * 100;
 113}
 114
 115/*
 116 * Default power-off for SA1100
 117 */
 118static void sa1100_power_off(void)
 119{
 120        mdelay(100);
 121        local_irq_disable();
 122        /* disable internal oscillator, float CS lines */
 123        PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
 124        /* enable wake-up on GPIO0 (Assabet...) */
 125        PWER = GFER = GRER = 1;
 126        /*
 127         * set scratchpad to zero, just in case it is used as a
 128         * restart address by the bootloader.
 129         */
 130        PSPR = 0;
 131        /* enter sleep mode */
 132        PMCR = PMCR_SF;
 133}
 134
 135void sa11x0_restart(enum reboot_mode mode, const char *cmd)
 136{
 137        if (mode == REBOOT_SOFT) {
 138                /* Jump into ROM at address 0 */
 139                soft_restart(0);
 140        } else {
 141                /* Use on-chip reset capability */
 142                RSRR = RSRR_SWR;
 143        }
 144}
 145
 146static void sa11x0_register_device(struct platform_device *dev, void *data)
 147{
 148        int err;
 149        dev->dev.platform_data = data;
 150        err = platform_device_register(dev);
 151        if (err)
 152                printk(KERN_ERR "Unable to register device %s: %d\n",
 153                        dev->name, err);
 154}
 155
 156
 157static struct resource sa11x0udc_resources[] = {
 158        [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
 159        [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
 160};
 161
 162static u64 sa11x0udc_dma_mask = 0xffffffffUL;
 163
 164static struct platform_device sa11x0udc_device = {
 165        .name           = "sa11x0-udc",
 166        .id             = -1,
 167        .dev            = {
 168                .dma_mask = &sa11x0udc_dma_mask,
 169                .coherent_dma_mask = 0xffffffff,
 170        },
 171        .num_resources  = ARRAY_SIZE(sa11x0udc_resources),
 172        .resource       = sa11x0udc_resources,
 173};
 174
 175static struct resource sa11x0uart1_resources[] = {
 176        [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
 177        [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
 178};
 179
 180static struct platform_device sa11x0uart1_device = {
 181        .name           = "sa11x0-uart",
 182        .id             = 1,
 183        .num_resources  = ARRAY_SIZE(sa11x0uart1_resources),
 184        .resource       = sa11x0uart1_resources,
 185};
 186
 187static struct resource sa11x0uart3_resources[] = {
 188        [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
 189        [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
 190};
 191
 192static struct platform_device sa11x0uart3_device = {
 193        .name           = "sa11x0-uart",
 194        .id             = 3,
 195        .num_resources  = ARRAY_SIZE(sa11x0uart3_resources),
 196        .resource       = sa11x0uart3_resources,
 197};
 198
 199static struct resource sa11x0mcp_resources[] = {
 200        [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
 201        [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
 202        [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
 203};
 204
 205static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
 206
 207static struct platform_device sa11x0mcp_device = {
 208        .name           = "sa11x0-mcp",
 209        .id             = -1,
 210        .dev = {
 211                .dma_mask = &sa11x0mcp_dma_mask,
 212                .coherent_dma_mask = 0xffffffff,
 213        },
 214        .num_resources  = ARRAY_SIZE(sa11x0mcp_resources),
 215        .resource       = sa11x0mcp_resources,
 216};
 217
 218void __init sa11x0_ppc_configure_mcp(void)
 219{
 220        /* Setup the PPC unit for the MCP */
 221        PPDR &= ~PPC_RXD4;
 222        PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
 223        PSDR |= PPC_RXD4;
 224        PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
 225        PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
 226}
 227
 228void sa11x0_register_mcp(struct mcp_plat_data *data)
 229{
 230        sa11x0_register_device(&sa11x0mcp_device, data);
 231}
 232
 233static struct resource sa11x0ssp_resources[] = {
 234        [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
 235        [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
 236};
 237
 238static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
 239
 240static struct platform_device sa11x0ssp_device = {
 241        .name           = "sa11x0-ssp",
 242        .id             = -1,
 243        .dev = {
 244                .dma_mask = &sa11x0ssp_dma_mask,
 245                .coherent_dma_mask = 0xffffffff,
 246        },
 247        .num_resources  = ARRAY_SIZE(sa11x0ssp_resources),
 248        .resource       = sa11x0ssp_resources,
 249};
 250
 251static struct resource sa11x0fb_resources[] = {
 252        [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
 253        [1] = DEFINE_RES_IRQ(IRQ_LCD),
 254};
 255
 256static struct platform_device sa11x0fb_device = {
 257        .name           = "sa11x0-fb",
 258        .id             = -1,
 259        .dev = {
 260                .coherent_dma_mask = 0xffffffff,
 261        },
 262        .num_resources  = ARRAY_SIZE(sa11x0fb_resources),
 263        .resource       = sa11x0fb_resources,
 264};
 265
 266void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
 267{
 268        sa11x0_register_device(&sa11x0fb_device, inf);
 269}
 270
 271static struct platform_device sa11x0pcmcia_device = {
 272        .name           = "sa11x0-pcmcia",
 273        .id             = -1,
 274};
 275
 276static struct platform_device sa11x0mtd_device = {
 277        .name           = "sa1100-mtd",
 278        .id             = -1,
 279};
 280
 281void sa11x0_register_mtd(struct flash_platform_data *flash,
 282                         struct resource *res, int nr)
 283{
 284        flash->name = "sa1100";
 285        sa11x0mtd_device.resource = res;
 286        sa11x0mtd_device.num_resources = nr;
 287        sa11x0_register_device(&sa11x0mtd_device, flash);
 288}
 289
 290static struct resource sa11x0ir_resources[] = {
 291        DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
 292        DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
 293        DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
 294        DEFINE_RES_IRQ(IRQ_Ser2ICP),
 295};
 296
 297static struct platform_device sa11x0ir_device = {
 298        .name           = "sa11x0-ir",
 299        .id             = -1,
 300        .num_resources  = ARRAY_SIZE(sa11x0ir_resources),
 301        .resource       = sa11x0ir_resources,
 302};
 303
 304void sa11x0_register_irda(struct irda_platform_data *irda)
 305{
 306        sa11x0_register_device(&sa11x0ir_device, irda);
 307}
 308
 309static struct resource sa1100_rtc_resources[] = {
 310        DEFINE_RES_MEM(0x90010000, 0x40),
 311        DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
 312        DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
 313};
 314
 315static struct platform_device sa11x0rtc_device = {
 316        .name           = "sa1100-rtc",
 317        .id             = -1,
 318        .num_resources  = ARRAY_SIZE(sa1100_rtc_resources),
 319        .resource       = sa1100_rtc_resources,
 320};
 321
 322static struct resource sa11x0dma_resources[] = {
 323        DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
 324        DEFINE_RES_IRQ(IRQ_DMA0),
 325        DEFINE_RES_IRQ(IRQ_DMA1),
 326        DEFINE_RES_IRQ(IRQ_DMA2),
 327        DEFINE_RES_IRQ(IRQ_DMA3),
 328        DEFINE_RES_IRQ(IRQ_DMA4),
 329        DEFINE_RES_IRQ(IRQ_DMA5),
 330};
 331
 332static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
 333
 334static struct platform_device sa11x0dma_device = {
 335        .name           = "sa11x0-dma",
 336        .id             = -1,
 337        .dev = {
 338                .dma_mask = &sa11x0dma_dma_mask,
 339                .coherent_dma_mask = 0xffffffff,
 340        },
 341        .num_resources  = ARRAY_SIZE(sa11x0dma_resources),
 342        .resource       = sa11x0dma_resources,
 343};
 344
 345static struct platform_device *sa11x0_devices[] __initdata = {
 346        &sa11x0udc_device,
 347        &sa11x0uart1_device,
 348        &sa11x0uart3_device,
 349        &sa11x0ssp_device,
 350        &sa11x0pcmcia_device,
 351        &sa11x0rtc_device,
 352        &sa11x0dma_device,
 353};
 354
 355static int __init sa1100_init(void)
 356{
 357        pm_power_off = sa1100_power_off;
 358        return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
 359}
 360
 361arch_initcall(sa1100_init);
 362
 363void __init sa11x0_init_late(void)
 364{
 365        sa11x0_pm_init();
 366}
 367
 368/*
 369 * Common I/O mapping:
 370 *
 371 * Typically, static virtual address mappings are as follow:
 372 *
 373 * 0xf0000000-0xf3ffffff:       miscellaneous stuff (CPLDs, etc.)
 374 * 0xf4000000-0xf4ffffff:       SA-1111
 375 * 0xf5000000-0xf5ffffff:       reserved (used by cache flushing area)
 376 * 0xf6000000-0xfffeffff:       reserved (internal SA1100 IO defined above)
 377 * 0xffff0000-0xffff0fff:       SA1100 exception vectors
 378 * 0xffff2000-0xffff2fff:       Minicache copy_user_page area
 379 *
 380 * Below 0xe8000000 is reserved for vm allocation.
 381 *
 382 * The machine specific code must provide the extra mapping beside the
 383 * default mapping provided here.
 384 */
 385
 386static struct map_desc standard_io_desc[] __initdata = {
 387        {       /* PCM */
 388                .virtual        =  0xf8000000,
 389                .pfn            = __phys_to_pfn(0x80000000),
 390                .length         = 0x00100000,
 391                .type           = MT_DEVICE
 392        }, {    /* SCM */
 393                .virtual        =  0xfa000000,
 394                .pfn            = __phys_to_pfn(0x90000000),
 395                .length         = 0x00100000,
 396                .type           = MT_DEVICE
 397        }, {    /* MER */
 398                .virtual        =  0xfc000000,
 399                .pfn            = __phys_to_pfn(0xa0000000),
 400                .length         = 0x00100000,
 401                .type           = MT_DEVICE
 402        }, {    /* LCD + DMA */
 403                .virtual        =  0xfe000000,
 404                .pfn            = __phys_to_pfn(0xb0000000),
 405                .length         = 0x00200000,
 406                .type           = MT_DEVICE
 407        },
 408};
 409
 410void __init sa1100_map_io(void)
 411{
 412        iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
 413}
 414
 415/*
 416 * Disable the memory bus request/grant signals on the SA1110 to
 417 * ensure that we don't receive spurious memory requests.  We set
 418 * the MBGNT signal false to ensure the SA1111 doesn't own the
 419 * SDRAM bus.
 420 */
 421void sa1110_mb_disable(void)
 422{
 423        unsigned long flags;
 424
 425        local_irq_save(flags);
 426        
 427        PGSR &= ~GPIO_MBGNT;
 428        GPCR = GPIO_MBGNT;
 429        GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 430
 431        GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
 432
 433        local_irq_restore(flags);
 434}
 435
 436/*
 437 * If the system is going to use the SA-1111 DMA engines, set up
 438 * the memory bus request/grant pins.
 439 */
 440void sa1110_mb_enable(void)
 441{
 442        unsigned long flags;
 443
 444        local_irq_save(flags);
 445
 446        PGSR &= ~GPIO_MBGNT;
 447        GPCR = GPIO_MBGNT;
 448        GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 449
 450        GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
 451        TUCR |= TUCR_MR;
 452
 453        local_irq_restore(flags);
 454}
 455
 456