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11#include <linux/export.h>
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/io.h>
15#include <linux/spinlock.h>
16#include <mach/regs-clock.h>
17
18static int __s5p_mipi_phy_control(int id, bool on, u32 reset)
19{
20 static DEFINE_SPINLOCK(lock);
21 void __iomem *addr;
22 unsigned long flags;
23 u32 cfg;
24
25 id = max(0, id);
26 if (id > 1)
27 return -EINVAL;
28
29 addr = S5P_MIPI_DPHY_CONTROL(id);
30
31 spin_lock_irqsave(&lock, flags);
32
33 cfg = __raw_readl(addr);
34 cfg = on ? (cfg | reset) : (cfg & ~reset);
35 __raw_writel(cfg, addr);
36
37 if (on) {
38 cfg |= S5P_MIPI_DPHY_ENABLE;
39 } else if (!(cfg & (S5P_MIPI_DPHY_SRESETN |
40 S5P_MIPI_DPHY_MRESETN) & ~reset)) {
41 cfg &= ~S5P_MIPI_DPHY_ENABLE;
42 }
43
44 __raw_writel(cfg, addr);
45 spin_unlock_irqrestore(&lock, flags);
46
47 return 0;
48}
49
50int s5p_csis_phy_enable(int id, bool on)
51{
52 return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN);
53}
54EXPORT_SYMBOL(s5p_csis_phy_enable);
55
56int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
57{
58 return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN);
59}
60EXPORT_SYMBOL(s5p_dsim_phy_enable);
61