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21#include <linux/sched.h>
22#include <linux/mm.h>
23#include <linux/dma-mapping.h>
24#include <linux/kvm_host.h>
25#include <asm/thread_info.h>
26#include <asm/memory.h>
27#include <asm/cputable.h>
28#include <asm/vdso_datapage.h>
29#include <linux/kbuild.h>
30
31int main(void)
32{
33 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
34 BLANK();
35 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
36 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
37 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
38 DEFINE(TI_TASK, offsetof(struct thread_info, task));
39 DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
40 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
41 BLANK();
42 DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context));
43 BLANK();
44 DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
45 DEFINE(S_X1, offsetof(struct pt_regs, regs[1]));
46 DEFINE(S_X2, offsetof(struct pt_regs, regs[2]));
47 DEFINE(S_X3, offsetof(struct pt_regs, regs[3]));
48 DEFINE(S_X4, offsetof(struct pt_regs, regs[4]));
49 DEFINE(S_X5, offsetof(struct pt_regs, regs[5]));
50 DEFINE(S_X6, offsetof(struct pt_regs, regs[6]));
51 DEFINE(S_X7, offsetof(struct pt_regs, regs[7]));
52 DEFINE(S_LR, offsetof(struct pt_regs, regs[30]));
53 DEFINE(S_SP, offsetof(struct pt_regs, sp));
54#ifdef CONFIG_COMPAT
55 DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp));
56#endif
57 DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate));
58 DEFINE(S_PC, offsetof(struct pt_regs, pc));
59 DEFINE(S_ORIG_X0, offsetof(struct pt_regs, orig_x0));
60 DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno));
61 DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
62 BLANK();
63 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
64 BLANK();
65 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
66 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
67 BLANK();
68 DEFINE(VM_EXEC, VM_EXEC);
69 BLANK();
70 DEFINE(PAGE_SZ, PAGE_SIZE);
71 BLANK();
72 DEFINE(CPU_INFO_SZ, sizeof(struct cpu_info));
73 DEFINE(CPU_INFO_SETUP, offsetof(struct cpu_info, cpu_setup));
74 BLANK();
75 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
76 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
77 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
78 BLANK();
79 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
80 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
81 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
82 DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
83 DEFINE(CLOCK_MONOTONIC_COARSE,CLOCK_MONOTONIC_COARSE);
84 DEFINE(CLOCK_COARSE_RES, LOW_RES_NSEC);
85 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
86 BLANK();
87 DEFINE(VDSO_CS_CYCLE_LAST, offsetof(struct vdso_data, cs_cycle_last));
88 DEFINE(VDSO_XTIME_CLK_SEC, offsetof(struct vdso_data, xtime_clock_sec));
89 DEFINE(VDSO_XTIME_CLK_NSEC, offsetof(struct vdso_data, xtime_clock_nsec));
90 DEFINE(VDSO_XTIME_CRS_SEC, offsetof(struct vdso_data, xtime_coarse_sec));
91 DEFINE(VDSO_XTIME_CRS_NSEC, offsetof(struct vdso_data, xtime_coarse_nsec));
92 DEFINE(VDSO_WTM_CLK_SEC, offsetof(struct vdso_data, wtm_clock_sec));
93 DEFINE(VDSO_WTM_CLK_NSEC, offsetof(struct vdso_data, wtm_clock_nsec));
94 DEFINE(VDSO_TB_SEQ_COUNT, offsetof(struct vdso_data, tb_seq_count));
95 DEFINE(VDSO_CS_MULT, offsetof(struct vdso_data, cs_mult));
96 DEFINE(VDSO_CS_SHIFT, offsetof(struct vdso_data, cs_shift));
97 DEFINE(VDSO_TZ_MINWEST, offsetof(struct vdso_data, tz_minuteswest));
98 DEFINE(VDSO_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
99 DEFINE(VDSO_USE_SYSCALL, offsetof(struct vdso_data, use_syscall));
100 BLANK();
101 DEFINE(TVAL_TV_SEC, offsetof(struct timeval, tv_sec));
102 DEFINE(TVAL_TV_USEC, offsetof(struct timeval, tv_usec));
103 DEFINE(TSPEC_TV_SEC, offsetof(struct timespec, tv_sec));
104 DEFINE(TSPEC_TV_NSEC, offsetof(struct timespec, tv_nsec));
105 BLANK();
106 DEFINE(TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
107 DEFINE(TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
108 BLANK();
109#ifdef CONFIG_KVM_ARM_HOST
110 DEFINE(VCPU_CONTEXT, offsetof(struct kvm_vcpu, arch.ctxt));
111 DEFINE(CPU_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
112 DEFINE(CPU_USER_PT_REGS, offsetof(struct kvm_regs, regs));
113 DEFINE(CPU_FP_REGS, offsetof(struct kvm_regs, fp_regs));
114 DEFINE(CPU_SP_EL1, offsetof(struct kvm_regs, sp_el1));
115 DEFINE(CPU_ELR_EL1, offsetof(struct kvm_regs, elr_el1));
116 DEFINE(CPU_SPSR, offsetof(struct kvm_regs, spsr));
117 DEFINE(CPU_SYSREGS, offsetof(struct kvm_cpu_context, sys_regs));
118 DEFINE(VCPU_ESR_EL2, offsetof(struct kvm_vcpu, arch.fault.esr_el2));
119 DEFINE(VCPU_FAR_EL2, offsetof(struct kvm_vcpu, arch.fault.far_el2));
120 DEFINE(VCPU_HPFAR_EL2, offsetof(struct kvm_vcpu, arch.fault.hpfar_el2));
121 DEFINE(VCPU_HCR_EL2, offsetof(struct kvm_vcpu, arch.hcr_el2));
122 DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines));
123 DEFINE(VCPU_HOST_CONTEXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
124 DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl));
125 DEFINE(VCPU_TIMER_CNTV_CVAL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval));
126 DEFINE(KVM_TIMER_CNTVOFF, offsetof(struct kvm, arch.timer.cntvoff));
127 DEFINE(KVM_TIMER_ENABLED, offsetof(struct kvm, arch.timer.enabled));
128 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
129 DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
130 DEFINE(VGIC_CPU_HCR, offsetof(struct vgic_cpu, vgic_hcr));
131 DEFINE(VGIC_CPU_VMCR, offsetof(struct vgic_cpu, vgic_vmcr));
132 DEFINE(VGIC_CPU_MISR, offsetof(struct vgic_cpu, vgic_misr));
133 DEFINE(VGIC_CPU_EISR, offsetof(struct vgic_cpu, vgic_eisr));
134 DEFINE(VGIC_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_elrsr));
135 DEFINE(VGIC_CPU_APR, offsetof(struct vgic_cpu, vgic_apr));
136 DEFINE(VGIC_CPU_LR, offsetof(struct vgic_cpu, vgic_lr));
137 DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr));
138 DEFINE(KVM_VTTBR, offsetof(struct kvm, arch.vttbr));
139 DEFINE(KVM_VGIC_VCTRL, offsetof(struct kvm, arch.vgic.vctrl_base));
140#endif
141 return 0;
142}
143
