linux/arch/ia64/include/uapi/asm/ia64regs.h
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   1/*
   2 * Copyright (C) 2002,2003 Intel Corp.
   3 *      Jun Nakajima <jun.nakajima@intel.com>
   4 *      Suresh Siddha <suresh.b.siddha@intel.com>
   5 */
   6
   7#ifndef _ASM_IA64_IA64REGS_H
   8#define _ASM_IA64_IA64REGS_H
   9
  10/*
  11 * Register Names for getreg() and setreg().
  12 *
  13 * The "magic" numbers happen to match the values used by the Intel compiler's
  14 * getreg()/setreg() intrinsics.
  15 */
  16
  17/* Special Registers */
  18
  19#define _IA64_REG_IP            1016    /* getreg only */
  20#define _IA64_REG_PSR           1019
  21#define _IA64_REG_PSR_L         1019
  22
  23/* General Integer Registers */
  24
  25#define _IA64_REG_GP            1025    /* R1 */
  26#define _IA64_REG_R8            1032    /* R8 */
  27#define _IA64_REG_R9            1033    /* R9 */
  28#define _IA64_REG_SP            1036    /* R12 */
  29#define _IA64_REG_TP            1037    /* R13 */
  30
  31/* Application Registers */
  32
  33#define _IA64_REG_AR_KR0        3072
  34#define _IA64_REG_AR_KR1        3073
  35#define _IA64_REG_AR_KR2        3074
  36#define _IA64_REG_AR_KR3        3075
  37#define _IA64_REG_AR_KR4        3076
  38#define _IA64_REG_AR_KR5        3077
  39#define _IA64_REG_AR_KR6        3078
  40#define _IA64_REG_AR_KR7        3079
  41#define _IA64_REG_AR_RSC        3088
  42#define _IA64_REG_AR_BSP        3089
  43#define _IA64_REG_AR_BSPSTORE   3090
  44#define _IA64_REG_AR_RNAT       3091
  45#define _IA64_REG_AR_FCR        3093
  46#define _IA64_REG_AR_EFLAG      3096
  47#define _IA64_REG_AR_CSD        3097
  48#define _IA64_REG_AR_SSD        3098
  49#define _IA64_REG_AR_CFLAG      3099
  50#define _IA64_REG_AR_FSR        3100
  51#define _IA64_REG_AR_FIR        3101
  52#define _IA64_REG_AR_FDR        3102
  53#define _IA64_REG_AR_CCV        3104
  54#define _IA64_REG_AR_UNAT       3108
  55#define _IA64_REG_AR_FPSR       3112
  56#define _IA64_REG_AR_ITC        3116
  57#define _IA64_REG_AR_PFS        3136
  58#define _IA64_REG_AR_LC         3137
  59#define _IA64_REG_AR_EC         3138
  60
  61/* Control Registers */
  62
  63#define _IA64_REG_CR_DCR        4096
  64#define _IA64_REG_CR_ITM        4097
  65#define _IA64_REG_CR_IVA        4098
  66#define _IA64_REG_CR_PTA        4104
  67#define _IA64_REG_CR_IPSR       4112
  68#define _IA64_REG_CR_ISR        4113
  69#define _IA64_REG_CR_IIP        4115
  70#define _IA64_REG_CR_IFA        4116
  71#define _IA64_REG_CR_ITIR       4117
  72#define _IA64_REG_CR_IIPA       4118
  73#define _IA64_REG_CR_IFS        4119
  74#define _IA64_REG_CR_IIM        4120
  75#define _IA64_REG_CR_IHA        4121
  76#define _IA64_REG_CR_LID        4160
  77#define _IA64_REG_CR_IVR        4161    /* getreg only */
  78#define _IA64_REG_CR_TPR        4162
  79#define _IA64_REG_CR_EOI        4163
  80#define _IA64_REG_CR_IRR0       4164    /* getreg only */
  81#define _IA64_REG_CR_IRR1       4165    /* getreg only */
  82#define _IA64_REG_CR_IRR2       4166    /* getreg only */
  83#define _IA64_REG_CR_IRR3       4167    /* getreg only */
  84#define _IA64_REG_CR_ITV        4168
  85#define _IA64_REG_CR_PMV        4169
  86#define _IA64_REG_CR_CMCV       4170
  87#define _IA64_REG_CR_LRR0       4176
  88#define _IA64_REG_CR_LRR1       4177
  89
  90/* Indirect Registers for getindreg() and setindreg() */
  91
  92#define _IA64_REG_INDR_CPUID    9000    /* getindreg only */
  93#define _IA64_REG_INDR_DBR      9001
  94#define _IA64_REG_INDR_IBR      9002
  95#define _IA64_REG_INDR_PKR      9003
  96#define _IA64_REG_INDR_PMC      9004
  97#define _IA64_REG_INDR_PMD      9005
  98#define _IA64_REG_INDR_RR       9006
  99
 100#endif /* _ASM_IA64_IA64REGS_H */
 101