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7#ifndef _ASM_DMA_MAPPING_H
8#define _ASM_DMA_MAPPING_H
9#ifdef __KERNEL__
10
11#include <linux/types.h>
12#include <linux/cache.h>
13
14#include <linux/mm.h>
15#include <linux/scatterlist.h>
16#include <linux/dma-attrs.h>
17#include <linux/dma-debug.h>
18#include <asm/io.h>
19#include <asm/swiotlb.h>
20
21#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
22
23
24extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
25 dma_addr_t *dma_handle, gfp_t flag,
26 struct dma_attrs *attrs);
27extern void dma_direct_free_coherent(struct device *dev, size_t size,
28 void *vaddr, dma_addr_t dma_handle,
29 struct dma_attrs *attrs);
30extern int dma_direct_mmap_coherent(struct device *dev,
31 struct vm_area_struct *vma,
32 void *cpu_addr, dma_addr_t handle,
33 size_t size, struct dma_attrs *attrs);
34
35#ifdef CONFIG_NOT_COHERENT_CACHE
36
37
38
39
40
41
42
43struct device;
44extern void *__dma_alloc_coherent(struct device *dev, size_t size,
45 dma_addr_t *handle, gfp_t gfp);
46extern void __dma_free_coherent(size_t size, void *vaddr);
47extern void __dma_sync(void *vaddr, size_t size, int direction);
48extern void __dma_sync_page(struct page *page, unsigned long offset,
49 size_t size, int direction);
50extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
51
52#else
53
54
55
56
57#define __dma_alloc_coherent(dev, gfp, size, handle) NULL
58#define __dma_free_coherent(size, addr) ((void)0)
59#define __dma_sync(addr, size, rw) ((void)0)
60#define __dma_sync_page(pg, off, sz, rw) ((void)0)
61
62#endif
63
64static inline unsigned long device_to_mask(struct device *dev)
65{
66 if (dev->dma_mask && *dev->dma_mask)
67 return *dev->dma_mask;
68
69 return 0xfffffffful;
70}
71
72
73
74
75#ifdef CONFIG_PPC64
76extern struct dma_map_ops dma_iommu_ops;
77#endif
78extern struct dma_map_ops dma_direct_ops;
79
80static inline struct dma_map_ops *get_dma_ops(struct device *dev)
81{
82
83
84
85
86
87 if (unlikely(dev == NULL))
88 return NULL;
89
90 return dev->archdata.dma_ops;
91}
92
93static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
94{
95 dev->archdata.dma_ops = ops;
96}
97
98
99
100
101
102
103
104
105
106static inline dma_addr_t get_dma_offset(struct device *dev)
107{
108 if (dev)
109 return dev->archdata.dma_data.dma_offset;
110
111 return PCI_DRAM_OFFSET;
112}
113
114static inline void set_dma_offset(struct device *dev, dma_addr_t off)
115{
116 if (dev)
117 dev->archdata.dma_data.dma_offset = off;
118}
119
120
121#define flush_write_buffers()
122
123#include <asm-generic/dma-mapping-common.h>
124
125static inline int dma_supported(struct device *dev, u64 mask)
126{
127 struct dma_map_ops *dma_ops = get_dma_ops(dev);
128
129 if (unlikely(dma_ops == NULL))
130 return 0;
131 if (dma_ops->dma_supported == NULL)
132 return 1;
133 return dma_ops->dma_supported(dev, mask);
134}
135
136extern int dma_set_mask(struct device *dev, u64 dma_mask);
137
138#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
139
140static inline void *dma_alloc_attrs(struct device *dev, size_t size,
141 dma_addr_t *dma_handle, gfp_t flag,
142 struct dma_attrs *attrs)
143{
144 struct dma_map_ops *dma_ops = get_dma_ops(dev);
145 void *cpu_addr;
146
147 BUG_ON(!dma_ops);
148
149 cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs);
150
151 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
152
153 return cpu_addr;
154}
155
156#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
157
158static inline void dma_free_attrs(struct device *dev, size_t size,
159 void *cpu_addr, dma_addr_t dma_handle,
160 struct dma_attrs *attrs)
161{
162 struct dma_map_ops *dma_ops = get_dma_ops(dev);
163
164 BUG_ON(!dma_ops);
165
166 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
167
168 dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
169}
170
171static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
172{
173 struct dma_map_ops *dma_ops = get_dma_ops(dev);
174
175 debug_dma_mapping_error(dev, dma_addr);
176 if (dma_ops->mapping_error)
177 return dma_ops->mapping_error(dev, dma_addr);
178
179#ifdef CONFIG_PPC64
180 return (dma_addr == DMA_ERROR_CODE);
181#else
182 return 0;
183#endif
184}
185
186static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
187{
188#ifdef CONFIG_SWIOTLB
189 struct dev_archdata *sd = &dev->archdata;
190
191 if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
192 return 0;
193#endif
194
195 if (!dev->dma_mask)
196 return 0;
197
198 return addr + size - 1 <= *dev->dma_mask;
199}
200
201static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
202{
203 return paddr + get_dma_offset(dev);
204}
205
206static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
207{
208 return daddr - get_dma_offset(dev);
209}
210
211#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
212#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
213
214#define ARCH_HAS_DMA_MMAP_COHERENT
215
216static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
217 enum dma_data_direction direction)
218{
219 BUG_ON(direction == DMA_NONE);
220 __dma_sync(vaddr, size, (int)direction);
221}
222
223#endif
224#endif
225