1
2
3
4
5#include <linux/module.h>
6#include <linux/string.h>
7#include <linux/sched.h>
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/reboot.h>
11#include <linux/delay.h>
12#include <linux/initrd.h>
13#include <linux/tty.h>
14#include <linux/bootmem.h>
15#include <linux/seq_file.h>
16#include <linux/root_dev.h>
17#include <linux/cpu.h>
18#include <linux/console.h>
19#include <linux/memblock.h>
20
21#include <asm/io.h>
22#include <asm/prom.h>
23#include <asm/processor.h>
24#include <asm/pgtable.h>
25#include <asm/setup.h>
26#include <asm/smp.h>
27#include <asm/elf.h>
28#include <asm/cputable.h>
29#include <asm/bootx.h>
30#include <asm/btext.h>
31#include <asm/machdep.h>
32#include <asm/uaccess.h>
33#include <asm/pmac_feature.h>
34#include <asm/sections.h>
35#include <asm/nvram.h>
36#include <asm/xmon.h>
37#include <asm/time.h>
38#include <asm/serial.h>
39#include <asm/udbg.h>
40#include <asm/mmu_context.h>
41#include <asm/epapr_hcalls.h>
42
43#include "setup.h"
44
45#define DBG(fmt...)
46
47extern void bootx_init(unsigned long r4, unsigned long phys);
48
49int boot_cpuid = -1;
50EXPORT_SYMBOL_GPL(boot_cpuid);
51int boot_cpuid_phys;
52EXPORT_SYMBOL_GPL(boot_cpuid_phys);
53
54int smp_hw_index[NR_CPUS];
55
56unsigned long ISA_DMA_THRESHOLD;
57unsigned int DMA_MODE_READ;
58unsigned int DMA_MODE_WRITE;
59
60#ifdef CONFIG_VGA_CONSOLE
61unsigned long vgacon_remap_base;
62EXPORT_SYMBOL(vgacon_remap_base);
63#endif
64
65
66
67
68
69int dcache_bsize;
70int icache_bsize;
71int ucache_bsize;
72
73
74
75
76
77
78
79
80
81
82notrace unsigned long __init early_init(unsigned long dt_ptr)
83{
84 unsigned long offset = reloc_offset();
85 struct cpu_spec *spec;
86
87
88
89 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
90 __bss_stop - __bss_start);
91
92
93
94
95
96 spec = identify_cpu(offset, mfspr(SPRN_PVR));
97
98 do_feature_fixups(spec->cpu_features,
99 PTRRELOC(&__start___ftr_fixup),
100 PTRRELOC(&__stop___ftr_fixup));
101
102 do_feature_fixups(spec->mmu_features,
103 PTRRELOC(&__start___mmu_ftr_fixup),
104 PTRRELOC(&__stop___mmu_ftr_fixup));
105
106 do_lwsync_fixups(spec->cpu_features,
107 PTRRELOC(&__start___lwsync_fixup),
108 PTRRELOC(&__stop___lwsync_fixup));
109
110 do_final_fixups();
111
112 return KERNELBASE + offset;
113}
114
115
116
117
118
119
120
121
122notrace void __init machine_init(u64 dt_ptr)
123{
124 lockdep_init();
125
126
127 udbg_early_init();
128
129
130 early_init_devtree(__va(dt_ptr));
131
132 epapr_paravirt_early_init();
133
134 early_init_mmu();
135
136 probe_machine();
137
138 setup_kdump_trampoline();
139
140#ifdef CONFIG_6xx
141 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
142 cpu_has_feature(CPU_FTR_CAN_NAP))
143 ppc_md.power_save = ppc6xx_idle;
144#endif
145
146#ifdef CONFIG_E500
147 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
148 cpu_has_feature(CPU_FTR_CAN_NAP))
149 ppc_md.power_save = e500_idle;
150#endif
151 if (ppc_md.progress)
152 ppc_md.progress("id mach(): done", 0x200);
153}
154
155
156int __init ppc_setup_l2cr(char *str)
157{
158 if (cpu_has_feature(CPU_FTR_L2CR)) {
159 unsigned long val = simple_strtoul(str, NULL, 0);
160 printk(KERN_INFO "l2cr set to %lx\n", val);
161 _set_L2CR(0);
162 _set_L2CR(val);
163 }
164 return 1;
165}
166__setup("l2cr=", ppc_setup_l2cr);
167
168
169int __init ppc_setup_l3cr(char *str)
170{
171 if (cpu_has_feature(CPU_FTR_L3CR)) {
172 unsigned long val = simple_strtoul(str, NULL, 0);
173 printk(KERN_INFO "l3cr set to %lx\n", val);
174 _set_L3CR(val);
175 }
176 return 1;
177}
178__setup("l3cr=", ppc_setup_l3cr);
179
180#ifdef CONFIG_GENERIC_NVRAM
181
182
183unsigned char nvram_read_byte(int addr)
184{
185 if (ppc_md.nvram_read_val)
186 return ppc_md.nvram_read_val(addr);
187 return 0xff;
188}
189EXPORT_SYMBOL(nvram_read_byte);
190
191void nvram_write_byte(unsigned char val, int addr)
192{
193 if (ppc_md.nvram_write_val)
194 ppc_md.nvram_write_val(addr, val);
195}
196EXPORT_SYMBOL(nvram_write_byte);
197
198ssize_t nvram_get_size(void)
199{
200 if (ppc_md.nvram_size)
201 return ppc_md.nvram_size();
202 return -1;
203}
204EXPORT_SYMBOL(nvram_get_size);
205
206void nvram_sync(void)
207{
208 if (ppc_md.nvram_sync)
209 ppc_md.nvram_sync();
210}
211EXPORT_SYMBOL(nvram_sync);
212
213#endif
214
215int __init ppc_init(void)
216{
217
218 if (ppc_md.progress)
219 ppc_md.progress(" ", 0xffff);
220
221
222 if (ppc_md.init != NULL) {
223 ppc_md.init();
224 }
225 return 0;
226}
227
228arch_initcall(ppc_init);
229
230static void __init irqstack_early_init(void)
231{
232 unsigned int i;
233
234
235
236 for_each_possible_cpu(i) {
237 softirq_ctx[i] = (struct thread_info *)
238 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
239 hardirq_ctx[i] = (struct thread_info *)
240 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
241 }
242}
243
244#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
245static void __init exc_lvl_early_init(void)
246{
247 unsigned int i, hw_cpu;
248
249
250
251 for_each_possible_cpu(i) {
252 hw_cpu = get_hard_smp_processor_id(i);
253 critirq_ctx[hw_cpu] = (struct thread_info *)
254 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
255#ifdef CONFIG_BOOKE
256 dbgirq_ctx[hw_cpu] = (struct thread_info *)
257 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
258 mcheckirq_ctx[hw_cpu] = (struct thread_info *)
259 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
260#endif
261 }
262}
263#else
264#define exc_lvl_early_init()
265#endif
266
267
268void __init setup_arch(char **cmdline_p)
269{
270 *cmdline_p = cmd_line;
271
272
273 loops_per_jiffy = 500000000 / HZ;
274
275 unflatten_device_tree();
276 check_for_initrd();
277
278 if (ppc_md.init_early)
279 ppc_md.init_early();
280
281 find_legacy_serial_ports();
282
283 smp_setup_cpu_maps();
284
285
286 register_early_udbg_console();
287
288 xmon_setup();
289
290
291
292
293
294
295 dcache_bsize = cur_cpu_spec->dcache_bsize;
296 icache_bsize = cur_cpu_spec->icache_bsize;
297 ucache_bsize = 0;
298 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
299 ucache_bsize = icache_bsize = dcache_bsize;
300
301
302 panic_timeout = 180;
303
304 if (ppc_md.panic)
305 setup_panic();
306
307 init_mm.start_code = (unsigned long)_stext;
308 init_mm.end_code = (unsigned long) _etext;
309 init_mm.end_data = (unsigned long) _edata;
310 init_mm.brk = klimit;
311
312 exc_lvl_early_init();
313
314 irqstack_early_init();
315
316
317 do_init_bootmem();
318 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
319
320#ifdef CONFIG_DUMMY_CONSOLE
321 conswitchp = &dummy_con;
322#endif
323
324 if (ppc_md.setup_arch)
325 ppc_md.setup_arch();
326 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
327
328 paging_init();
329
330
331 mmu_context_init();
332}
333