LXR linux/arch/powerpc/platforms/85xx/corenet

   1/*
   2 * Corenet based SoC DS Setup
   3 *
   4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
   5 *
   6 * Copyright 2009-2011 Freescale Semiconductor Inc.
   7 *
   8 * This program is free software; you can redistribute  it and/or modify it
   9 * under  the terms of  the GNU General  Public License as published by the
  10 * Free Software Foundation;  either version 2 of the  License, or (at your
  11 * option) any later version.
  12 */
  13
  14#include <linux/kernel.h>
  15#include <linux/pci.h>
  16#include <linux/kdev_t.h>
  17#include <linux/delay.h>
  18#include <linux/interrupt.h>
  19
  20#include <asm/time.h>
  21#include <asm/machdep.h>
  22#include <asm/pci-bridge.h>
  23#include <asm/ppc-pci.h>
  24#include <mm/mmu_decl.h>
  25#include <asm/prom.h>
  26#include <asm/udbg.h>
  27#include <asm/mpic.h>
  28
  29#include <linux/of_platform.h>
  30#include <sysdev/fsl_soc.h>
  31#include <sysdev/fsl_pci.h>
  32#include "smp.h"
  33
  34void __init corenet_ds_pic_init(void)
  35{
  36        struct mpic *mpic;
  37        unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
  38                MPIC_NO_RESET;
  39
  40        if (ppc_md.get_irq == mpic_get_coreint_irq)
  41                flags |= MPIC_ENABLE_COREINT;
  42
  43        mpic = mpic_alloc(NULL, 0, flags, 0, 512, " OpenPIC  ");
  44        BUG_ON(mpic == NULL);
  45
  46        mpic_init(mpic);
  47}
  48
  49/*
  50 * Setup the architecture
  51 */
  52void __init corenet_ds_setup_arch(void)
  53{
  54        mpc85xx_smp_init();
  55
  56        swiotlb_detect_4g();
  57
  58        pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
  59}
  60
  61static const struct of_device_id of_device_ids[] = {
  62        {
  63                .compatible     = "simple-bus"
  64        },
  65        {
  66                .compatible     = "fsl,srio",
  67        },
  68        {
  69                .compatible     = "fsl,p4080-pcie",
  70        },
  71        {
  72                .compatible     = "fsl,qoriq-pcie-v2.2",
  73        },
  74        {
  75                .compatible     = "fsl,qoriq-pcie-v2.3",
  76        },
  77        {
  78                .compatible     = "fsl,qoriq-pcie-v2.4",
  79        },
  80        {
  81                .compatible     = "fsl,qoriq-pcie-v3.0",
  82        },
  83        /* The following two are for the Freescale hypervisor */
  84        {
  85                .name           = "hypervisor",
  86        },
  87        {
  88                .name           = "handles",
  89        },
  90        {}
  91};
  92
  93int __init corenet_ds_publish_devices(void)
  94{
  95        return of_platform_bus_probe(NULL, of_device_ids, NULL);
  96}
  97