1
2
3
4
5
6
7
8
9
10
11
12
13
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20#include <linux/module.h>
21#include <linux/fsl_devices.h>
22#include <linux/of_platform.h>
23#include <linux/of_device.h>
24
25#include <asm/time.h>
26#include <asm/machdep.h>
27#include <asm/pci-bridge.h>
28#include <mm/mmu_decl.h>
29#include <asm/prom.h>
30#include <asm/udbg.h>
31#include <asm/mpic.h>
32#include "smp.h"
33
34#include <sysdev/fsl_soc.h>
35#include <sysdev/fsl_pci.h>
36
37#include "mpc85xx.h"
38
39
40
41
42
43
44static void __init mpc85xx_rds_setup_arch(void)
45{
46 struct device_node *np;
47
48 if (ppc_md.progress)
49 ppc_md.progress("p1023_rds_setup_arch()", 0);
50
51
52 np = of_find_node_by_name(NULL, "bcsr");
53 if (np != NULL) {
54 static u8 __iomem *bcsr_regs;
55
56 bcsr_regs = of_iomap(np, 0);
57 of_node_put(np);
58
59 if (!bcsr_regs) {
60 printk(KERN_ERR
61 "BCSR: Failed to map bcsr register space\n");
62 return;
63 } else {
64#define BCSR15_I2C_BUS0_SEG_CLR 0x07
65#define BCSR15_I2C_BUS0_SEG2 0x02
66
67
68
69
70
71
72
73#ifdef CONFIG_RTC_CLASS
74
75 clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR);
76 setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2);
77#endif
78
79 iounmap(bcsr_regs);
80 }
81 }
82
83 mpc85xx_smp_init();
84
85 fsl_pci_assign_primary();
86}
87
88machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices);
89machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices);
90
91static void __init mpc85xx_rds_pic_init(void)
92{
93 struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
94 MPIC_SINGLE_DEST_CPU,
95 0, 256, " OpenPIC ");
96
97 BUG_ON(mpic == NULL);
98
99 mpic_init(mpic);
100}
101
102static int __init p1023_rds_probe(void)
103{
104 unsigned long root = of_get_flat_dt_root();
105
106 return of_flat_dt_is_compatible(root, "fsl,P1023RDS");
107
108}
109
110static int __init p1023_rdb_probe(void)
111{
112 unsigned long root = of_get_flat_dt_root();
113
114 return of_flat_dt_is_compatible(root, "fsl,P1023RDB");
115
116}
117
118define_machine(p1023_rds) {
119 .name = "P1023 RDS",
120 .probe = p1023_rds_probe,
121 .setup_arch = mpc85xx_rds_setup_arch,
122 .init_IRQ = mpc85xx_rds_pic_init,
123 .get_irq = mpic_get_irq,
124 .restart = fsl_rstcr_restart,
125 .calibrate_decr = generic_calibrate_decr,
126 .progress = udbg_progress,
127#ifdef CONFIG_PCI
128 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
129#endif
130};
131
132define_machine(p1023_rdb) {
133 .name = "P1023 RDB",
134 .probe = p1023_rdb_probe,
135 .setup_arch = mpc85xx_rds_setup_arch,
136 .init_IRQ = mpc85xx_rds_pic_init,
137 .get_irq = mpic_get_irq,
138 .restart = fsl_rstcr_restart,
139 .calibrate_decr = generic_calibrate_decr,
140 .progress = udbg_progress,
141#ifdef CONFIG_PCI
142 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
143#endif
144};
145