LXR linux/arch/powerpc/platforms/85xx/p4080

   1/*
   2 * P4080 DS Setup
   3 *
   4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
   5 *
   6 * Copyright 2009 Freescale Semiconductor Inc.
   7 *
   8 * This program is free software; you can redistribute  it and/or modify it
   9 * under  the terms of  the GNU General  Public License as published by the
  10 * Free Software Foundation;  either version 2 of the  License, or (at your
  11 * option) any later version.
  12 */
  13
  14#include <linux/kernel.h>
  15#include <linux/pci.h>
  16#include <linux/kdev_t.h>
  17#include <linux/delay.h>
  18#include <linux/interrupt.h>
  19
  20#include <asm/time.h>
  21#include <asm/machdep.h>
  22#include <asm/pci-bridge.h>
  23#include <mm/mmu_decl.h>
  24#include <asm/prom.h>
  25#include <asm/udbg.h>
  26#include <asm/mpic.h>
  27
  28#include <linux/of_platform.h>
  29#include <sysdev/fsl_soc.h>
  30#include <sysdev/fsl_pci.h>
  31#include <asm/ehv_pic.h>
  32
  33#include "corenet_ds.h"
  34
  35/*
  36 * Called very early, device-tree isn't unflattened
  37 */
  38static int __init p4080_ds_probe(void)
  39{
  40        unsigned long root = of_get_flat_dt_root();
  41#ifdef CONFIG_SMP
  42        extern struct smp_ops_t smp_85xx_ops;
  43#endif
  44
  45        if (of_flat_dt_is_compatible(root, "fsl,P4080DS"))
  46                return 1;
  47
  48        /* Check if we're running under the Freescale hypervisor */
  49        if (of_flat_dt_is_compatible(root, "fsl,P4080DS-hv")) {
  50                ppc_md.init_IRQ = ehv_pic_init;
  51                ppc_md.get_irq = ehv_pic_get_irq;
  52                ppc_md.restart = fsl_hv_restart;
  53                ppc_md.power_off = fsl_hv_halt;
  54                ppc_md.halt = fsl_hv_halt;
  55#ifdef CONFIG_SMP
  56                /*
  57                 * Disable the timebase sync operations because we can't write
  58                 * to the timebase registers under the hypervisor.
  59                  */
  60                smp_85xx_ops.give_timebase = NULL;
  61                smp_85xx_ops.take_timebase = NULL;
  62#endif
  63                return 1;
  64        }
  65
  66        return 0;
  67}
  68
  69define_machine(p4080_ds) {
  70        .name                   = "P4080 DS",
  71        .probe                  = p4080_ds_probe,
  72        .setup_arch             = corenet_ds_setup_arch,
  73        .init_IRQ               = corenet_ds_pic_init,
  74#ifdef CONFIG_PCI
  75        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
  76#endif
  77        .get_irq                = mpic_get_coreint_irq,
  78        .restart                = fsl_rstcr_restart,
  79        .calibrate_decr         = generic_calibrate_decr,
  80        .progress               = udbg_progress,
  81        .power_save             = e500_idle,
  82};
  83
  84machine_arch_initcall(p4080_ds, corenet_ds_publish_devices);
  85#ifdef CONFIG_SWIOTLB
  86machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier);
  87#endif
  88