LXR linux/arch/powerpc/platforms/85xx/p5040

   1/*
   2 * P5040 DS Setup
   3 *
   4 * Copyright 2009-2010 Freescale Semiconductor Inc.
   5 *
   6 * This program is free software; you can redistribute  it and/or modify it
   7 * under  the terms of  the GNU General  Public License as published by the
   8 * Free Software Foundation;  either version 2 of the  License, or (at your
   9 * option) any later version.
  10 */
  11
  12#include <linux/kernel.h>
  13#include <linux/pci.h>
  14
  15#include <asm/machdep.h>
  16#include <asm/udbg.h>
  17#include <asm/mpic.h>
  18
  19#include <linux/of_fdt.h>
  20
  21#include <sysdev/fsl_soc.h>
  22#include <sysdev/fsl_pci.h>
  23#include <asm/ehv_pic.h>
  24
  25#include "corenet_ds.h"
  26
  27/*
  28 * Called very early, device-tree isn't unflattened
  29 */
  30static int __init p5040_ds_probe(void)
  31{
  32        unsigned long root = of_get_flat_dt_root();
  33#ifdef CONFIG_SMP
  34        extern struct smp_ops_t smp_85xx_ops;
  35#endif
  36
  37        if (of_flat_dt_is_compatible(root, "fsl,P5040DS"))
  38                return 1;
  39
  40        /* Check if we're running under the Freescale hypervisor */
  41        if (of_flat_dt_is_compatible(root, "fsl,P5040DS-hv")) {
  42                ppc_md.init_IRQ = ehv_pic_init;
  43                ppc_md.get_irq = ehv_pic_get_irq;
  44                ppc_md.restart = fsl_hv_restart;
  45                ppc_md.power_off = fsl_hv_halt;
  46                ppc_md.halt = fsl_hv_halt;
  47#ifdef CONFIG_SMP
  48                /*
  49                 * Disable the timebase sync operations because we can't write
  50                 * to the timebase registers under the hypervisor.
  51                  */
  52                smp_85xx_ops.give_timebase = NULL;
  53                smp_85xx_ops.take_timebase = NULL;
  54#endif
  55                return 1;
  56        }
  57
  58        return 0;
  59}
  60
  61define_machine(p5040_ds) {
  62        .name                   = "P5040 DS",
  63        .probe                  = p5040_ds_probe,
  64        .setup_arch             = corenet_ds_setup_arch,
  65        .init_IRQ               = corenet_ds_pic_init,
  66#ifdef CONFIG_PCI
  67        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
  68#endif
  69        .get_irq                = mpic_get_coreint_irq,
  70        .restart                = fsl_rstcr_restart,
  71        .calibrate_decr         = generic_calibrate_decr,
  72        .progress               = udbg_progress,
  73#ifdef CONFIG_PPC64
  74        .power_save             = book3e_idle,
  75#else
  76        .power_save             = e500_idle,
  77#endif
  78};
  79
  80machine_arch_initcall(p5040_ds, corenet_ds_publish_devices);
  81
  82#ifdef CONFIG_SWIOTLB
  83machine_arch_initcall(p5040_ds, swiotlb_setup_bus_notifier);
  84#endif
  85