1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23#include <linux/stddef.h>
24#include <linux/kernel.h>
25#include <linux/pci.h>
26#include <linux/kdev_t.h>
27#include <linux/delay.h>
28#include <linux/seq_file.h>
29#include <linux/of_platform.h>
30
31#include <asm/time.h>
32#include <asm/machdep.h>
33#include <asm/pci-bridge.h>
34#include <asm/mpic.h>
35#include <asm/prom.h>
36#include <mm/mmu_decl.h>
37#include <asm/udbg.h>
38
39#include <sysdev/fsl_soc.h>
40#include <sysdev/fsl_pci.h>
41
42#include "mpc85xx.h"
43
44#ifdef CONFIG_CPM2
45#include <asm/cpm2.h>
46#endif
47
48static void __init stx_gp3_pic_init(void)
49{
50 struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
51 0, 256, " OpenPIC ");
52 BUG_ON(mpic == NULL);
53 mpic_init(mpic);
54
55 mpc85xx_cpm2_pic_init();
56}
57
58
59
60
61static void __init stx_gp3_setup_arch(void)
62{
63 if (ppc_md.progress)
64 ppc_md.progress("stx_gp3_setup_arch()", 0);
65
66 fsl_pci_assign_primary();
67
68#ifdef CONFIG_CPM2
69 cpm2_reset();
70#endif
71}
72
73static void stx_gp3_show_cpuinfo(struct seq_file *m)
74{
75 uint pvid, svid, phid1;
76
77 pvid = mfspr(SPRN_PVR);
78 svid = mfspr(SPRN_SVR);
79
80 seq_printf(m, "Vendor\t\t: RPC Electronics STx\n");
81 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
82 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
83
84
85 phid1 = mfspr(SPRN_HID1);
86 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
87}
88
89machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices);
90
91
92
93
94static int __init stx_gp3_probe(void)
95{
96 unsigned long root = of_get_flat_dt_root();
97
98 return of_flat_dt_is_compatible(root, "stx,gp3-8560");
99}
100
101define_machine(stx_gp3) {
102 .name = "STX GP3",
103 .probe = stx_gp3_probe,
104 .setup_arch = stx_gp3_setup_arch,
105 .init_IRQ = stx_gp3_pic_init,
106 .show_cpuinfo = stx_gp3_show_cpuinfo,
107 .get_irq = mpic_get_irq,
108 .restart = fsl_rstcr_restart,
109 .calibrate_decr = generic_calibrate_decr,
110 .progress = udbg_progress,
111};
112