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10#include <linux/kernel_stat.h>
11#include <linux/interrupt.h>
12#include <linux/seq_file.h>
13#include <linux/proc_fs.h>
14#include <linux/profile.h>
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/ftrace.h>
18#include <linux/errno.h>
19#include <linux/slab.h>
20#include <linux/cpu.h>
21#include <asm/irq_regs.h>
22#include <asm/cputime.h>
23#include <asm/lowcore.h>
24#include <asm/irq.h>
25#include <asm/hw_irq.h>
26#include "entry.h"
27
28DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
29EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
30
31struct irq_class {
32 char *name;
33 char *desc;
34};
35
36
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38
39
40
41
42
43
44
45
46static const struct irq_class irqclass_main_desc[NR_IRQS_BASE] = {
47 [EXT_INTERRUPT] = {.name = "EXT"},
48 [IO_INTERRUPT] = {.name = "I/O"},
49 [THIN_INTERRUPT] = {.name = "AIO"},
50};
51
52
53
54
55
56
57static const struct irq_class irqclass_sub_desc[NR_ARCH_IRQS] = {
58 [IRQEXT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
59 [IRQEXT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
60 [IRQEXT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
61 [IRQEXT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
62 [IRQEXT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
63 [IRQEXT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
64 [IRQEXT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
65 [IRQEXT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
66 [IRQEXT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
67 [IRQEXT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
68 [IRQEXT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
69 [IRQEXT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
70 [IRQEXT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
71 [IRQIO_CIO] = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
72 [IRQIO_QAI] = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
73 [IRQIO_DAS] = {.name = "DAS", .desc = "[I/O] DASD"},
74 [IRQIO_C15] = {.name = "C15", .desc = "[I/O] 3215"},
75 [IRQIO_C70] = {.name = "C70", .desc = "[I/O] 3270"},
76 [IRQIO_TAP] = {.name = "TAP", .desc = "[I/O] Tape"},
77 [IRQIO_VMR] = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
78 [IRQIO_LCS] = {.name = "LCS", .desc = "[I/O] LCS"},
79 [IRQIO_CLW] = {.name = "CLW", .desc = "[I/O] CLAW"},
80 [IRQIO_CTC] = {.name = "CTC", .desc = "[I/O] CTC"},
81 [IRQIO_APB] = {.name = "APB", .desc = "[I/O] AP Bus"},
82 [IRQIO_ADM] = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
83 [IRQIO_CSC] = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
84 [IRQIO_PCI] = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
85 [IRQIO_MSI] = {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
86 [IRQIO_VIR] = {.name = "VIR", .desc = "[I/O] Virtual I/O Devices"},
87 [NMI_NMI] = {.name = "NMI", .desc = "[NMI] Machine Check"},
88 [CPU_RST] = {.name = "RST", .desc = "[CPU] CPU Restart"},
89};
90
91void __init init_IRQ(void)
92{
93 irq_reserve_irqs(0, THIN_INTERRUPT);
94 init_cio_interrupts();
95 init_airq_interrupts();
96 init_ext_interrupts();
97}
98
99void do_IRQ(struct pt_regs *regs, int irq)
100{
101 struct pt_regs *old_regs;
102
103 old_regs = set_irq_regs(regs);
104 irq_enter();
105 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
106
107 clock_comparator_work();
108 generic_handle_irq(irq);
109 irq_exit();
110 set_irq_regs(old_regs);
111}
112
113
114
115
116int show_interrupts(struct seq_file *p, void *v)
117{
118 int irq = *(loff_t *) v;
119 int cpu;
120
121 get_online_cpus();
122 if (irq == 0) {
123 seq_puts(p, " ");
124 for_each_online_cpu(cpu)
125 seq_printf(p, "CPU%d ", cpu);
126 seq_putc(p, '\n');
127 goto out;
128 }
129 if (irq < NR_IRQS) {
130 if (irq >= NR_IRQS_BASE)
131 goto out;
132 seq_printf(p, "%s: ", irqclass_main_desc[irq].name);
133 for_each_online_cpu(cpu)
134 seq_printf(p, "%10u ", kstat_irqs_cpu(irq, cpu));
135 seq_putc(p, '\n');
136 goto out;
137 }
138 for (irq = 0; irq < NR_ARCH_IRQS; irq++) {
139 seq_printf(p, "%s: ", irqclass_sub_desc[irq].name);
140 for_each_online_cpu(cpu)
141 seq_printf(p, "%10u ",
142 per_cpu(irq_stat, cpu).irqs[irq]);
143 if (irqclass_sub_desc[irq].desc)
144 seq_printf(p, " %s", irqclass_sub_desc[irq].desc);
145 seq_putc(p, '\n');
146 }
147out:
148 put_online_cpus();
149 return 0;
150}
151
152int arch_show_interrupts(struct seq_file *p, int prec)
153{
154 return 0;
155}
156
157
158
159
160asmlinkage void do_softirq(void)
161{
162 unsigned long flags, old, new;
163
164 if (in_interrupt())
165 return;
166
167 local_irq_save(flags);
168
169 if (local_softirq_pending()) {
170
171 asm volatile("la %0,0(15)" : "=a" (old));
172
173 new = S390_lowcore.async_stack;
174 if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
175
176 new -= STACK_FRAME_OVERHEAD;
177 ((struct stack_frame *) new)->back_chain = old;
178
179 asm volatile(" la 15,0(%0)\n"
180 " basr 14,%2\n"
181 " la 15,0(%1)\n"
182 : : "a" (new), "a" (old),
183 "a" (__do_softirq)
184 : "0", "1", "2", "3", "4", "5", "14",
185 "cc", "memory" );
186 } else {
187
188 __do_softirq();
189 }
190 }
191
192 local_irq_restore(flags);
193}
194
195
196
197
198
199static struct hlist_head ext_int_hash[32] ____cacheline_aligned;
200
201struct ext_int_info {
202 ext_int_handler_t handler;
203 struct hlist_node entry;
204 struct rcu_head rcu;
205 u16 code;
206};
207
208
209static DEFINE_SPINLOCK(ext_int_hash_lock);
210
211static inline int ext_hash(u16 code)
212{
213 BUILD_BUG_ON(!is_power_of_2(ARRAY_SIZE(ext_int_hash)));
214
215 return (code + (code >> 9)) & (ARRAY_SIZE(ext_int_hash) - 1);
216}
217
218int register_external_interrupt(u16 code, ext_int_handler_t handler)
219{
220 struct ext_int_info *p;
221 unsigned long flags;
222 int index;
223
224 p = kmalloc(sizeof(*p), GFP_ATOMIC);
225 if (!p)
226 return -ENOMEM;
227 p->code = code;
228 p->handler = handler;
229 index = ext_hash(code);
230
231 spin_lock_irqsave(&ext_int_hash_lock, flags);
232 hlist_add_head_rcu(&p->entry, &ext_int_hash[index]);
233 spin_unlock_irqrestore(&ext_int_hash_lock, flags);
234 return 0;
235}
236EXPORT_SYMBOL(register_external_interrupt);
237
238int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
239{
240 struct ext_int_info *p;
241 unsigned long flags;
242 int index = ext_hash(code);
243
244 spin_lock_irqsave(&ext_int_hash_lock, flags);
245 hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
246 if (p->code == code && p->handler == handler) {
247 hlist_del_rcu(&p->entry);
248 kfree_rcu(p, rcu);
249 }
250 }
251 spin_unlock_irqrestore(&ext_int_hash_lock, flags);
252 return 0;
253}
254EXPORT_SYMBOL(unregister_external_interrupt);
255
256static irqreturn_t do_ext_interrupt(int irq, void *dummy)
257{
258 struct pt_regs *regs = get_irq_regs();
259 struct ext_code ext_code;
260 struct ext_int_info *p;
261 int index;
262
263 ext_code = *(struct ext_code *) ®s->int_code;
264 if (ext_code.code != 0x1004)
265 __get_cpu_var(s390_idle).nohz_delay = 1;
266
267 index = ext_hash(ext_code.code);
268 rcu_read_lock();
269 hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
270 if (unlikely(p->code != ext_code.code))
271 continue;
272 p->handler(ext_code, regs->int_parm, regs->int_parm_long);
273 }
274 rcu_read_unlock();
275 return IRQ_HANDLED;
276}
277
278static struct irqaction external_interrupt = {
279 .name = "EXT",
280 .handler = do_ext_interrupt,
281};
282
283void __init init_ext_interrupts(void)
284{
285 int idx;
286
287 for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
288 INIT_HLIST_HEAD(&ext_int_hash[idx]);
289
290 irq_set_chip_and_handler(EXT_INTERRUPT,
291 &dummy_irq_chip, handle_percpu_irq);
292 setup_irq(EXT_INTERRUPT, &external_interrupt);
293}
294
295static DEFINE_SPINLOCK(irq_subclass_lock);
296static unsigned char irq_subclass_refcount[64];
297
298void irq_subclass_register(enum irq_subclass subclass)
299{
300 spin_lock(&irq_subclass_lock);
301 if (!irq_subclass_refcount[subclass])
302 ctl_set_bit(0, subclass);
303 irq_subclass_refcount[subclass]++;
304 spin_unlock(&irq_subclass_lock);
305}
306EXPORT_SYMBOL(irq_subclass_register);
307
308void irq_subclass_unregister(enum irq_subclass subclass)
309{
310 spin_lock(&irq_subclass_lock);
311 irq_subclass_refcount[subclass]--;
312 if (!irq_subclass_refcount[subclass])
313 ctl_clear_bit(0, subclass);
314 spin_unlock(&irq_subclass_lock);
315}
316EXPORT_SYMBOL(irq_subclass_unregister);
317
