1/* 2 * include/asm-xtensa/io.h 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 2001 - 2005 Tensilica Inc. 9 */ 10 11#ifndef _XTENSA_IO_H 12#define _XTENSA_IO_H 13 14#ifdef __KERNEL__ 15#include <asm/byteorder.h> 16#include <asm/page.h> 17#include <linux/bug.h> 18#include <linux/kernel.h> 19 20#include <linux/types.h> 21 22#define XCHAL_KIO_CACHED_VADDR 0xe0000000 23#define XCHAL_KIO_BYPASS_VADDR 0xf0000000 24#define XCHAL_KIO_PADDR 0xf0000000 25#define XCHAL_KIO_SIZE 0x10000000 26 27#define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x)) 28#define IO_SPACE_LIMIT ~0 29 30#ifdef CONFIG_MMU 31/* 32 * Return the virtual address for the specified bus memory. 33 * Note that we currently don't support any address outside the KIO segment. 34 */ 35static inline void __iomem *ioremap_nocache(unsigned long offset, 36 unsigned long size) 37{ 38 if (offset >= XCHAL_KIO_PADDR 39 && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE) 40 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR); 41 else 42 BUG(); 43} 44 45static inline void __iomem *ioremap_cache(unsigned long offset, 46 unsigned long size) 47{ 48 if (offset >= XCHAL_KIO_PADDR 49 && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE) 50 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR); 51 else 52 BUG(); 53} 54 55#define ioremap_wc ioremap_nocache 56 57static inline void __iomem *ioremap(unsigned long offset, unsigned long size) 58{ 59 return ioremap_nocache(offset, size); 60} 61 62static inline void iounmap(volatile void __iomem *addr) 63{ 64} 65 66#define virt_to_bus virt_to_phys 67#define bus_to_virt phys_to_virt 68 69#endif /* CONFIG_MMU */ 70 71/* 72 * Generic I/O 73 */ 74#define readb_relaxed readb 75#define readw_relaxed readw 76#define readl_relaxed readl 77 78#endif /* __KERNEL__ */ 79 80#include <asm-generic/io.h> 81 82#endif /* _XTENSA_IO_H */ 83