linux/drivers/char/agp/intel-agp.c
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   1/*
   2 * Intel AGPGART routines.
   3 */
   4
   5#include <linux/module.h>
   6#include <linux/pci.h>
   7#include <linux/slab.h>
   8#include <linux/init.h>
   9#include <linux/kernel.h>
  10#include <linux/pagemap.h>
  11#include <linux/agp_backend.h>
  12#include <asm/smp.h>
  13#include "agp.h"
  14#include "intel-agp.h"
  15#include <drm/intel-gtt.h>
  16
  17int intel_agp_enabled;
  18EXPORT_SYMBOL(intel_agp_enabled);
  19
  20static int intel_fetch_size(void)
  21{
  22        int i;
  23        u16 temp;
  24        struct aper_size_info_16 *values;
  25
  26        pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp);
  27        values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
  28
  29        for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
  30                if (temp == values[i].size_value) {
  31                        agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
  32                        agp_bridge->aperture_size_idx = i;
  33                        return values[i].size;
  34                }
  35        }
  36
  37        return 0;
  38}
  39
  40static int __intel_8xx_fetch_size(u8 temp)
  41{
  42        int i;
  43        struct aper_size_info_8 *values;
  44
  45        values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
  46
  47        for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
  48                if (temp == values[i].size_value) {
  49                        agp_bridge->previous_size =
  50                                agp_bridge->current_size = (void *) (values + i);
  51                        agp_bridge->aperture_size_idx = i;
  52                        return values[i].size;
  53                }
  54        }
  55        return 0;
  56}
  57
  58static int intel_8xx_fetch_size(void)
  59{
  60        u8 temp;
  61
  62        pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
  63        return __intel_8xx_fetch_size(temp);
  64}
  65
  66static int intel_815_fetch_size(void)
  67{
  68        u8 temp;
  69
  70        /* Intel 815 chipsets have a _weird_ APSIZE register with only
  71         * one non-reserved bit, so mask the others out ... */
  72        pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
  73        temp &= (1 << 3);
  74
  75        return __intel_8xx_fetch_size(temp);
  76}
  77
  78static void intel_tlbflush(struct agp_memory *mem)
  79{
  80        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2200);
  81        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
  82}
  83
  84
  85static void intel_8xx_tlbflush(struct agp_memory *mem)
  86{
  87        u32 temp;
  88        pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
  89        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7));
  90        pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
  91        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7));
  92}
  93
  94
  95static void intel_cleanup(void)
  96{
  97        u16 temp;
  98        struct aper_size_info_16 *previous_size;
  99
 100        previous_size = A_SIZE_16(agp_bridge->previous_size);
 101        pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 102        pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 103        pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 104}
 105
 106
 107static void intel_8xx_cleanup(void)
 108{
 109        u16 temp;
 110        struct aper_size_info_8 *previous_size;
 111
 112        previous_size = A_SIZE_8(agp_bridge->previous_size);
 113        pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 114        pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 115        pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 116}
 117
 118
 119static int intel_configure(void)
 120{
 121        u32 temp;
 122        u16 temp2;
 123        struct aper_size_info_16 *current_size;
 124
 125        current_size = A_SIZE_16(agp_bridge->current_size);
 126
 127        /* aperture size */
 128        pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 129
 130        /* address to map to */
 131        pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 132        agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 133
 134        /* attbase - aperture base */
 135        pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 136
 137        /* agpctrl */
 138        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 139
 140        /* paccfg/nbxcfg */
 141        pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
 142        pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG,
 143                        (temp2 & ~(1 << 10)) | (1 << 9));
 144        /* clear any possible error conditions */
 145        pci_write_config_byte(agp_bridge->dev, INTEL_ERRSTS + 1, 7);
 146        return 0;
 147}
 148
 149static int intel_815_configure(void)
 150{
 151        u32 temp, addr;
 152        u8 temp2;
 153        struct aper_size_info_8 *current_size;
 154
 155        /* attbase - aperture base */
 156        /* the Intel 815 chipset spec. says that bits 29-31 in the
 157        * ATTBASE register are reserved -> try not to write them */
 158        if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
 159                dev_emerg(&agp_bridge->dev->dev, "gatt bus addr too high");
 160                return -EINVAL;
 161        }
 162
 163        current_size = A_SIZE_8(agp_bridge->current_size);
 164
 165        /* aperture size */
 166        pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 167                        current_size->size_value);
 168
 169        /* address to map to */
 170        pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 171        agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 172
 173        pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
 174        addr &= INTEL_815_ATTBASE_MASK;
 175        addr |= agp_bridge->gatt_bus_addr;
 176        pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
 177
 178        /* agpctrl */
 179        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 180
 181        /* apcont */
 182        pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
 183        pci_write_config_byte(agp_bridge->dev, INTEL_815_APCONT, temp2 | (1 << 1));
 184
 185        /* clear any possible error conditions */
 186        /* Oddness : this chipset seems to have no ERRSTS register ! */
 187        return 0;
 188}
 189
 190static void intel_820_tlbflush(struct agp_memory *mem)
 191{
 192        return;
 193}
 194
 195static void intel_820_cleanup(void)
 196{
 197        u8 temp;
 198        struct aper_size_info_8 *previous_size;
 199
 200        previous_size = A_SIZE_8(agp_bridge->previous_size);
 201        pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
 202        pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
 203                        temp & ~(1 << 1));
 204        pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 205                        previous_size->size_value);
 206}
 207
 208
 209static int intel_820_configure(void)
 210{
 211        u32 temp;
 212        u8 temp2;
 213        struct aper_size_info_8 *current_size;
 214
 215        current_size = A_SIZE_8(agp_bridge->current_size);
 216
 217        /* aperture size */
 218        pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 219
 220        /* address to map to */
 221        pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 222        agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 223
 224        /* attbase - aperture base */
 225        pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 226
 227        /* agpctrl */
 228        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 229
 230        /* global enable aperture access */
 231        /* This flag is not accessed through MCHCFG register as in */
 232        /* i850 chipset. */
 233        pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
 234        pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
 235        /* clear any possible AGP-related error conditions */
 236        pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
 237        return 0;
 238}
 239
 240static int intel_840_configure(void)
 241{
 242        u32 temp;
 243        u16 temp2;
 244        struct aper_size_info_8 *current_size;
 245
 246        current_size = A_SIZE_8(agp_bridge->current_size);
 247
 248        /* aperture size */
 249        pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 250
 251        /* address to map to */
 252        pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 253        agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 254
 255        /* attbase - aperture base */
 256        pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 257
 258        /* agpctrl */
 259        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 260
 261        /* mcgcfg */
 262        pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
 263        pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
 264        /* clear any possible error conditions */
 265        pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
 266        return 0;
 267}
 268
 269static int intel_845_configure(void)
 270{
 271        u32 temp;
 272        u8 temp2;
 273        struct aper_size_info_8 *current_size;
 274
 275        current_size = A_SIZE_8(agp_bridge->current_size);
 276
 277        /* aperture size */
 278        pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 279
 280        if (agp_bridge->apbase_config != 0) {
 281                pci_write_config_dword(agp_bridge->dev, AGP_APBASE,
 282                                       agp_bridge->apbase_config);
 283        } else {
 284                /* address to map to */
 285                pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 286                agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 287                agp_bridge->apbase_config = temp;
 288        }
 289
 290        /* attbase - aperture base */
 291        pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 292
 293        /* agpctrl */
 294        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 295
 296        /* agpm */
 297        pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
 298        pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
 299        /* clear any possible error conditions */
 300        pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
 301        return 0;
 302}
 303
 304static int intel_850_configure(void)
 305{
 306        u32 temp;
 307        u16 temp2;
 308        struct aper_size_info_8 *current_size;
 309
 310        current_size = A_SIZE_8(agp_bridge->current_size);
 311
 312        /* aperture size */
 313        pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 314
 315        /* address to map to */
 316        pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 317        agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 318
 319        /* attbase - aperture base */
 320        pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 321
 322        /* agpctrl */
 323        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 324
 325        /* mcgcfg */
 326        pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
 327        pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
 328        /* clear any possible AGP-related error conditions */
 329        pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
 330        return 0;
 331}
 332
 333static int intel_860_configure(void)
 334{
 335        u32 temp;
 336        u16 temp2;
 337        struct aper_size_info_8 *current_size;
 338
 339        current_size = A_SIZE_8(agp_bridge->current_size);
 340
 341        /* aperture size */
 342        pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 343
 344        /* address to map to */
 345        pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 346        agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 347
 348        /* attbase - aperture base */
 349        pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 350
 351        /* agpctrl */
 352        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 353
 354        /* mcgcfg */
 355        pci_read_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, &temp2);
 356        pci_write_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, temp2 | (1 << 9));
 357        /* clear any possible AGP-related error conditions */
 358        pci_write_config_word(agp_bridge->dev, INTEL_I860_ERRSTS, 0xf700);
 359        return 0;
 360}
 361
 362static int intel_830mp_configure(void)
 363{
 364        u32 temp;
 365        u16 temp2;
 366        struct aper_size_info_8 *current_size;
 367
 368        current_size = A_SIZE_8(agp_bridge->current_size);
 369
 370        /* aperture size */
 371        pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 372
 373        /* address to map to */
 374        pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 375        agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 376
 377        /* attbase - aperture base */
 378        pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 379
 380        /* agpctrl */
 381        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 382
 383        /* gmch */
 384        pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
 385        pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp2 | (1 << 9));
 386        /* clear any possible AGP-related error conditions */
 387        pci_write_config_word(agp_bridge->dev, INTEL_I830_ERRSTS, 0x1c);
 388        return 0;
 389}
 390
 391static int intel_7505_configure(void)
 392{
 393        u32 temp;
 394        u16 temp2;
 395        struct aper_size_info_8 *current_size;
 396
 397        current_size = A_SIZE_8(agp_bridge->current_size);
 398
 399        /* aperture size */
 400        pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 401
 402        /* address to map to */
 403        pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 404        agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 405
 406        /* attbase - aperture base */
 407        pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 408
 409        /* agpctrl */
 410        pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 411
 412        /* mchcfg */
 413        pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
 414        pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
 415
 416        return 0;
 417}
 418
 419/* Setup function */
 420static const struct gatt_mask intel_generic_masks[] =
 421{
 422        {.mask = 0x00000017, .type = 0}
 423};
 424
 425static const struct aper_size_info_8 intel_815_sizes[2] =
 426{
 427        {64, 16384, 4, 0},
 428        {32, 8192, 3, 8},
 429};
 430
 431static const struct aper_size_info_8 intel_8xx_sizes[7] =
 432{
 433        {256, 65536, 6, 0},
 434        {128, 32768, 5, 32},
 435        {64, 16384, 4, 48},
 436        {32, 8192, 3, 56},
 437        {16, 4096, 2, 60},
 438        {8, 2048, 1, 62},
 439        {4, 1024, 0, 63}
 440};
 441
 442static const struct aper_size_info_16 intel_generic_sizes[7] =
 443{
 444        {256, 65536, 6, 0},
 445        {128, 32768, 5, 32},
 446        {64, 16384, 4, 48},
 447        {32, 8192, 3, 56},
 448        {16, 4096, 2, 60},
 449        {8, 2048, 1, 62},
 450        {4, 1024, 0, 63}
 451};
 452
 453static const struct aper_size_info_8 intel_830mp_sizes[4] =
 454{
 455        {256, 65536, 6, 0},
 456        {128, 32768, 5, 32},
 457        {64, 16384, 4, 48},
 458        {32, 8192, 3, 56}
 459};
 460
 461static const struct agp_bridge_driver intel_generic_driver = {
 462        .owner                  = THIS_MODULE,
 463        .aperture_sizes         = intel_generic_sizes,
 464        .size_type              = U16_APER_SIZE,
 465        .num_aperture_sizes     = 7,
 466        .needs_scratch_page     = true,
 467        .configure              = intel_configure,
 468        .fetch_size             = intel_fetch_size,
 469        .cleanup                = intel_cleanup,
 470        .tlb_flush              = intel_tlbflush,
 471        .mask_memory            = agp_generic_mask_memory,
 472        .masks                  = intel_generic_masks,
 473        .agp_enable             = agp_generic_enable,
 474        .cache_flush            = global_cache_flush,
 475        .create_gatt_table      = agp_generic_create_gatt_table,
 476        .free_gatt_table        = agp_generic_free_gatt_table,
 477        .insert_memory          = agp_generic_insert_memory,
 478        .remove_memory          = agp_generic_remove_memory,
 479        .alloc_by_type          = agp_generic_alloc_by_type,
 480        .free_by_type           = agp_generic_free_by_type,
 481        .agp_alloc_page         = agp_generic_alloc_page,
 482        .agp_alloc_pages        = agp_generic_alloc_pages,
 483        .agp_destroy_page       = agp_generic_destroy_page,
 484        .agp_destroy_pages      = agp_generic_destroy_pages,
 485        .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 486};
 487
 488static const struct agp_bridge_driver intel_815_driver = {
 489        .owner                  = THIS_MODULE,
 490        .aperture_sizes         = intel_815_sizes,
 491        .size_type              = U8_APER_SIZE,
 492        .num_aperture_sizes     = 2,
 493        .needs_scratch_page     = true,
 494        .configure              = intel_815_configure,
 495        .fetch_size             = intel_815_fetch_size,
 496        .cleanup                = intel_8xx_cleanup,
 497        .tlb_flush              = intel_8xx_tlbflush,
 498        .mask_memory            = agp_generic_mask_memory,
 499        .masks                  = intel_generic_masks,
 500        .agp_enable             = agp_generic_enable,
 501        .cache_flush            = global_cache_flush,
 502        .create_gatt_table      = agp_generic_create_gatt_table,
 503        .free_gatt_table        = agp_generic_free_gatt_table,
 504        .insert_memory          = agp_generic_insert_memory,
 505        .remove_memory          = agp_generic_remove_memory,
 506        .alloc_by_type          = agp_generic_alloc_by_type,
 507        .free_by_type           = agp_generic_free_by_type,
 508        .agp_alloc_page         = agp_generic_alloc_page,
 509        .agp_alloc_pages        = agp_generic_alloc_pages,
 510        .agp_destroy_page       = agp_generic_destroy_page,
 511        .agp_destroy_pages      = agp_generic_destroy_pages,
 512        .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 513};
 514
 515static const struct agp_bridge_driver intel_820_driver = {
 516        .owner                  = THIS_MODULE,
 517        .aperture_sizes         = intel_8xx_sizes,
 518        .size_type              = U8_APER_SIZE,
 519        .num_aperture_sizes     = 7,
 520        .needs_scratch_page     = true,
 521        .configure              = intel_820_configure,
 522        .fetch_size             = intel_8xx_fetch_size,
 523        .cleanup                = intel_820_cleanup,
 524        .tlb_flush              = intel_820_tlbflush,
 525        .mask_memory            = agp_generic_mask_memory,
 526        .masks                  = intel_generic_masks,
 527        .agp_enable             = agp_generic_enable,
 528        .cache_flush            = global_cache_flush,
 529        .create_gatt_table      = agp_generic_create_gatt_table,
 530        .free_gatt_table        = agp_generic_free_gatt_table,
 531        .insert_memory          = agp_generic_insert_memory,
 532        .remove_memory          = agp_generic_remove_memory,
 533        .alloc_by_type          = agp_generic_alloc_by_type,
 534        .free_by_type           = agp_generic_free_by_type,
 535        .agp_alloc_page         = agp_generic_alloc_page,
 536        .agp_alloc_pages        = agp_generic_alloc_pages,
 537        .agp_destroy_page       = agp_generic_destroy_page,
 538        .agp_destroy_pages      = agp_generic_destroy_pages,
 539        .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 540};
 541
 542static const struct agp_bridge_driver intel_830mp_driver = {
 543        .owner                  = THIS_MODULE,
 544        .aperture_sizes         = intel_830mp_sizes,
 545        .size_type              = U8_APER_SIZE,
 546        .num_aperture_sizes     = 4,
 547        .needs_scratch_page     = true,
 548        .configure              = intel_830mp_configure,
 549        .fetch_size             = intel_8xx_fetch_size,
 550        .cleanup                = intel_8xx_cleanup,
 551        .tlb_flush              = intel_8xx_tlbflush,
 552        .mask_memory            = agp_generic_mask_memory,
 553        .masks                  = intel_generic_masks,
 554        .agp_enable             = agp_generic_enable,
 555        .cache_flush            = global_cache_flush,
 556        .create_gatt_table      = agp_generic_create_gatt_table,
 557        .free_gatt_table        = agp_generic_free_gatt_table,
 558        .insert_memory          = agp_generic_insert_memory,
 559        .remove_memory          = agp_generic_remove_memory,
 560        .alloc_by_type          = agp_generic_alloc_by_type,
 561        .free_by_type           = agp_generic_free_by_type,
 562        .agp_alloc_page         = agp_generic_alloc_page,
 563        .agp_alloc_pages        = agp_generic_alloc_pages,
 564        .agp_destroy_page       = agp_generic_destroy_page,
 565        .agp_destroy_pages      = agp_generic_destroy_pages,
 566        .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 567};
 568
 569static const struct agp_bridge_driver intel_840_driver = {
 570        .owner                  = THIS_MODULE,
 571        .aperture_sizes         = intel_8xx_sizes,
 572        .size_type              = U8_APER_SIZE,
 573        .num_aperture_sizes     = 7,
 574        .needs_scratch_page     = true,
 575        .configure              = intel_840_configure,
 576        .fetch_size             = intel_8xx_fetch_size,
 577        .cleanup                = intel_8xx_cleanup,
 578        .tlb_flush              = intel_8xx_tlbflush,
 579        .mask_memory            = agp_generic_mask_memory,
 580        .masks                  = intel_generic_masks,
 581        .agp_enable             = agp_generic_enable,
 582        .cache_flush            = global_cache_flush,
 583        .create_gatt_table      = agp_generic_create_gatt_table,
 584        .free_gatt_table        = agp_generic_free_gatt_table,
 585        .insert_memory          = agp_generic_insert_memory,
 586        .remove_memory          = agp_generic_remove_memory,
 587        .alloc_by_type          = agp_generic_alloc_by_type,
 588        .free_by_type           = agp_generic_free_by_type,
 589        .agp_alloc_page         = agp_generic_alloc_page,
 590        .agp_alloc_pages        = agp_generic_alloc_pages,
 591        .agp_destroy_page       = agp_generic_destroy_page,
 592        .agp_destroy_pages      = agp_generic_destroy_pages,
 593        .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 594};
 595
 596static const struct agp_bridge_driver intel_845_driver = {
 597        .owner                  = THIS_MODULE,
 598        .aperture_sizes         = intel_8xx_sizes,
 599        .size_type              = U8_APER_SIZE,
 600        .num_aperture_sizes     = 7,
 601        .needs_scratch_page     = true,
 602        .configure              = intel_845_configure,
 603        .fetch_size             = intel_8xx_fetch_size,
 604        .cleanup                = intel_8xx_cleanup,
 605        .tlb_flush              = intel_8xx_tlbflush,
 606        .mask_memory            = agp_generic_mask_memory,
 607        .masks                  = intel_generic_masks,
 608        .agp_enable             = agp_generic_enable,
 609        .cache_flush            = global_cache_flush,
 610        .create_gatt_table      = agp_generic_create_gatt_table,
 611        .free_gatt_table        = agp_generic_free_gatt_table,
 612        .insert_memory          = agp_generic_insert_memory,
 613        .remove_memory          = agp_generic_remove_memory,
 614        .alloc_by_type          = agp_generic_alloc_by_type,
 615        .free_by_type           = agp_generic_free_by_type,
 616        .agp_alloc_page         = agp_generic_alloc_page,
 617        .agp_alloc_pages        = agp_generic_alloc_pages,
 618        .agp_destroy_page       = agp_generic_destroy_page,
 619        .agp_destroy_pages      = agp_generic_destroy_pages,
 620        .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 621};
 622
 623static const struct agp_bridge_driver intel_850_driver = {
 624        .owner                  = THIS_MODULE,
 625        .aperture_sizes         = intel_8xx_sizes,
 626        .size_type              = U8_APER_SIZE,
 627        .num_aperture_sizes     = 7,
 628        .needs_scratch_page     = true,
 629        .configure              = intel_850_configure,
 630        .fetch_size             = intel_8xx_fetch_size,
 631        .cleanup                = intel_8xx_cleanup,
 632        .tlb_flush              = intel_8xx_tlbflush,
 633        .mask_memory            = agp_generic_mask_memory,
 634        .masks                  = intel_generic_masks,
 635        .agp_enable             = agp_generic_enable,
 636        .cache_flush            = global_cache_flush,
 637        .create_gatt_table      = agp_generic_create_gatt_table,
 638        .free_gatt_table        = agp_generic_free_gatt_table,
 639        .insert_memory          = agp_generic_insert_memory,
 640        .remove_memory          = agp_generic_remove_memory,
 641        .alloc_by_type          = agp_generic_alloc_by_type,
 642        .free_by_type           = agp_generic_free_by_type,
 643        .agp_alloc_page         = agp_generic_alloc_page,
 644        .agp_alloc_pages        = agp_generic_alloc_pages,
 645        .agp_destroy_page       = agp_generic_destroy_page,
 646        .agp_destroy_pages      = agp_generic_destroy_pages,
 647        .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 648};
 649
 650static const struct agp_bridge_driver intel_860_driver = {
 651        .owner                  = THIS_MODULE,
 652        .aperture_sizes         = intel_8xx_sizes,
 653        .size_type              = U8_APER_SIZE,
 654        .num_aperture_sizes     = 7,
 655        .needs_scratch_page     = true,
 656        .configure              = intel_860_configure,
 657        .fetch_size             = intel_8xx_fetch_size,
 658        .cleanup                = intel_8xx_cleanup,
 659        .tlb_flush              = intel_8xx_tlbflush,
 660        .mask_memory            = agp_generic_mask_memory,
 661        .masks                  = intel_generic_masks,
 662        .agp_enable             = agp_generic_enable,
 663        .cache_flush            = global_cache_flush,
 664        .create_gatt_table      = agp_generic_create_gatt_table,
 665        .free_gatt_table        = agp_generic_free_gatt_table,
 666        .insert_memory          = agp_generic_insert_memory,
 667        .remove_memory          = agp_generic_remove_memory,
 668        .alloc_by_type          = agp_generic_alloc_by_type,
 669        .free_by_type           = agp_generic_free_by_type,
 670        .agp_alloc_page         = agp_generic_alloc_page,
 671        .agp_alloc_pages        = agp_generic_alloc_pages,
 672        .agp_destroy_page       = agp_generic_destroy_page,
 673        .agp_destroy_pages      = agp_generic_destroy_pages,
 674        .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 675};
 676
 677static const struct agp_bridge_driver intel_7505_driver = {
 678        .owner                  = THIS_MODULE,
 679        .aperture_sizes         = intel_8xx_sizes,
 680        .size_type              = U8_APER_SIZE,
 681        .num_aperture_sizes     = 7,
 682        .needs_scratch_page     = true,
 683        .configure              = intel_7505_configure,
 684        .fetch_size             = intel_8xx_fetch_size,
 685        .cleanup                = intel_8xx_cleanup,
 686        .tlb_flush              = intel_8xx_tlbflush,
 687        .mask_memory            = agp_generic_mask_memory,
 688        .masks                  = intel_generic_masks,
 689        .agp_enable             = agp_generic_enable,
 690        .cache_flush            = global_cache_flush,
 691        .create_gatt_table      = agp_generic_create_gatt_table,
 692        .free_gatt_table        = agp_generic_free_gatt_table,
 693        .insert_memory          = agp_generic_insert_memory,
 694        .remove_memory          = agp_generic_remove_memory,
 695        .alloc_by_type          = agp_generic_alloc_by_type,
 696        .free_by_type           = agp_generic_free_by_type,
 697        .agp_alloc_page         = agp_generic_alloc_page,
 698        .agp_alloc_pages        = agp_generic_alloc_pages,
 699        .agp_destroy_page       = agp_generic_destroy_page,
 700        .agp_destroy_pages      = agp_generic_destroy_pages,
 701        .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 702};
 703
 704/* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of
 705 * driver and gmch_driver must be non-null, and find_gmch will determine
 706 * which one should be used if a gmch_chip_id is present.
 707 */
 708static const struct intel_agp_driver_description {
 709        unsigned int chip_id;
 710        char *name;
 711        const struct agp_bridge_driver *driver;
 712} intel_agp_chipsets[] = {
 713        { PCI_DEVICE_ID_INTEL_82443LX_0, "440LX", &intel_generic_driver },
 714        { PCI_DEVICE_ID_INTEL_82443BX_0, "440BX", &intel_generic_driver },
 715        { PCI_DEVICE_ID_INTEL_82443GX_0, "440GX", &intel_generic_driver },
 716        { PCI_DEVICE_ID_INTEL_82815_MC, "i815", &intel_815_driver },
 717        { PCI_DEVICE_ID_INTEL_82820_HB, "i820", &intel_820_driver },
 718        { PCI_DEVICE_ID_INTEL_82820_UP_HB, "i820", &intel_820_driver },
 719        { PCI_DEVICE_ID_INTEL_82830_HB, "830M", &intel_830mp_driver },
 720        { PCI_DEVICE_ID_INTEL_82840_HB, "i840", &intel_840_driver },
 721        { PCI_DEVICE_ID_INTEL_82845_HB, "i845", &intel_845_driver },
 722        { PCI_DEVICE_ID_INTEL_82845G_HB, "845G", &intel_845_driver },
 723        { PCI_DEVICE_ID_INTEL_82850_HB, "i850", &intel_850_driver },
 724        { PCI_DEVICE_ID_INTEL_82854_HB, "854", &intel_845_driver },
 725        { PCI_DEVICE_ID_INTEL_82855PM_HB, "855PM", &intel_845_driver },
 726        { PCI_DEVICE_ID_INTEL_82855GM_HB, "855GM", &intel_845_driver },
 727        { PCI_DEVICE_ID_INTEL_82860_HB, "i860", &intel_860_driver },
 728        { PCI_DEVICE_ID_INTEL_82865_HB, "865", &intel_845_driver },
 729        { PCI_DEVICE_ID_INTEL_82875_HB, "i875", &intel_845_driver },
 730        { PCI_DEVICE_ID_INTEL_7505_0, "E7505", &intel_7505_driver },
 731        { PCI_DEVICE_ID_INTEL_7205_0, "E7205", &intel_7505_driver },
 732        { 0, NULL, NULL }
 733};
 734
 735static int agp_intel_probe(struct pci_dev *pdev,
 736                           const struct pci_device_id *ent)
 737{
 738        struct agp_bridge_data *bridge;
 739        u8 cap_ptr = 0;
 740        struct resource *r;
 741        int i, err;
 742
 743        cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
 744
 745        bridge = agp_alloc_bridge();
 746        if (!bridge)
 747                return -ENOMEM;
 748
 749        bridge->capndx = cap_ptr;
 750
 751        if (intel_gmch_probe(pdev, NULL, bridge))
 752                goto found_gmch;
 753
 754        for (i = 0; intel_agp_chipsets[i].name != NULL; i++) {
 755                /* In case that multiple models of gfx chip may
 756                   stand on same host bridge type, this can be
 757                   sure we detect the right IGD. */
 758                if (pdev->device == intel_agp_chipsets[i].chip_id) {
 759                        bridge->driver = intel_agp_chipsets[i].driver;
 760                        break;
 761                }
 762        }
 763
 764        if (!bridge->driver) {
 765                if (cap_ptr)
 766                        dev_warn(&pdev->dev, "unsupported Intel chipset [%04x/%04x]\n",
 767                                 pdev->vendor, pdev->device);
 768                agp_put_bridge(bridge);
 769                return -ENODEV;
 770        }
 771
 772        bridge->dev = pdev;
 773        bridge->dev_private_data = NULL;
 774
 775        dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name);
 776
 777        /*
 778        * The following fixes the case where the BIOS has "forgotten" to
 779        * provide an address range for the GART.
 780        * 20030610 - hamish@zot.org
 781        * This happens before pci_enable_device() intentionally;
 782        * calling pci_enable_device() before assigning the resource
 783        * will result in the GART being disabled on machines with such
 784        * BIOSs (the GART ends up with a BAR starting at 0, which
 785        * conflicts a lot of other devices).
 786        */
 787        r = &pdev->resource[0];
 788        if (!r->start && r->end) {
 789                if (pci_assign_resource(pdev, 0)) {
 790                        dev_err(&pdev->dev, "can't assign resource 0\n");
 791                        agp_put_bridge(bridge);
 792                        return -ENODEV;
 793                }
 794        }
 795
 796        /*
 797        * If the device has not been properly setup, the following will catch
 798        * the problem and should stop the system from crashing.
 799        * 20030610 - hamish@zot.org
 800        */
 801        if (pci_enable_device(pdev)) {
 802                dev_err(&pdev->dev, "can't enable PCI device\n");
 803                agp_put_bridge(bridge);
 804                return -ENODEV;
 805        }
 806
 807        /* Fill in the mode register */
 808        if (cap_ptr) {
 809                pci_read_config_dword(pdev,
 810                                bridge->capndx+PCI_AGP_STATUS,
 811                                &bridge->mode);
 812        }
 813
 814found_gmch:
 815        pci_set_drvdata(pdev, bridge);
 816        err = agp_add_bridge(bridge);
 817        if (!err)
 818                intel_agp_enabled = 1;
 819        return err;
 820}
 821
 822static void agp_intel_remove(struct pci_dev *pdev)
 823{
 824        struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
 825
 826        agp_remove_bridge(bridge);
 827
 828        intel_gmch_remove();
 829
 830        agp_put_bridge(bridge);
 831}
 832
 833#ifdef CONFIG_PM
 834static int agp_intel_resume(struct pci_dev *pdev)
 835{
 836        struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
 837
 838        bridge->driver->configure();
 839
 840        return 0;
 841}
 842#endif
 843
 844static struct pci_device_id agp_intel_pci_table[] = {
 845#define ID(x)                                           \
 846        {                                               \
 847        .class          = (PCI_CLASS_BRIDGE_HOST << 8), \
 848        .class_mask     = ~0,                           \
 849        .vendor         = PCI_VENDOR_ID_INTEL,          \
 850        .device         = x,                            \
 851        .subvendor      = PCI_ANY_ID,                   \
 852        .subdevice      = PCI_ANY_ID,                   \
 853        }
 854        ID(PCI_DEVICE_ID_INTEL_82441), /* for HAS2 support */
 855        ID(PCI_DEVICE_ID_INTEL_82443LX_0),
 856        ID(PCI_DEVICE_ID_INTEL_82443BX_0),
 857        ID(PCI_DEVICE_ID_INTEL_82443GX_0),
 858        ID(PCI_DEVICE_ID_INTEL_82810_MC1),
 859        ID(PCI_DEVICE_ID_INTEL_82810_MC3),
 860        ID(PCI_DEVICE_ID_INTEL_82810E_MC),
 861        ID(PCI_DEVICE_ID_INTEL_82815_MC),
 862        ID(PCI_DEVICE_ID_INTEL_82820_HB),
 863        ID(PCI_DEVICE_ID_INTEL_82820_UP_HB),
 864        ID(PCI_DEVICE_ID_INTEL_82830_HB),
 865        ID(PCI_DEVICE_ID_INTEL_82840_HB),
 866        ID(PCI_DEVICE_ID_INTEL_82845_HB),
 867        ID(PCI_DEVICE_ID_INTEL_82845G_HB),
 868        ID(PCI_DEVICE_ID_INTEL_82850_HB),
 869        ID(PCI_DEVICE_ID_INTEL_82854_HB),
 870        ID(PCI_DEVICE_ID_INTEL_82855PM_HB),
 871        ID(PCI_DEVICE_ID_INTEL_82855GM_HB),
 872        ID(PCI_DEVICE_ID_INTEL_82860_HB),
 873        ID(PCI_DEVICE_ID_INTEL_82865_HB),
 874        ID(PCI_DEVICE_ID_INTEL_82875_HB),
 875        ID(PCI_DEVICE_ID_INTEL_7505_0),
 876        ID(PCI_DEVICE_ID_INTEL_7205_0),
 877        ID(PCI_DEVICE_ID_INTEL_E7221_HB),
 878        ID(PCI_DEVICE_ID_INTEL_82915G_HB),
 879        ID(PCI_DEVICE_ID_INTEL_82915GM_HB),
 880        ID(PCI_DEVICE_ID_INTEL_82945G_HB),
 881        ID(PCI_DEVICE_ID_INTEL_82945GM_HB),
 882        ID(PCI_DEVICE_ID_INTEL_82945GME_HB),
 883        ID(PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB),
 884        ID(PCI_DEVICE_ID_INTEL_PINEVIEW_HB),
 885        ID(PCI_DEVICE_ID_INTEL_82946GZ_HB),
 886        ID(PCI_DEVICE_ID_INTEL_82G35_HB),
 887        ID(PCI_DEVICE_ID_INTEL_82965Q_HB),
 888        ID(PCI_DEVICE_ID_INTEL_82965G_HB),
 889        ID(PCI_DEVICE_ID_INTEL_82965GM_HB),
 890        ID(PCI_DEVICE_ID_INTEL_82965GME_HB),
 891        ID(PCI_DEVICE_ID_INTEL_G33_HB),
 892        ID(PCI_DEVICE_ID_INTEL_Q35_HB),
 893        ID(PCI_DEVICE_ID_INTEL_Q33_HB),
 894        ID(PCI_DEVICE_ID_INTEL_GM45_HB),
 895        ID(PCI_DEVICE_ID_INTEL_EAGLELAKE_HB),
 896        ID(PCI_DEVICE_ID_INTEL_Q45_HB),
 897        ID(PCI_DEVICE_ID_INTEL_G45_HB),
 898        ID(PCI_DEVICE_ID_INTEL_G41_HB),
 899        ID(PCI_DEVICE_ID_INTEL_B43_HB),
 900        ID(PCI_DEVICE_ID_INTEL_B43_1_HB),
 901        ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB),
 902        ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB),
 903        ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),
 904        ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),
 905        ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),
 906        { }
 907};
 908
 909MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
 910
 911static struct pci_driver agp_intel_pci_driver = {
 912        .name           = "agpgart-intel",
 913        .id_table       = agp_intel_pci_table,
 914        .probe          = agp_intel_probe,
 915        .remove         = agp_intel_remove,
 916#ifdef CONFIG_PM
 917        .resume         = agp_intel_resume,
 918#endif
 919};
 920
 921static int __init agp_intel_init(void)
 922{
 923        if (agp_off)
 924                return -EINVAL;
 925        return pci_register_driver(&agp_intel_pci_driver);
 926}
 927
 928static void __exit agp_intel_cleanup(void)
 929{
 930        pci_unregister_driver(&agp_intel_pci_driver);
 931}
 932
 933module_init(agp_intel_init);
 934module_exit(agp_intel_cleanup);
 935
 936MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
 937MODULE_LICENSE("GPL and additional rights");
 938