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20#include <linux/i2c.h>
21#include <linux/module.h>
22#include <linux/v4l2-dv-timings.h>
23
24#include <media/v4l2-dv-timings.h>
25#include <media/v4l2-async.h>
26#include <media/v4l2-device.h>
27
28#include "ths8200_regs.h"
29
30static int debug;
31module_param(debug, int, 0644);
32MODULE_PARM_DESC(debug, "debug level (0-2)");
33
34MODULE_DESCRIPTION("Texas Instruments THS8200 video encoder driver");
35MODULE_AUTHOR("Mats Randgaard <mats.randgaard@cisco.com>");
36MODULE_AUTHOR("Martin Bugge <martin.bugge@cisco.com>");
37MODULE_LICENSE("GPL v2");
38
39struct ths8200_state {
40 struct v4l2_subdev sd;
41 uint8_t chip_version;
42
43 bool power_on;
44 struct v4l2_dv_timings dv_timings;
45};
46
47static const struct v4l2_dv_timings_cap ths8200_timings_cap = {
48 .type = V4L2_DV_BT_656_1120,
49
50 .reserved = { 0 },
51 V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1080, 25000000, 148500000,
52 V4L2_DV_BT_STD_CEA861, V4L2_DV_BT_CAP_PROGRESSIVE)
53};
54
55static inline struct ths8200_state *to_state(struct v4l2_subdev *sd)
56{
57 return container_of(sd, struct ths8200_state, sd);
58}
59
60static inline unsigned hblanking(const struct v4l2_bt_timings *t)
61{
62 return V4L2_DV_BT_BLANKING_WIDTH(t);
63}
64
65static inline unsigned htotal(const struct v4l2_bt_timings *t)
66{
67 return V4L2_DV_BT_FRAME_WIDTH(t);
68}
69
70static inline unsigned vblanking(const struct v4l2_bt_timings *t)
71{
72 return V4L2_DV_BT_BLANKING_HEIGHT(t);
73}
74
75static inline unsigned vtotal(const struct v4l2_bt_timings *t)
76{
77 return V4L2_DV_BT_FRAME_HEIGHT(t);
78}
79
80static int ths8200_read(struct v4l2_subdev *sd, u8 reg)
81{
82 struct i2c_client *client = v4l2_get_subdevdata(sd);
83
84 return i2c_smbus_read_byte_data(client, reg);
85}
86
87static int ths8200_write(struct v4l2_subdev *sd, u8 reg, u8 val)
88{
89 struct i2c_client *client = v4l2_get_subdevdata(sd);
90 int ret;
91 int i;
92
93 for (i = 0; i < 3; i++) {
94 ret = i2c_smbus_write_byte_data(client, reg, val);
95 if (ret == 0)
96 return 0;
97 }
98 v4l2_err(sd, "I2C Write Problem\n");
99 return ret;
100}
101
102
103
104
105static inline void
106ths8200_write_and_or(struct v4l2_subdev *sd, u8 reg,
107 uint8_t clr_mask, uint8_t val_mask)
108{
109 ths8200_write(sd, reg, (ths8200_read(sd, reg) & clr_mask) | val_mask);
110}
111
112#ifdef CONFIG_VIDEO_ADV_DEBUG
113
114static int ths8200_g_register(struct v4l2_subdev *sd,
115 struct v4l2_dbg_register *reg)
116{
117 reg->val = ths8200_read(sd, reg->reg & 0xff);
118 reg->size = 1;
119
120 return 0;
121}
122
123static int ths8200_s_register(struct v4l2_subdev *sd,
124 const struct v4l2_dbg_register *reg)
125{
126 ths8200_write(sd, reg->reg & 0xff, reg->val & 0xff);
127
128 return 0;
129}
130#endif
131
132static int ths8200_log_status(struct v4l2_subdev *sd)
133{
134 struct ths8200_state *state = to_state(sd);
135 uint8_t reg_03 = ths8200_read(sd, THS8200_CHIP_CTL);
136
137 v4l2_info(sd, "----- Chip status -----\n");
138 v4l2_info(sd, "version: %u\n", state->chip_version);
139 v4l2_info(sd, "power: %s\n", (reg_03 & 0x0c) ? "off" : "on");
140 v4l2_info(sd, "reset: %s\n", (reg_03 & 0x01) ? "off" : "on");
141 v4l2_info(sd, "test pattern: %s\n",
142 (reg_03 & 0x20) ? "enabled" : "disabled");
143 v4l2_info(sd, "format: %ux%u\n",
144 ths8200_read(sd, THS8200_DTG2_PIXEL_CNT_MSB) * 256 +
145 ths8200_read(sd, THS8200_DTG2_PIXEL_CNT_LSB),
146 (ths8200_read(sd, THS8200_DTG2_LINE_CNT_MSB) & 0x07) * 256 +
147 ths8200_read(sd, THS8200_DTG2_LINE_CNT_LSB));
148 v4l2_print_dv_timings(sd->name, "Configured format:",
149 &state->dv_timings, true);
150 return 0;
151}
152
153
154static int ths8200_s_power(struct v4l2_subdev *sd, int on)
155{
156 struct ths8200_state *state = to_state(sd);
157
158 v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off");
159
160 state->power_on = on;
161
162
163 ths8200_write_and_or(sd, THS8200_CHIP_CTL, 0xf2, (on ? 0x00 : 0x0c));
164
165 return 0;
166}
167
168static const struct v4l2_subdev_core_ops ths8200_core_ops = {
169 .log_status = ths8200_log_status,
170 .s_power = ths8200_s_power,
171#ifdef CONFIG_VIDEO_ADV_DEBUG
172 .g_register = ths8200_g_register,
173 .s_register = ths8200_s_register,
174#endif
175};
176
177
178
179
180
181static int ths8200_s_stream(struct v4l2_subdev *sd, int enable)
182{
183 struct ths8200_state *state = to_state(sd);
184
185 if (enable && !state->power_on)
186 ths8200_s_power(sd, true);
187
188 ths8200_write_and_or(sd, THS8200_CHIP_CTL, 0xfe,
189 (enable ? 0x01 : 0x00));
190
191 v4l2_dbg(1, debug, sd, "%s: %sable\n",
192 __func__, (enable ? "en" : "dis"));
193
194 return 0;
195}
196
197static void ths8200_core_init(struct v4l2_subdev *sd)
198{
199
200 ths8200_write_and_or(sd, THS8200_CHIP_CTL, 0x3f, 0xc0);
201
202
203
204
205
206
207 ths8200_write(sd, THS8200_DATA_CNTL, 0x70);
208
209
210
211
212 ths8200_write(sd, THS8200_DTG1_MODE, 0x87);
213
214
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216
217
218
219 ths8200_write(sd, THS8200_DTG1_Y_SYNC_MSB, 0x2a);
220 ths8200_write(sd, THS8200_DTG1_CBCR_SYNC_MSB, 0x2a);
221}
222
223static void ths8200_setup(struct v4l2_subdev *sd, struct v4l2_bt_timings *bt)
224{
225 uint8_t polarity = 0;
226 uint16_t line_start_active_video = (bt->vsync + bt->vbackporch);
227 uint16_t line_start_front_porch = (vtotal(bt) - bt->vfrontporch);
228
229
230
231 ths8200_s_stream(sd, false);
232
233
234 ths8200_write(sd, THS8200_DTG1_SPEC_A, bt->hsync);
235 ths8200_write(sd, THS8200_DTG1_SPEC_B, bt->hfrontporch);
236
237
238 if (!bt->interlaced)
239 ths8200_write(sd, THS8200_DTG1_SPEC_C, 0x00);
240
241
242
243
244 ths8200_write(sd, THS8200_DTG1_SPEC_D_LSB,
245 (bt->hbackporch + bt->hsync) & 0xff);
246
247 ths8200_write(sd, THS8200_DTG1_SPEC_E_LSB, 0x00);
248
249
250
251
252 ths8200_write(sd, THS8200_DTG1_SPEC_DEH_MSB,
253 ((bt->hbackporch + bt->hsync) & 0x100) >> 1);
254
255
256 ths8200_write(sd, THS8200_DTG1_SPEC_K_LSB, (bt->hfrontporch) & 0xff);
257 ths8200_write(sd, THS8200_DTG1_SPEC_K_MSB,
258 ((bt->hfrontporch) & 0x700) >> 8);
259
260
261 ths8200_write(sd, THS8200_DTG1_SPEC_G_LSB, (htotal(bt)/2) & 0xff);
262 ths8200_write(sd, THS8200_DTG1_SPEC_G_MSB,
263 ((htotal(bt)/2) >> 8) & 0x0f);
264
265
266 ths8200_write(sd, THS8200_DTG1_TOT_PIXELS_MSB, htotal(bt) >> 8);
267 ths8200_write(sd, THS8200_DTG1_TOT_PIXELS_LSB, htotal(bt) & 0xff);
268
269
270
271
272
273 ths8200_write(sd, THS8200_DTG1_FRAME_FIELD_SZ_MSB,
274 ((vtotal(bt) >> 4) & 0xf0) + 0x7);
275 ths8200_write(sd, THS8200_DTG1_FRAME_SZ_LSB, vtotal(bt) & 0xff);
276
277
278
279
280 if (!bt->interlaced)
281 ths8200_write(sd, THS8200_DTG1_FIELD_SZ_LSB, 0xff);
282
283
284
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288
289
290
291
292
293
294
295
296
297
298 ths8200_write_and_or(sd, THS8200_DTG2_BP1_2_MSB, 0x88,
299 ((line_start_active_video >> 4) & 0x70) +
300 ((line_start_front_porch >> 8) & 0x07));
301 ths8200_write(sd, THS8200_DTG2_BP3_4_MSB, ((vtotal(bt)) >> 4) & 0x70);
302 ths8200_write(sd, THS8200_DTG2_BP1_LSB, line_start_active_video & 0xff);
303 ths8200_write(sd, THS8200_DTG2_BP2_LSB, line_start_front_porch & 0xff);
304 ths8200_write(sd, THS8200_DTG2_BP3_LSB, (vtotal(bt)) & 0xff);
305
306
307 ths8200_write(sd, THS8200_DTG2_LINETYPE1, 0x90);
308 ths8200_write(sd, THS8200_DTG2_LINETYPE2, 0x90);
309
310
311 ths8200_write(sd, THS8200_DTG2_HLENGTH_LSB, bt->hsync & 0xff);
312 ths8200_write_and_or(sd, THS8200_DTG2_HLENGTH_LSB_HDLY_MSB, 0x3f,
313 (bt->hsync >> 2) & 0xc0);
314
315
316 ths8200_write_and_or(sd, THS8200_DTG2_HLENGTH_LSB_HDLY_MSB, 0xe0,
317 (htotal(bt) >> 8) & 0x1f);
318 ths8200_write(sd, THS8200_DTG2_HLENGTH_HDLY_LSB, htotal(bt));
319
320
321 ths8200_write(sd, THS8200_DTG2_VLENGTH1_LSB, (bt->vsync) & 0xff);
322 ths8200_write_and_or(sd, THS8200_DTG2_VLENGTH1_MSB_VDLY1_MSB, 0x3f,
323 ((bt->vsync) >> 2) & 0xc0);
324
325
326 ths8200_write_and_or(sd, THS8200_DTG2_VLENGTH1_MSB_VDLY1_MSB, 0xf8,
327 (vtotal(bt)>>8) & 0x7);
328 ths8200_write(sd, THS8200_DTG2_VDLY1_LSB, vtotal(bt));
329
330
331
332
333 ths8200_write(sd, THS8200_DTG2_VLENGTH2_LSB, 0x00);
334 ths8200_write(sd, THS8200_DTG2_VLENGTH2_MSB_VDLY2_MSB, 0x07);
335 ths8200_write(sd, THS8200_DTG2_VDLY2_LSB, 0xff);
336
337
338
339 ths8200_write(sd, THS8200_DTG2_HS_IN_DLY_MSB, (htotal(bt)>>8) & 0x1f);
340 ths8200_write(sd, THS8200_DTG2_HS_IN_DLY_LSB, (htotal(bt) - 4) & 0xff);
341 ths8200_write(sd, THS8200_DTG2_VS_IN_DLY_MSB, 0);
342 ths8200_write(sd, THS8200_DTG2_VS_IN_DLY_LSB, 1);
343
344
345 if (bt->polarities & V4L2_DV_HSYNC_POS_POL) {
346 polarity |= 0x01;
347 polarity |= 0x08;
348 }
349 if (bt->polarities & V4L2_DV_VSYNC_POS_POL) {
350 polarity |= 0x02;
351 polarity |= 0x10;
352 }
353
354
355
356
357
358 ths8200_write(sd, THS8200_DTG2_CNTL, 0x47 | polarity);
359
360
361 ths8200_s_stream(sd, true);
362
363 v4l2_dbg(1, debug, sd, "%s: frame %dx%d, polarity %d\n"
364 "horizontal: front porch %d, back porch %d, sync %d\n"
365 "vertical: sync %d\n", __func__, htotal(bt), vtotal(bt),
366 polarity, bt->hfrontporch, bt->hbackporch,
367 bt->hsync, bt->vsync);
368}
369
370static int ths8200_s_dv_timings(struct v4l2_subdev *sd,
371 struct v4l2_dv_timings *timings)
372{
373 struct ths8200_state *state = to_state(sd);
374
375 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
376
377 if (!v4l2_valid_dv_timings(timings, &ths8200_timings_cap,
378 NULL, NULL))
379 return -EINVAL;
380
381 if (!v4l2_find_dv_timings_cap(timings, &ths8200_timings_cap, 10,
382 NULL, NULL)) {
383 v4l2_dbg(1, debug, sd, "Unsupported format\n");
384 return -EINVAL;
385 }
386
387 timings->bt.flags &= ~V4L2_DV_FL_REDUCED_FPS;
388
389
390 state->dv_timings = *timings;
391
392 ths8200_setup(sd, &timings->bt);
393
394 return 0;
395}
396
397static int ths8200_g_dv_timings(struct v4l2_subdev *sd,
398 struct v4l2_dv_timings *timings)
399{
400 struct ths8200_state *state = to_state(sd);
401
402 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
403
404 *timings = state->dv_timings;
405
406 return 0;
407}
408
409static int ths8200_enum_dv_timings(struct v4l2_subdev *sd,
410 struct v4l2_enum_dv_timings *timings)
411{
412 return v4l2_enum_dv_timings_cap(timings, &ths8200_timings_cap,
413 NULL, NULL);
414}
415
416static int ths8200_dv_timings_cap(struct v4l2_subdev *sd,
417 struct v4l2_dv_timings_cap *cap)
418{
419 *cap = ths8200_timings_cap;
420 return 0;
421}
422
423
424static const struct v4l2_subdev_video_ops ths8200_video_ops = {
425 .s_stream = ths8200_s_stream,
426 .s_dv_timings = ths8200_s_dv_timings,
427 .g_dv_timings = ths8200_g_dv_timings,
428 .enum_dv_timings = ths8200_enum_dv_timings,
429 .dv_timings_cap = ths8200_dv_timings_cap,
430};
431
432
433static const struct v4l2_subdev_ops ths8200_ops = {
434 .core = &ths8200_core_ops,
435 .video = &ths8200_video_ops,
436};
437
438static int ths8200_probe(struct i2c_client *client,
439 const struct i2c_device_id *id)
440{
441 struct ths8200_state *state;
442 struct v4l2_subdev *sd;
443 int error;
444
445
446 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
447 return -EIO;
448
449 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
450 if (!state)
451 return -ENOMEM;
452
453 sd = &state->sd;
454 v4l2_i2c_subdev_init(sd, client, &ths8200_ops);
455
456 state->chip_version = ths8200_read(sd, THS8200_VERSION);
457 v4l2_dbg(1, debug, sd, "chip version 0x%x\n", state->chip_version);
458
459 ths8200_core_init(sd);
460
461 error = v4l2_async_register_subdev(&state->sd);
462 if (error)
463 return error;
464
465 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
466 client->addr << 1, client->adapter->name);
467
468 return 0;
469}
470
471static int ths8200_remove(struct i2c_client *client)
472{
473 struct v4l2_subdev *sd = i2c_get_clientdata(client);
474 struct ths8200_state *decoder = to_state(sd);
475
476 v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name,
477 client->addr << 1, client->adapter->name);
478
479 ths8200_s_power(sd, false);
480 v4l2_async_unregister_subdev(&decoder->sd);
481 v4l2_device_unregister_subdev(sd);
482
483 return 0;
484}
485
486static struct i2c_device_id ths8200_id[] = {
487 { "ths8200", 0 },
488 {},
489};
490MODULE_DEVICE_TABLE(i2c, ths8200_id);
491
492#if IS_ENABLED(CONFIG_OF)
493static const struct of_device_id ths8200_of_match[] = {
494 { .compatible = "ti,ths8200", },
495 { },
496};
497MODULE_DEVICE_TABLE(of, ths8200_of_match);
498#endif
499
500static struct i2c_driver ths8200_driver = {
501 .driver = {
502 .owner = THIS_MODULE,
503 .name = "ths8200",
504 .of_match_table = of_match_ptr(ths8200_of_match),
505 },
506 .probe = ths8200_probe,
507 .remove = ths8200_remove,
508 .id_table = ths8200_id,
509};
510
511module_i2c_driver(ths8200_driver);
512