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25#include <linux/init.h>
26#include <linux/list.h>
27#include <linux/module.h>
28#include <linux/slab.h>
29#include <linux/usb.h>
30#include <linux/vmalloc.h>
31#include <sound/ac97_codec.h>
32#include <media/v4l2-common.h>
33
34#include "em28xx.h"
35
36
37
38static unsigned int core_debug;
39module_param(core_debug, int, 0644);
40MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
41
42#define em28xx_coredbg(fmt, arg...) do {\
43 if (core_debug) \
44 printk(KERN_INFO "%s %s :"fmt, \
45 dev->name, __func__ , ##arg); } while (0)
46
47static unsigned int reg_debug;
48module_param(reg_debug, int, 0644);
49MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
50
51#define em28xx_regdbg(fmt, arg...) do {\
52 if (reg_debug) \
53 printk(KERN_INFO "%s %s :"fmt, \
54 dev->name, __func__ , ##arg); } while (0)
55
56static int alt;
57module_param(alt, int, 0644);
58MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
59
60static unsigned int disable_vbi;
61module_param(disable_vbi, int, 0644);
62MODULE_PARM_DESC(disable_vbi, "disable vbi support");
63
64
65#define em28xx_isocdbg(fmt, arg...) do {\
66 if (core_debug) \
67 printk(KERN_INFO "%s %s :"fmt, \
68 dev->name, __func__ , ##arg); } while (0)
69
70
71
72
73
74int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
75 char *buf, int len)
76{
77 int ret;
78 int pipe = usb_rcvctrlpipe(dev->udev, 0);
79
80 if (dev->disconnected)
81 return -ENODEV;
82
83 if (len > URB_MAX_CTRL_SIZE)
84 return -EINVAL;
85
86 if (reg_debug) {
87 printk(KERN_DEBUG "(pipe 0x%08x): "
88 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
89 pipe,
90 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
91 req, 0, 0,
92 reg & 0xff, reg >> 8,
93 len & 0xff, len >> 8);
94 }
95
96 mutex_lock(&dev->ctrl_urb_lock);
97 ret = usb_control_msg(dev->udev, pipe, req,
98 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
99 0x0000, reg, dev->urb_buf, len, HZ);
100 if (ret < 0) {
101 if (reg_debug)
102 printk(" failed!\n");
103 mutex_unlock(&dev->ctrl_urb_lock);
104 return usb_translate_errors(ret);
105 }
106
107 if (len)
108 memcpy(buf, dev->urb_buf, len);
109
110 mutex_unlock(&dev->ctrl_urb_lock);
111
112 if (reg_debug) {
113 int byte;
114
115 printk("<<<");
116 for (byte = 0; byte < len; byte++)
117 printk(" %02x", (unsigned char)buf[byte]);
118 printk("\n");
119 }
120
121 return ret;
122}
123
124
125
126
127
128int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
129{
130 int ret;
131 u8 val;
132
133 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
134 if (ret < 0)
135 return ret;
136
137 return val;
138}
139
140int em28xx_read_reg(struct em28xx *dev, u16 reg)
141{
142 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
143}
144EXPORT_SYMBOL_GPL(em28xx_read_reg);
145
146
147
148
149
150int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
151 int len)
152{
153 int ret;
154 int pipe = usb_sndctrlpipe(dev->udev, 0);
155
156 if (dev->disconnected)
157 return -ENODEV;
158
159 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
160 return -EINVAL;
161
162 if (reg_debug) {
163 int byte;
164
165 printk(KERN_DEBUG "(pipe 0x%08x): "
166 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
167 pipe,
168 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
169 req, 0, 0,
170 reg & 0xff, reg >> 8,
171 len & 0xff, len >> 8);
172
173 for (byte = 0; byte < len; byte++)
174 printk(" %02x", (unsigned char)buf[byte]);
175 printk("\n");
176 }
177
178 mutex_lock(&dev->ctrl_urb_lock);
179 memcpy(dev->urb_buf, buf, len);
180 ret = usb_control_msg(dev->udev, pipe, req,
181 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
182 0x0000, reg, dev->urb_buf, len, HZ);
183 mutex_unlock(&dev->ctrl_urb_lock);
184
185 if (ret < 0)
186 return usb_translate_errors(ret);
187
188 if (dev->wait_after_write)
189 msleep(dev->wait_after_write);
190
191 return ret;
192}
193
194int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
195{
196 return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
197}
198EXPORT_SYMBOL_GPL(em28xx_write_regs);
199
200
201int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
202{
203 return em28xx_write_regs(dev, reg, &val, 1);
204}
205EXPORT_SYMBOL_GPL(em28xx_write_reg);
206
207
208
209
210
211
212int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
213 u8 bitmask)
214{
215 int oldval;
216 u8 newval;
217
218 oldval = em28xx_read_reg(dev, reg);
219 if (oldval < 0)
220 return oldval;
221
222 newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
223
224 return em28xx_write_regs(dev, reg, &newval, 1);
225}
226EXPORT_SYMBOL_GPL(em28xx_write_reg_bits);
227
228
229
230
231
232static int em28xx_is_ac97_ready(struct em28xx *dev)
233{
234 int ret, i;
235
236
237 for (i = 0; i < 10; i++, msleep(5)) {
238 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
239 if (ret < 0)
240 return ret;
241
242 if (!(ret & 0x01))
243 return 0;
244 }
245
246 em28xx_warn("AC97 command still being executed: not handled properly!\n");
247 return -EBUSY;
248}
249
250
251
252
253
254int em28xx_read_ac97(struct em28xx *dev, u8 reg)
255{
256 int ret;
257 u8 addr = (reg & 0x7f) | 0x80;
258 u16 val;
259
260 ret = em28xx_is_ac97_ready(dev);
261 if (ret < 0)
262 return ret;
263
264 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
265 if (ret < 0)
266 return ret;
267
268 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
269 (u8 *)&val, sizeof(val));
270
271 if (ret < 0)
272 return ret;
273 return le16_to_cpu(val);
274}
275EXPORT_SYMBOL_GPL(em28xx_read_ac97);
276
277
278
279
280
281int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
282{
283 int ret;
284 u8 addr = reg & 0x7f;
285 __le16 value;
286
287 value = cpu_to_le16(val);
288
289 ret = em28xx_is_ac97_ready(dev);
290 if (ret < 0)
291 return ret;
292
293 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
294 if (ret < 0)
295 return ret;
296
297 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
298 if (ret < 0)
299 return ret;
300
301 return 0;
302}
303EXPORT_SYMBOL_GPL(em28xx_write_ac97);
304
305struct em28xx_vol_itable {
306 enum em28xx_amux mux;
307 u8 reg;
308};
309
310static struct em28xx_vol_itable inputs[] = {
311 { EM28XX_AMUX_VIDEO, AC97_VIDEO },
312 { EM28XX_AMUX_LINE_IN, AC97_LINE },
313 { EM28XX_AMUX_PHONE, AC97_PHONE },
314 { EM28XX_AMUX_MIC, AC97_MIC },
315 { EM28XX_AMUX_CD, AC97_CD },
316 { EM28XX_AMUX_AUX, AC97_AUX },
317 { EM28XX_AMUX_PCM_OUT, AC97_PCM },
318};
319
320static int set_ac97_input(struct em28xx *dev)
321{
322 int ret, i;
323 enum em28xx_amux amux = dev->ctl_ainput;
324
325
326
327
328 if (amux == EM28XX_AMUX_VIDEO2)
329 amux = EM28XX_AMUX_VIDEO;
330
331
332 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
333 if (amux == inputs[i].mux)
334 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
335 else
336 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
337
338 if (ret < 0)
339 em28xx_warn("couldn't setup AC97 register %d\n",
340 inputs[i].reg);
341 }
342 return 0;
343}
344
345static int em28xx_set_audio_source(struct em28xx *dev)
346{
347 int ret;
348 u8 input;
349
350 if (dev->board.is_em2800) {
351 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
352 input = EM2800_AUDIO_SRC_TUNER;
353 else
354 input = EM2800_AUDIO_SRC_LINE;
355
356 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
357 if (ret < 0)
358 return ret;
359 }
360
361 if (dev->board.has_msp34xx)
362 input = EM28XX_AUDIO_SRC_TUNER;
363 else {
364 switch (dev->ctl_ainput) {
365 case EM28XX_AMUX_VIDEO:
366 input = EM28XX_AUDIO_SRC_TUNER;
367 break;
368 default:
369 input = EM28XX_AUDIO_SRC_LINE;
370 break;
371 }
372 }
373
374 if (dev->board.mute_gpio && dev->mute)
375 em28xx_gpio_set(dev, dev->board.mute_gpio);
376 else
377 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
378
379 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
380 if (ret < 0)
381 return ret;
382 msleep(5);
383
384 switch (dev->audio_mode.ac97) {
385 case EM28XX_NO_AC97:
386 break;
387 default:
388 ret = set_ac97_input(dev);
389 }
390
391 return ret;
392}
393
394struct em28xx_vol_otable {
395 enum em28xx_aout mux;
396 u8 reg;
397};
398
399static const struct em28xx_vol_otable outputs[] = {
400 { EM28XX_AOUT_MASTER, AC97_MASTER },
401 { EM28XX_AOUT_LINE, AC97_HEADPHONE },
402 { EM28XX_AOUT_MONO, AC97_MASTER_MONO },
403 { EM28XX_AOUT_LFE, AC97_CENTER_LFE_MASTER },
404 { EM28XX_AOUT_SURR, AC97_SURROUND_MASTER },
405};
406
407int em28xx_audio_analog_set(struct em28xx *dev)
408{
409 int ret, i;
410 u8 xclk;
411
412 if (!dev->audio_mode.has_audio)
413 return 0;
414
415
416
417
418 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
419
420 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
421 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
422 if (ret < 0)
423 em28xx_warn("couldn't setup AC97 register %d\n",
424 outputs[i].reg);
425 }
426 }
427
428 xclk = dev->board.xclk & 0x7f;
429 if (!dev->mute)
430 xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
431
432 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
433 if (ret < 0)
434 return ret;
435 msleep(10);
436
437
438 ret = em28xx_set_audio_source(dev);
439
440
441 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
442 int vol;
443
444 em28xx_write_ac97(dev, AC97_POWERDOWN, 0x4200);
445 em28xx_write_ac97(dev, AC97_EXTENDED_STATUS, 0x0031);
446 em28xx_write_ac97(dev, AC97_PCM_LR_ADC_RATE, 0xbb80);
447
448
449 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
450
451
452 if (dev->mute)
453 vol |= 0x8000;
454
455
456 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
457 if (dev->ctl_aoutput & outputs[i].mux)
458 ret = em28xx_write_ac97(dev, outputs[i].reg,
459 vol);
460 if (ret < 0)
461 em28xx_warn("couldn't setup AC97 register %d\n",
462 outputs[i].reg);
463 }
464
465 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
466 int sel = ac97_return_record_select(dev->ctl_aoutput);
467
468
469
470 sel |= (sel << 8);
471
472 em28xx_write_ac97(dev, AC97_REC_SEL, sel);
473 }
474 }
475
476 return ret;
477}
478EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
479
480int em28xx_audio_setup(struct em28xx *dev)
481{
482 int vid1, vid2, feat, cfg;
483 u32 vid;
484
485 if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874
486 || dev->chip_id == CHIP_ID_EM28174) {
487
488 dev->audio_mode.has_audio = false;
489 dev->has_audio_class = false;
490 dev->has_alsa_audio = false;
491 return 0;
492 }
493
494 dev->audio_mode.has_audio = true;
495
496
497 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
498 em28xx_info("Config register raw data: 0x%02x\n", cfg);
499 if (cfg < 0) {
500
501 cfg = EM28XX_CHIPCFG_AC97;
502 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
503
504 dev->has_alsa_audio = false;
505 dev->audio_mode.has_audio = false;
506 return 0;
507 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
508 EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
509 em28xx_info("I2S Audio (3 sample rates)\n");
510 dev->audio_mode.i2s_3rates = 1;
511 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
512 EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
513 em28xx_info("I2S Audio (5 sample rates)\n");
514 dev->audio_mode.i2s_5rates = 1;
515 }
516
517 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
518
519 dev->audio_mode.ac97 = EM28XX_NO_AC97;
520 goto init_audio;
521 }
522
523 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
524
525 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
526 if (vid1 < 0) {
527
528
529
530
531
532 em28xx_warn("AC97 chip type couldn't be determined\n");
533 dev->audio_mode.ac97 = EM28XX_NO_AC97;
534 dev->has_alsa_audio = false;
535 dev->audio_mode.has_audio = false;
536 goto init_audio;
537 }
538
539 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
540 if (vid2 < 0)
541 goto init_audio;
542
543 vid = vid1 << 16 | vid2;
544
545 dev->audio_mode.ac97_vendor_id = vid;
546 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
547
548 feat = em28xx_read_ac97(dev, AC97_RESET);
549 if (feat < 0)
550 goto init_audio;
551
552 dev->audio_mode.ac97_feat = feat;
553 em28xx_warn("AC97 features = 0x%04x\n", feat);
554
555
556 if (((vid == 0xffffffff) || (vid == 0x83847650)) && (feat == 0x6a90))
557 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
558 else if ((vid >> 8) == 0x838476)
559 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
560
561init_audio:
562
563 switch (dev->audio_mode.ac97) {
564 case EM28XX_NO_AC97:
565 em28xx_info("No AC97 audio processor\n");
566 break;
567 case EM28XX_AC97_EM202:
568 em28xx_info("Empia 202 AC97 audio processor detected\n");
569 break;
570 case EM28XX_AC97_SIGMATEL:
571 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
572 dev->audio_mode.ac97_vendor_id & 0xff);
573 break;
574 case EM28XX_AC97_OTHER:
575 em28xx_warn("Unknown AC97 audio processor detected!\n");
576 break;
577 default:
578 break;
579 }
580
581 return em28xx_audio_analog_set(dev);
582}
583EXPORT_SYMBOL_GPL(em28xx_audio_setup);
584
585int em28xx_colorlevels_set_default(struct em28xx *dev)
586{
587 em28xx_write_reg(dev, EM28XX_R20_YGAIN, CONTRAST_DEFAULT);
588 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, BRIGHTNESS_DEFAULT);
589 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, SATURATION_DEFAULT);
590 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, BLUE_BALANCE_DEFAULT);
591 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, RED_BALANCE_DEFAULT);
592 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, SHARPNESS_DEFAULT);
593
594 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
595 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
596 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
597 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
598 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
599 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
600 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
601}
602
603int em28xx_capture_start(struct em28xx *dev, int start)
604{
605 int rc;
606
607 if (dev->chip_id == CHIP_ID_EM2874 ||
608 dev->chip_id == CHIP_ID_EM2884 ||
609 dev->chip_id == CHIP_ID_EM28174) {
610
611 if (!start) {
612 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
613 0x00,
614 EM2874_TS1_CAPTURE_ENABLE);
615 return rc;
616 }
617
618
619 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
620 EM2874_TS1_CAPTURE_ENABLE,
621 EM2874_TS1_CAPTURE_ENABLE);
622 return rc;
623 }
624
625
626
627
628 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
629 start ? 0x10 : 0x00, 0x10);
630 if (rc < 0)
631 return rc;
632
633 if (!start) {
634
635 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
636 return rc;
637 }
638
639 if (dev->board.is_webcam)
640 rc = em28xx_write_reg(dev, 0x13, 0x0c);
641
642
643 rc = em28xx_write_reg(dev, 0x48, 0x00);
644
645 if (dev->mode == EM28XX_ANALOG_MODE)
646 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
647 else
648 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
649
650 msleep(6);
651
652 return rc;
653}
654
655int em28xx_vbi_supported(struct em28xx *dev)
656{
657
658 if (disable_vbi == 1)
659 return 0;
660
661 if (dev->board.is_webcam)
662 return 0;
663
664
665
666 if (dev->chip_id == CHIP_ID_EM2860 ||
667 dev->chip_id == CHIP_ID_EM2883)
668 return 1;
669
670
671 return 0;
672}
673
674int em28xx_set_outfmt(struct em28xx *dev)
675{
676 int ret;
677 u8 fmt, vinctrl;
678
679 fmt = dev->format->reg;
680 if (!dev->is_em25xx)
681 fmt |= 0x20;
682
683
684
685
686
687
688
689
690
691 ret = em28xx_write_reg(dev, EM28XX_R27_OUTFMT, fmt);
692 if (ret < 0)
693 return ret;
694
695 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode);
696 if (ret < 0)
697 return ret;
698
699 vinctrl = dev->vinctl;
700 if (em28xx_vbi_supported(dev) == 1) {
701 vinctrl |= EM28XX_VINCTRL_VBI_RAW;
702 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
703 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, dev->vbi_width/4);
704 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, dev->vbi_height);
705 if (dev->norm & V4L2_STD_525_60) {
706
707 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
708 } else if (dev->norm & V4L2_STD_625_50) {
709
710 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x07);
711 }
712 }
713
714 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
715}
716
717static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
718 u8 ymin, u8 ymax)
719{
720 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
721 xmin, ymin, xmax, ymax);
722
723 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
724 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
725 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
726 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
727}
728
729static void em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
730 u16 width, u16 height)
731{
732 u8 cwidth = width >> 2;
733 u8 cheight = height >> 2;
734 u8 overflow = (height >> 9 & 0x02) | (width >> 10 & 0x01);
735
736
737 em28xx_coredbg("capture area set to (%d,%d): %dx%d\n",
738 hstart, vstart,
739 ((overflow & 2) << 9 | cwidth << 2),
740 ((overflow & 1) << 10 | cheight << 2));
741
742 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
743 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
744 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
745 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
746 em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
747
748
749
750 if (dev->is_em25xx) {
751 em28xx_write_reg(dev, 0x34, width >> 4);
752 em28xx_write_reg(dev, 0x35, height >> 4);
753 }
754}
755
756static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
757{
758 u8 mode;
759
760
761 if (dev->board.is_em2800) {
762 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
763 } else {
764 u8 buf[2];
765
766 buf[0] = h;
767 buf[1] = h >> 8;
768 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
769
770 buf[0] = v;
771 buf[1] = v >> 8;
772 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
773
774
775 mode = (h || v) ? 0x30 : 0x00;
776 }
777 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
778}
779
780
781int em28xx_resolution_set(struct em28xx *dev)
782{
783 int width, height;
784 width = norm_maxw(dev);
785 height = norm_maxh(dev);
786
787
788 dev->vbi_width = 720;
789 if (dev->norm & V4L2_STD_525_60)
790 dev->vbi_height = 12;
791 else
792 dev->vbi_height = 18;
793
794 em28xx_set_outfmt(dev);
795
796 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
797
798
799
800
801
802
803
804
805 if (em28xx_vbi_supported(dev) == 1)
806 em28xx_capture_area_set(dev, 0, 2, width, height);
807 else
808 em28xx_capture_area_set(dev, 0, 0, width, height);
809
810 return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
811}
812
813
814int em28xx_set_alternate(struct em28xx *dev)
815{
816 int errCode;
817 int i;
818 unsigned int min_pkt_size = dev->width * 2 + 4;
819
820
821
822 dev->alt = 0;
823 if ((alt > 0) && (alt < dev->num_alt)) {
824 em28xx_coredbg("alternate forced to %d\n", dev->alt);
825 dev->alt = alt;
826 goto set_alt;
827 }
828 if (dev->analog_xfer_bulk)
829 goto set_alt;
830
831
832
833
834
835 if (dev->width * 2 * dev->height > 720 * 240 * 2)
836 min_pkt_size *= 2;
837
838 for (i = 0; i < dev->num_alt; i++) {
839
840 if (dev->alt_max_pkt_size_isoc[i] >= min_pkt_size) {
841 dev->alt = i;
842 break;
843
844
845
846 } else if (dev->alt_max_pkt_size_isoc[i] >
847 dev->alt_max_pkt_size_isoc[dev->alt])
848 dev->alt = i;
849 }
850
851set_alt:
852
853
854
855 if (dev->analog_xfer_bulk) {
856 dev->max_pkt_size = 512;
857 dev->packet_multiplier = EM28XX_BULK_PACKET_MULTIPLIER;
858 } else {
859 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
860 min_pkt_size, dev->alt);
861 dev->max_pkt_size =
862 dev->alt_max_pkt_size_isoc[dev->alt];
863 dev->packet_multiplier = EM28XX_NUM_ISOC_PACKETS;
864 }
865 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
866 dev->alt, dev->max_pkt_size);
867 errCode = usb_set_interface(dev->udev, 0, dev->alt);
868 if (errCode < 0) {
869 em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
870 dev->alt, errCode);
871 return errCode;
872 }
873 return 0;
874}
875
876int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
877{
878 int rc = 0;
879
880 if (!gpio)
881 return rc;
882
883 if (dev->mode != EM28XX_SUSPEND) {
884 em28xx_write_reg(dev, 0x48, 0x00);
885 if (dev->mode == EM28XX_ANALOG_MODE)
886 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
887 else
888 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
889 msleep(6);
890 }
891
892
893 while (gpio->sleep >= 0) {
894 if (gpio->reg >= 0) {
895 rc = em28xx_write_reg_bits(dev,
896 gpio->reg,
897 gpio->val,
898 gpio->mask);
899 if (rc < 0)
900 return rc;
901 }
902 if (gpio->sleep > 0)
903 msleep(gpio->sleep);
904
905 gpio++;
906 }
907 return rc;
908}
909EXPORT_SYMBOL_GPL(em28xx_gpio_set);
910
911int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
912{
913 if (dev->mode == set_mode)
914 return 0;
915
916 if (set_mode == EM28XX_SUSPEND) {
917 dev->mode = set_mode;
918
919
920
921 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
922 }
923
924 dev->mode = set_mode;
925
926 if (dev->mode == EM28XX_DIGITAL_MODE)
927 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
928 else
929 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
930}
931EXPORT_SYMBOL_GPL(em28xx_set_mode);
932
933
934
935
936
937
938
939
940static void em28xx_irq_callback(struct urb *urb)
941{
942 struct em28xx *dev = urb->context;
943 int i;
944
945 switch (urb->status) {
946 case 0:
947 case -ETIMEDOUT:
948 break;
949 case -ECONNRESET:
950 case -ENOENT:
951 case -ESHUTDOWN:
952 return;
953 default:
954 em28xx_isocdbg("urb completition error %d.\n", urb->status);
955 break;
956 }
957
958
959 spin_lock(&dev->slock);
960 dev->usb_ctl.urb_data_copy(dev, urb);
961 spin_unlock(&dev->slock);
962
963
964 for (i = 0; i < urb->number_of_packets; i++) {
965
966 urb->iso_frame_desc[i].status = 0;
967 urb->iso_frame_desc[i].actual_length = 0;
968 }
969 urb->status = 0;
970
971 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
972 if (urb->status) {
973 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
974 urb->status);
975 }
976}
977
978
979
980
981void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode)
982{
983 struct urb *urb;
984 struct em28xx_usb_bufs *usb_bufs;
985 int i;
986
987 em28xx_isocdbg("em28xx: called em28xx_uninit_usb_xfer in mode %d\n",
988 mode);
989
990 if (mode == EM28XX_DIGITAL_MODE)
991 usb_bufs = &dev->usb_ctl.digital_bufs;
992 else
993 usb_bufs = &dev->usb_ctl.analog_bufs;
994
995 for (i = 0; i < usb_bufs->num_bufs; i++) {
996 urb = usb_bufs->urb[i];
997 if (urb) {
998 if (!irqs_disabled())
999 usb_kill_urb(urb);
1000 else
1001 usb_unlink_urb(urb);
1002
1003 if (usb_bufs->transfer_buffer[i]) {
1004 usb_free_coherent(dev->udev,
1005 urb->transfer_buffer_length,
1006 usb_bufs->transfer_buffer[i],
1007 urb->transfer_dma);
1008 }
1009 usb_free_urb(urb);
1010 usb_bufs->urb[i] = NULL;
1011 }
1012 usb_bufs->transfer_buffer[i] = NULL;
1013 }
1014
1015 kfree(usb_bufs->urb);
1016 kfree(usb_bufs->transfer_buffer);
1017
1018 usb_bufs->urb = NULL;
1019 usb_bufs->transfer_buffer = NULL;
1020 usb_bufs->num_bufs = 0;
1021
1022 em28xx_capture_start(dev, 0);
1023}
1024EXPORT_SYMBOL_GPL(em28xx_uninit_usb_xfer);
1025
1026
1027
1028
1029void em28xx_stop_urbs(struct em28xx *dev)
1030{
1031 int i;
1032 struct urb *urb;
1033 struct em28xx_usb_bufs *isoc_bufs = &dev->usb_ctl.digital_bufs;
1034
1035 em28xx_isocdbg("em28xx: called em28xx_stop_urbs\n");
1036
1037 for (i = 0; i < isoc_bufs->num_bufs; i++) {
1038 urb = isoc_bufs->urb[i];
1039 if (urb) {
1040 if (!irqs_disabled())
1041 usb_kill_urb(urb);
1042 else
1043 usb_unlink_urb(urb);
1044 }
1045 }
1046
1047 em28xx_capture_start(dev, 0);
1048}
1049EXPORT_SYMBOL_GPL(em28xx_stop_urbs);
1050
1051
1052
1053
1054int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk,
1055 int num_bufs, int max_pkt_size, int packet_multiplier)
1056{
1057 struct em28xx_usb_bufs *usb_bufs;
1058 int i;
1059 int sb_size, pipe;
1060 struct urb *urb;
1061 int j, k;
1062
1063 em28xx_isocdbg("em28xx: called em28xx_alloc_isoc in mode %d\n", mode);
1064
1065
1066
1067 if (mode == EM28XX_DIGITAL_MODE) {
1068 if ((xfer_bulk && !dev->dvb_ep_bulk) ||
1069 (!xfer_bulk && !dev->dvb_ep_isoc)) {
1070 em28xx_errdev("no endpoint for DVB mode and transfer type %d\n",
1071 xfer_bulk > 0);
1072 return -EINVAL;
1073 }
1074 usb_bufs = &dev->usb_ctl.digital_bufs;
1075 } else if (mode == EM28XX_ANALOG_MODE) {
1076 if ((xfer_bulk && !dev->analog_ep_bulk) ||
1077 (!xfer_bulk && !dev->analog_ep_isoc)) {
1078 em28xx_errdev("no endpoint for analog mode and transfer type %d\n",
1079 xfer_bulk > 0);
1080 return -EINVAL;
1081 }
1082 usb_bufs = &dev->usb_ctl.analog_bufs;
1083 } else {
1084 em28xx_errdev("invalid mode selected\n");
1085 return -EINVAL;
1086 }
1087
1088
1089 em28xx_uninit_usb_xfer(dev, mode);
1090
1091 usb_bufs->num_bufs = num_bufs;
1092
1093 usb_bufs->urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
1094 if (!usb_bufs->urb) {
1095 em28xx_errdev("cannot alloc memory for usb buffers\n");
1096 return -ENOMEM;
1097 }
1098
1099 usb_bufs->transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
1100 GFP_KERNEL);
1101 if (!usb_bufs->transfer_buffer) {
1102 em28xx_errdev("cannot allocate memory for usb transfer\n");
1103 kfree(usb_bufs->urb);
1104 return -ENOMEM;
1105 }
1106
1107 usb_bufs->max_pkt_size = max_pkt_size;
1108 if (xfer_bulk)
1109 usb_bufs->num_packets = 0;
1110 else
1111 usb_bufs->num_packets = packet_multiplier;
1112 dev->usb_ctl.vid_buf = NULL;
1113 dev->usb_ctl.vbi_buf = NULL;
1114
1115 sb_size = packet_multiplier * usb_bufs->max_pkt_size;
1116
1117
1118 for (i = 0; i < usb_bufs->num_bufs; i++) {
1119 urb = usb_alloc_urb(usb_bufs->num_packets, GFP_KERNEL);
1120 if (!urb) {
1121 em28xx_err("cannot alloc usb_ctl.urb %i\n", i);
1122 em28xx_uninit_usb_xfer(dev, mode);
1123 return -ENOMEM;
1124 }
1125 usb_bufs->urb[i] = urb;
1126
1127 usb_bufs->transfer_buffer[i] = usb_alloc_coherent(dev->udev,
1128 sb_size, GFP_KERNEL, &urb->transfer_dma);
1129 if (!usb_bufs->transfer_buffer[i]) {
1130 em28xx_err("unable to allocate %i bytes for transfer"
1131 " buffer %i%s\n",
1132 sb_size, i,
1133 in_interrupt() ? " while in int" : "");
1134 em28xx_uninit_usb_xfer(dev, mode);
1135 return -ENOMEM;
1136 }
1137 memset(usb_bufs->transfer_buffer[i], 0, sb_size);
1138
1139 if (xfer_bulk) {
1140 pipe = usb_rcvbulkpipe(dev->udev,
1141 mode == EM28XX_ANALOG_MODE ?
1142 dev->analog_ep_bulk :
1143 dev->dvb_ep_bulk);
1144 usb_fill_bulk_urb(urb, dev->udev, pipe,
1145 usb_bufs->transfer_buffer[i], sb_size,
1146 em28xx_irq_callback, dev);
1147 urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
1148 } else {
1149 pipe = usb_rcvisocpipe(dev->udev,
1150 mode == EM28XX_ANALOG_MODE ?
1151 dev->analog_ep_isoc :
1152 dev->dvb_ep_isoc);
1153 usb_fill_int_urb(urb, dev->udev, pipe,
1154 usb_bufs->transfer_buffer[i], sb_size,
1155 em28xx_irq_callback, dev, 1);
1156 urb->transfer_flags = URB_ISO_ASAP |
1157 URB_NO_TRANSFER_DMA_MAP;
1158 k = 0;
1159 for (j = 0; j < usb_bufs->num_packets; j++) {
1160 urb->iso_frame_desc[j].offset = k;
1161 urb->iso_frame_desc[j].length =
1162 usb_bufs->max_pkt_size;
1163 k += usb_bufs->max_pkt_size;
1164 }
1165 }
1166
1167 urb->number_of_packets = usb_bufs->num_packets;
1168 }
1169
1170 return 0;
1171}
1172EXPORT_SYMBOL_GPL(em28xx_alloc_urbs);
1173
1174
1175
1176
1177int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode,
1178 int xfer_bulk, int num_bufs, int max_pkt_size,
1179 int packet_multiplier,
1180 int (*urb_data_copy) (struct em28xx *dev, struct urb *urb))
1181{
1182 struct em28xx_dmaqueue *dma_q = &dev->vidq;
1183 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
1184 struct em28xx_usb_bufs *usb_bufs;
1185 int i;
1186 int rc;
1187 int alloc;
1188
1189 em28xx_isocdbg("em28xx: called em28xx_init_usb_xfer in mode %d\n",
1190 mode);
1191
1192 dev->usb_ctl.urb_data_copy = urb_data_copy;
1193
1194 if (mode == EM28XX_DIGITAL_MODE) {
1195 usb_bufs = &dev->usb_ctl.digital_bufs;
1196
1197 alloc = 0;
1198 } else {
1199 usb_bufs = &dev->usb_ctl.analog_bufs;
1200 alloc = 1;
1201 }
1202
1203 if (alloc) {
1204 rc = em28xx_alloc_urbs(dev, mode, xfer_bulk, num_bufs,
1205 max_pkt_size, packet_multiplier);
1206 if (rc)
1207 return rc;
1208 }
1209
1210 if (xfer_bulk) {
1211 rc = usb_clear_halt(dev->udev, usb_bufs->urb[0]->pipe);
1212 if (rc < 0) {
1213 em28xx_err("failed to clear USB bulk endpoint stall/halt condition (error=%i)\n",
1214 rc);
1215 em28xx_uninit_usb_xfer(dev, mode);
1216 return rc;
1217 }
1218 }
1219
1220 init_waitqueue_head(&dma_q->wq);
1221 init_waitqueue_head(&vbi_dma_q->wq);
1222
1223 em28xx_capture_start(dev, 1);
1224
1225
1226 for (i = 0; i < usb_bufs->num_bufs; i++) {
1227 rc = usb_submit_urb(usb_bufs->urb[i], GFP_ATOMIC);
1228 if (rc) {
1229 em28xx_err("submit of urb %i failed (error=%i)\n", i,
1230 rc);
1231 em28xx_uninit_usb_xfer(dev, mode);
1232 return rc;
1233 }
1234 }
1235
1236 return 0;
1237}
1238EXPORT_SYMBOL_GPL(em28xx_init_usb_xfer);
1239
1240
1241
1242
1243
1244void em28xx_wake_i2c(struct em28xx *dev)
1245{
1246 v4l2_device_call_all(&dev->v4l2_dev, 0, core, reset, 0);
1247 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing,
1248 INPUT(dev->ctl_input)->vmux, 0, 0);
1249 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0);
1250}
1251
1252
1253
1254
1255
1256static LIST_HEAD(em28xx_devlist);
1257static DEFINE_MUTEX(em28xx_devlist_mutex);
1258
1259
1260
1261
1262
1263static LIST_HEAD(em28xx_extension_devlist);
1264
1265int em28xx_register_extension(struct em28xx_ops *ops)
1266{
1267 struct em28xx *dev = NULL;
1268
1269 mutex_lock(&em28xx_devlist_mutex);
1270 list_add_tail(&ops->next, &em28xx_extension_devlist);
1271 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1272 ops->init(dev);
1273 }
1274 mutex_unlock(&em28xx_devlist_mutex);
1275 printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
1276 return 0;
1277}
1278EXPORT_SYMBOL(em28xx_register_extension);
1279
1280void em28xx_unregister_extension(struct em28xx_ops *ops)
1281{
1282 struct em28xx *dev = NULL;
1283
1284 mutex_lock(&em28xx_devlist_mutex);
1285 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1286 ops->fini(dev);
1287 }
1288 list_del(&ops->next);
1289 mutex_unlock(&em28xx_devlist_mutex);
1290 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1291}
1292EXPORT_SYMBOL(em28xx_unregister_extension);
1293
1294void em28xx_init_extension(struct em28xx *dev)
1295{
1296 const struct em28xx_ops *ops = NULL;
1297
1298 mutex_lock(&em28xx_devlist_mutex);
1299 list_add_tail(&dev->devlist, &em28xx_devlist);
1300 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1301 if (ops->init)
1302 ops->init(dev);
1303 }
1304 mutex_unlock(&em28xx_devlist_mutex);
1305}
1306
1307void em28xx_close_extension(struct em28xx *dev)
1308{
1309 const struct em28xx_ops *ops = NULL;
1310
1311 mutex_lock(&em28xx_devlist_mutex);
1312 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1313 if (ops->fini)
1314 ops->fini(dev);
1315 }
1316 list_del(&dev->devlist);
1317 mutex_unlock(&em28xx_devlist_mutex);
1318}
1319
