LXR linux/drivers/mmc/host/sdhci-bcm-kona.c

   1/*
   2 * Copyright (C) 2013 Broadcom Corporation
   3 *
   4 * This program is free software; you can redistribute it and/or
   5 * modify it under the terms of the GNU General Public License as
   6 * published by the Free Software Foundation version 2.
   7 *
   8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
   9 * kind, whether express or implied; without even the implied warranty
  10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11 * GNU General Public License for more details.
  12 */
  13
  14#include <linux/kernel.h>
  15#include <linux/module.h>
  16#include <linux/delay.h>
  17#include <linux/highmem.h>
  18#include <linux/platform_device.h>
  19#include <linux/mmc/host.h>
  20#include <linux/io.h>
  21#include <linux/gpio.h>
  22#include <linux/clk.h>
  23#include <linux/regulator/consumer.h>
  24#include <linux/of.h>
  25#include <linux/of_device.h>
  26#include <linux/of_gpio.h>
  27#include <linux/mmc/slot-gpio.h>
  28
  29#include "sdhci-pltfm.h"
  30#include "sdhci.h"
  31
  32#define SDHCI_SOFT_RESET                        0x01000000
  33#define KONA_SDHOST_CORECTRL                    0x8000
  34#define KONA_SDHOST_CD_PINCTRL                  0x00000008
  35#define KONA_SDHOST_STOP_HCLK                   0x00000004
  36#define KONA_SDHOST_RESET                       0x00000002
  37#define KONA_SDHOST_EN                          0x00000001
  38
  39#define KONA_SDHOST_CORESTAT                    0x8004
  40#define KONA_SDHOST_WP                          0x00000002
  41#define KONA_SDHOST_CD_SW                       0x00000001
  42
  43#define KONA_SDHOST_COREIMR                     0x8008
  44#define KONA_SDHOST_IP                          0x00000001
  45
  46#define KONA_SDHOST_COREISR                     0x800C
  47#define KONA_SDHOST_COREIMSR                    0x8010
  48#define KONA_SDHOST_COREDBG1                    0x8014
  49#define KONA_SDHOST_COREGPO_MASK                0x8018
  50
  51#define SD_DETECT_GPIO_DEBOUNCE_128MS           128
  52
  53#define KONA_MMC_AUTOSUSPEND_DELAY              (50)
  54
  55struct sdhci_bcm_kona_dev {
  56        struct mutex    write_lock; /* protect back to back writes */
  57};
  58
  59
  60static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
  61{
  62        unsigned int val;
  63        unsigned long timeout;
  64
  65        /* This timeout should be sufficent for core to reset */
  66        timeout = jiffies + msecs_to_jiffies(100);
  67
  68        /* reset the host using the top level reset */
  69        val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  70        val |= KONA_SDHOST_RESET;
  71        sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  72
  73        while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
  74                if (time_is_before_jiffies(timeout)) {
  75                        pr_err("Error: sd host is stuck in reset!!!\n");
  76                        return -EFAULT;
  77                }
  78        }
  79
  80        /* bring the host out of reset */
  81        val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  82        val &= ~KONA_SDHOST_RESET;
  83
  84        /*
  85         * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
  86         * Back-to-Back writes to same register needs delay when SD bus clock
  87         * is very low w.r.t AHB clock, mainly during boot-time and during card
  88         * insert-removal.
  89         */
  90        usleep_range(1000, 5000);
  91        sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  92
  93        return 0;
  94}
  95
  96static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
  97{
  98        unsigned int val;
  99
 100        /* enable the interrupt from the IP core */
 101        val = sdhci_readl(host, KONA_SDHOST_COREIMR);
 102        val |= KONA_SDHOST_IP;
 103        sdhci_writel(host, val, KONA_SDHOST_COREIMR);
 104
 105        /* Enable the AHB clock gating module to the host */
 106        val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
 107        val |= KONA_SDHOST_EN;
 108
 109        /*
 110         * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
 111         * Back-to-Back writes to same register needs delay when SD bus clock
 112         * is very low w.r.t AHB clock, mainly during boot-time and during card
 113         * insert-removal.
 114         */
 115        usleep_range(1000, 5000);
 116        sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
 117}
 118
 119/*
 120 * Software emulation of the SD card insertion/removal. Set insert=1 for insert
 121 * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
 122 * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
 123 * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
 124 */
 125static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
 126{
 127        struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
 128        struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
 129        u32 val;
 130
 131        /*
 132         * Back-to-Back register write needs a delay of min 10uS.
 133         * Back-to-Back writes to same register needs delay when SD bus clock
 134         * is very low w.r.t AHB clock, mainly during boot-time and during card
 135         * insert-removal.
 136         * We keep 20uS
 137         */
 138        mutex_lock(&kona_dev->write_lock);
 139        udelay(20);
 140        val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
 141
 142        if (insert) {
 143                int ret;
 144
 145                ret = mmc_gpio_get_ro(host->mmc);
 146                if (ret >= 0)
 147                        val = (val & ~KONA_SDHOST_WP) |
 148                                ((ret) ? KONA_SDHOST_WP : 0);
 149
 150                val |= KONA_SDHOST_CD_SW;
 151                sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
 152        } else {
 153                val &= ~KONA_SDHOST_CD_SW;
 154                sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
 155        }
 156        mutex_unlock(&kona_dev->write_lock);
 157
 158        return 0;
 159}
 160
 161/*
 162 * SD card interrupt event callback
 163 */
 164static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
 165{
 166        if (mmc_gpio_get_cd(host->mmc) > 0) {
 167                dev_dbg(mmc_dev(host->mmc),
 168                        "card inserted\n");
 169                sdhci_bcm_kona_sd_card_emulate(host, 1);
 170        } else {
 171                dev_dbg(mmc_dev(host->mmc),
 172                        "card removed\n");
 173                sdhci_bcm_kona_sd_card_emulate(host, 0);
 174        }
 175}
 176
 177/*
 178 * Get the base clock. Use central clock source for now. Not sure if different
 179 * clock speed to each dev is allowed
 180 */
 181static unsigned int sdhci_bcm_kona_get_max_clk(struct sdhci_host *host)
 182{
 183        struct sdhci_bcm_kona_dev *kona_dev;
 184        struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
 185        kona_dev = sdhci_pltfm_priv(pltfm_priv);
 186
 187        return host->mmc->f_max;
 188}
 189
 190static unsigned int sdhci_bcm_kona_get_timeout_clock(struct sdhci_host *host)
 191{
 192        return sdhci_bcm_kona_get_max_clk(host);
 193}
 194
 195static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
 196                                u8 power_mode)
 197{
 198        /*
 199         *  JEDEC and SD spec specify supplying 74 continuous clocks to
 200         * device after power up. With minimum bus (100KHz) that
 201         * that translates to 740us
 202         */
 203        if (power_mode != MMC_POWER_OFF)
 204                udelay(740);
 205}
 206
 207static struct sdhci_ops sdhci_bcm_kona_ops = {
 208        .get_max_clock = sdhci_bcm_kona_get_max_clk,
 209        .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
 210        .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
 211        .card_event = sdhci_bcm_kona_card_event,
 212};
 213
 214static struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
 215        .ops    = &sdhci_bcm_kona_ops,
 216        .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
 217                SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
 218                SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
 219                SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
 220                SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
 221};
 222
 223static struct __initconst of_device_id sdhci_bcm_kona_of_match[] = {
 224        { .compatible = "brcm,kona-sdhci"},
 225        { .compatible = "bcm,kona-sdhci"}, /* deprecated name */
 226        {}
 227};
 228MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
 229
 230static int sdhci_bcm_kona_probe(struct platform_device *pdev)
 231{
 232        struct sdhci_bcm_kona_dev *kona_dev = NULL;
 233        struct sdhci_pltfm_host *pltfm_priv;
 234        struct device *dev = &pdev->dev;
 235        struct sdhci_host *host;
 236        int ret;
 237
 238        ret = 0;
 239
 240        host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
 241                        sizeof(*kona_dev));
 242        if (IS_ERR(host))
 243                return PTR_ERR(host);
 244
 245        dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
 246
 247        pltfm_priv = sdhci_priv(host);
 248
 249        kona_dev = sdhci_pltfm_priv(pltfm_priv);
 250        mutex_init(&kona_dev->write_lock);
 251
 252        mmc_of_parse(host->mmc);
 253
 254        if (!host->mmc->f_max) {
 255                dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
 256                ret = -ENXIO;
 257                goto err_pltfm_free;
 258        }
 259
 260        dev_dbg(dev, "non-removable=%c\n",
 261                (host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N');
 262        dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
 263                (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
 264                (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
 265
 266        if (host->mmc->caps & MMC_CAP_NONREMOVABLE)
 267                host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
 268
 269        dev_dbg(dev, "is_8bit=%c\n",
 270                (host->mmc->caps | MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
 271
 272        ret = sdhci_bcm_kona_sd_reset(host);
 273        if (ret)
 274                goto err_pltfm_free;
 275
 276        sdhci_bcm_kona_sd_init(host);
 277
 278        ret = sdhci_add_host(host);
 279        if (ret) {
 280                dev_err(dev, "Failed sdhci_add_host\n");
 281                goto err_reset;
 282        }
 283
 284        /* if device is eMMC, emulate card insert right here */
 285        if (host->mmc->caps & MMC_CAP_NONREMOVABLE) {
 286                ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
 287                if (ret) {
 288                        dev_err(dev,
 289                                "unable to emulate card insertion\n");
 290                        goto err_remove_host;
 291                }
 292        }
 293        /*
 294         * Since the card detection GPIO interrupt is configured to be
 295         * edge sensitive, check the initial GPIO value here, emulate
 296         * only if the card is present
 297         */
 298        if (mmc_gpio_get_cd(host->mmc) > 0)
 299                sdhci_bcm_kona_sd_card_emulate(host, 1);
 300
 301        dev_dbg(dev, "initialized properly\n");
 302        return 0;
 303
 304err_remove_host:
 305        sdhci_remove_host(host, 0);
 306
 307err_reset:
 308        sdhci_bcm_kona_sd_reset(host);
 309
 310err_pltfm_free:
 311        sdhci_pltfm_free(pdev);
 312
 313        dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
 314        return ret;
 315}
 316
 317static int __exit sdhci_bcm_kona_remove(struct platform_device *pdev)
 318{
 319        struct sdhci_host *host = platform_get_drvdata(pdev);
 320        int dead;
 321        u32 scratch;
 322
 323        dead = 0;
 324        scratch = readl(host->ioaddr + SDHCI_INT_STATUS);
 325        if (scratch == (u32)-1)
 326                dead = 1;
 327        sdhci_remove_host(host, dead);
 328
 329        sdhci_free_host(host);
 330
 331        return 0;
 332}
 333
 334static struct platform_driver sdhci_bcm_kona_driver = {
 335        .driver         = {
 336                .name   = "sdhci-kona",
 337                .owner  = THIS_MODULE,
 338                .pm     = SDHCI_PLTFM_PMOPS,
 339                .of_match_table = sdhci_bcm_kona_of_match,
 340        },
 341        .probe          = sdhci_bcm_kona_probe,
 342        .remove         = sdhci_bcm_kona_remove,
 343};
 344module_platform_driver(sdhci_bcm_kona_driver);
 345
 346MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
 347MODULE_AUTHOR("Broadcom");
 348MODULE_LICENSE("GPL v2");
 349