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30#include <linux/module.h>
31#include <linux/kernel.h>
32#include <linux/slab.h>
33#include <linux/pci.h>
34#include <linux/init.h>
35#include <linux/mtd/mtd.h>
36#include <linux/mtd/map.h>
37#include <linux/mtd/partitions.h>
38#include <linux/mtd/cfi.h>
39#include <linux/mtd/flashchip.h>
40
41#define DRV_NAME "vr_nor"
42
43struct vr_nor_mtd {
44 void __iomem *csr_base;
45 struct map_info map;
46 struct mtd_info *info;
47 struct pci_dev *dev;
48};
49
50
51#define EXP_CSR_MBAR 0
52
53#define EXP_WIN_MBAR 1
54
55#define CS0_SIZE 0x04000000
56
57#define CS0_START 0x0
58
59#define EXP_TIMING_CS0 0x00
60#define TIMING_CS_EN (1 << 31)
61#define TIMING_BOOT_ACCEL_DIS (1 << 8)
62#define TIMING_WR_EN (1 << 1)
63#define TIMING_BYTE_EN (1 << 0)
64#define TIMING_MASK 0x3FFF0000
65
66static void vr_nor_destroy_partitions(struct vr_nor_mtd *p)
67{
68 mtd_device_unregister(p->info);
69}
70
71static int vr_nor_init_partitions(struct vr_nor_mtd *p)
72{
73
74
75 return mtd_device_parse_register(p->info, NULL, NULL, NULL, 0);
76}
77
78static void vr_nor_destroy_mtd_setup(struct vr_nor_mtd *p)
79{
80 map_destroy(p->info);
81}
82
83static int vr_nor_mtd_setup(struct vr_nor_mtd *p)
84{
85 static const char * const probe_types[] =
86 { "cfi_probe", "jedec_probe", NULL };
87 const char * const *type;
88
89 for (type = probe_types; !p->info && *type; type++)
90 p->info = do_map_probe(*type, &p->map);
91 if (!p->info)
92 return -ENODEV;
93
94 p->info->owner = THIS_MODULE;
95
96 return 0;
97}
98
99static void vr_nor_destroy_maps(struct vr_nor_mtd *p)
100{
101 unsigned int exp_timing_cs0;
102
103
104 exp_timing_cs0 = readl(p->csr_base + EXP_TIMING_CS0);
105 exp_timing_cs0 &= ~TIMING_WR_EN;
106 writel(exp_timing_cs0, p->csr_base + EXP_TIMING_CS0);
107
108
109 iounmap(p->map.virt);
110
111
112 iounmap(p->csr_base);
113}
114
115
116
117
118
119static int vr_nor_init_maps(struct vr_nor_mtd *p)
120{
121 unsigned long csr_phys, csr_len;
122 unsigned long win_phys, win_len;
123 unsigned int exp_timing_cs0;
124 int err;
125
126 csr_phys = pci_resource_start(p->dev, EXP_CSR_MBAR);
127 csr_len = pci_resource_len(p->dev, EXP_CSR_MBAR);
128 win_phys = pci_resource_start(p->dev, EXP_WIN_MBAR);
129 win_len = pci_resource_len(p->dev, EXP_WIN_MBAR);
130
131 if (!csr_phys || !csr_len || !win_phys || !win_len)
132 return -ENODEV;
133
134 if (win_len < (CS0_START + CS0_SIZE))
135 return -ENXIO;
136
137 p->csr_base = ioremap_nocache(csr_phys, csr_len);
138 if (!p->csr_base)
139 return -ENOMEM;
140
141 exp_timing_cs0 = readl(p->csr_base + EXP_TIMING_CS0);
142 if (!(exp_timing_cs0 & TIMING_CS_EN)) {
143 dev_warn(&p->dev->dev, "Expansion Bus Chip Select 0 "
144 "is disabled.\n");
145 err = -ENODEV;
146 goto release;
147 }
148 if ((exp_timing_cs0 & TIMING_MASK) == TIMING_MASK) {
149 dev_warn(&p->dev->dev, "Expansion Bus Chip Select 0 "
150 "is configured for maximally slow access times.\n");
151 }
152 p->map.name = DRV_NAME;
153 p->map.bankwidth = (exp_timing_cs0 & TIMING_BYTE_EN) ? 1 : 2;
154 p->map.phys = win_phys + CS0_START;
155 p->map.size = CS0_SIZE;
156 p->map.virt = ioremap_nocache(p->map.phys, p->map.size);
157 if (!p->map.virt) {
158 err = -ENOMEM;
159 goto release;
160 }
161 simple_map_init(&p->map);
162
163
164 exp_timing_cs0 |= TIMING_BOOT_ACCEL_DIS | TIMING_WR_EN;
165 writel(exp_timing_cs0, p->csr_base + EXP_TIMING_CS0);
166
167 return 0;
168
169 release:
170 iounmap(p->csr_base);
171 return err;
172}
173
174static struct pci_device_id vr_nor_pci_ids[] = {
175 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x500D)},
176 {0,}
177};
178
179static void vr_nor_pci_remove(struct pci_dev *dev)
180{
181 struct vr_nor_mtd *p = pci_get_drvdata(dev);
182
183 pci_set_drvdata(dev, NULL);
184 vr_nor_destroy_partitions(p);
185 vr_nor_destroy_mtd_setup(p);
186 vr_nor_destroy_maps(p);
187 kfree(p);
188 pci_release_regions(dev);
189 pci_disable_device(dev);
190}
191
192static int vr_nor_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
193{
194 struct vr_nor_mtd *p = NULL;
195 unsigned int exp_timing_cs0;
196 int err;
197
198 err = pci_enable_device(dev);
199 if (err)
200 goto out;
201
202 err = pci_request_regions(dev, DRV_NAME);
203 if (err)
204 goto disable_dev;
205
206 p = kzalloc(sizeof(*p), GFP_KERNEL);
207 err = -ENOMEM;
208 if (!p)
209 goto release;
210
211 p->dev = dev;
212
213 err = vr_nor_init_maps(p);
214 if (err)
215 goto release;
216
217 err = vr_nor_mtd_setup(p);
218 if (err)
219 goto destroy_maps;
220
221 err = vr_nor_init_partitions(p);
222 if (err)
223 goto destroy_mtd_setup;
224
225 pci_set_drvdata(dev, p);
226
227 return 0;
228
229 destroy_mtd_setup:
230 map_destroy(p->info);
231
232 destroy_maps:
233
234 exp_timing_cs0 = readl(p->csr_base + EXP_TIMING_CS0);
235 exp_timing_cs0 &= ~TIMING_WR_EN;
236 writel(exp_timing_cs0, p->csr_base + EXP_TIMING_CS0);
237
238
239 iounmap(p->map.virt);
240
241
242 iounmap(p->csr_base);
243
244 release:
245 kfree(p);
246 pci_release_regions(dev);
247
248 disable_dev:
249 pci_disable_device(dev);
250
251 out:
252 return err;
253}
254
255static struct pci_driver vr_nor_pci_driver = {
256 .name = DRV_NAME,
257 .probe = vr_nor_pci_probe,
258 .remove = vr_nor_pci_remove,
259 .id_table = vr_nor_pci_ids,
260};
261
262module_pci_driver(vr_nor_pci_driver);
263
264MODULE_AUTHOR("Andy Lowe");
265MODULE_DESCRIPTION("MTD map driver for NOR flash on Intel Vermilion Range");
266MODULE_LICENSE("GPL");
267MODULE_DEVICE_TABLE(pci, vr_nor_pci_ids);
268