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7#ifndef _8390_h
8#define _8390_h
9
10#include <linux/if_ether.h>
11#include <linux/ioport.h>
12#include <linux/irqreturn.h>
13#include <linux/skbuff.h>
14
15#define TX_PAGES 12
16
17
18struct e8390_pkt_hdr {
19 unsigned char status;
20 unsigned char next;
21 unsigned short count;
22};
23
24#ifdef notdef
25extern int ei_debug;
26#else
27#define ei_debug 1
28#endif
29
30#ifdef CONFIG_NET_POLL_CONTROLLER
31extern void ei_poll(struct net_device *dev);
32extern void eip_poll(struct net_device *dev);
33#endif
34
35
36
37extern void NS8390_init(struct net_device *dev, int startp);
38extern int ei_open(struct net_device *dev);
39extern int ei_close(struct net_device *dev);
40extern irqreturn_t ei_interrupt(int irq, void *dev_id);
41extern void ei_tx_timeout(struct net_device *dev);
42extern netdev_tx_t ei_start_xmit(struct sk_buff *skb, struct net_device *dev);
43extern void ei_set_multicast_list(struct net_device *dev);
44extern struct net_device_stats *ei_get_stats(struct net_device *dev);
45
46extern const struct net_device_ops ei_netdev_ops;
47
48extern struct net_device *__alloc_ei_netdev(int size);
49static inline struct net_device *alloc_ei_netdev(void)
50{
51 return __alloc_ei_netdev(0);
52}
53
54
55extern void NS8390p_init(struct net_device *dev, int startp);
56extern int eip_open(struct net_device *dev);
57extern int eip_close(struct net_device *dev);
58extern irqreturn_t eip_interrupt(int irq, void *dev_id);
59extern void eip_tx_timeout(struct net_device *dev);
60extern netdev_tx_t eip_start_xmit(struct sk_buff *skb, struct net_device *dev);
61extern void eip_set_multicast_list(struct net_device *dev);
62extern struct net_device_stats *eip_get_stats(struct net_device *dev);
63
64extern const struct net_device_ops eip_netdev_ops;
65
66extern struct net_device *__alloc_eip_netdev(int size);
67static inline struct net_device *alloc_eip_netdev(void)
68{
69 return __alloc_eip_netdev(0);
70}
71
72
73struct ei_device {
74 const char *name;
75 void (*reset_8390)(struct net_device *);
76 void (*get_8390_hdr)(struct net_device *, struct e8390_pkt_hdr *, int);
77 void (*block_output)(struct net_device *, int, const unsigned char *, int);
78 void (*block_input)(struct net_device *, int, struct sk_buff *, int);
79 unsigned long rmem_start;
80 unsigned long rmem_end;
81 void __iomem *mem;
82 unsigned char mcfilter[8];
83 unsigned open:1;
84 unsigned word16:1;
85 unsigned bigendian:1;
86
87 unsigned txing:1;
88 unsigned irqlock:1;
89 unsigned dmaing:1;
90 unsigned char tx_start_page, rx_start_page, stop_page;
91 unsigned char current_page;
92 unsigned char interface_num;
93 unsigned char txqueue;
94 short tx1, tx2;
95 short lasttx;
96 unsigned char reg0;
97 unsigned char reg5;
98 unsigned char saved_irq;
99 u32 *reg_offset;
100 spinlock_t page_lock;
101 unsigned long priv;
102#ifdef AX88796_PLATFORM
103 unsigned char rxcr_base;
104#endif
105};
106
107
108#define MAX_SERVICE 12
109
110
111#define TX_TIMEOUT (20*HZ/100)
112
113#define ei_status (*(struct ei_device *)netdev_priv(dev))
114
115
116#define E8390_TX_IRQ_MASK 0xa
117#define E8390_RX_IRQ_MASK 0x5
118
119#ifdef AX88796_PLATFORM
120#define E8390_RXCONFIG (ei_status.rxcr_base | 0x04)
121#define E8390_RXOFF (ei_status.rxcr_base | 0x20)
122#else
123#define E8390_RXCONFIG 0x4
124#define E8390_RXOFF 0x20
125#endif
126
127#define E8390_TXCONFIG 0x00
128#define E8390_TXOFF 0x02
129
130
131
132#define E8390_STOP 0x01
133#define E8390_START 0x02
134#define E8390_TRANS 0x04
135#define E8390_RREAD 0x08
136#define E8390_RWRITE 0x10
137#define E8390_NODMA 0x20
138#define E8390_PAGE0 0x00
139#define E8390_PAGE1 0x40
140#define E8390_PAGE2 0x80
141
142
143
144
145
146
147
148#ifndef ei_inb
149#define ei_inb(_p) inb(_p)
150#define ei_outb(_v,_p) outb(_v,_p)
151#define ei_inb_p(_p) inb(_p)
152#define ei_outb_p(_v,_p) outb(_v,_p)
153#endif
154
155#ifndef EI_SHIFT
156#define EI_SHIFT(x) (x)
157#endif
158
159#define E8390_CMD EI_SHIFT(0x00)
160
161#define EN0_CLDALO EI_SHIFT(0x01)
162#define EN0_STARTPG EI_SHIFT(0x01)
163#define EN0_CLDAHI EI_SHIFT(0x02)
164#define EN0_STOPPG EI_SHIFT(0x02)
165#define EN0_BOUNDARY EI_SHIFT(0x03)
166#define EN0_TSR EI_SHIFT(0x04)
167#define EN0_TPSR EI_SHIFT(0x04)
168#define EN0_NCR EI_SHIFT(0x05)
169#define EN0_TCNTLO EI_SHIFT(0x05)
170#define EN0_FIFO EI_SHIFT(0x06)
171#define EN0_TCNTHI EI_SHIFT(0x06)
172#define EN0_ISR EI_SHIFT(0x07)
173#define EN0_CRDALO EI_SHIFT(0x08)
174#define EN0_RSARLO EI_SHIFT(0x08)
175#define EN0_CRDAHI EI_SHIFT(0x09)
176#define EN0_RSARHI EI_SHIFT(0x09)
177#define EN0_RCNTLO EI_SHIFT(0x0a)
178#define EN0_RCNTHI EI_SHIFT(0x0b)
179#define EN0_RSR EI_SHIFT(0x0c)
180#define EN0_RXCR EI_SHIFT(0x0c)
181#define EN0_TXCR EI_SHIFT(0x0d)
182#define EN0_COUNTER0 EI_SHIFT(0x0d)
183#define EN0_DCFG EI_SHIFT(0x0e)
184#define EN0_COUNTER1 EI_SHIFT(0x0e)
185#define EN0_IMR EI_SHIFT(0x0f)
186#define EN0_COUNTER2 EI_SHIFT(0x0f)
187
188
189#define ENISR_RX 0x01
190#define ENISR_TX 0x02
191#define ENISR_RX_ERR 0x04
192#define ENISR_TX_ERR 0x08
193#define ENISR_OVER 0x10
194#define ENISR_COUNTERS 0x20
195#define ENISR_RDC 0x40
196#define ENISR_RESET 0x80
197#define ENISR_ALL 0x3f
198
199
200#define ENDCFG_WTS 0x01
201#define ENDCFG_BOS 0x02
202
203
204#define EN1_PHYS EI_SHIFT(0x01)
205#define EN1_PHYS_SHIFT(i) EI_SHIFT(i+1)
206#define EN1_CURPAG EI_SHIFT(0x07)
207#define EN1_MULT EI_SHIFT(0x08)
208#define EN1_MULT_SHIFT(i) EI_SHIFT(8+i)
209
210
211#define ENRSR_RXOK 0x01
212#define ENRSR_CRC 0x02
213#define ENRSR_FAE 0x04
214#define ENRSR_FO 0x08
215#define ENRSR_MPA 0x10
216#define ENRSR_PHY 0x20
217#define ENRSR_DIS 0x40
218#define ENRSR_DEF 0x80
219
220
221#define ENTSR_PTX 0x01
222#define ENTSR_ND 0x02
223#define ENTSR_COL 0x04
224#define ENTSR_ABT 0x08
225#define ENTSR_CRS 0x10
226#define ENTSR_FU 0x20
227#define ENTSR_CDH 0x40
228#define ENTSR_OWC 0x80
229
230#endif
231